akaros/user/perfmon/pfmlib_intel_snbep_unc_imc.c
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   1/*
   2 * pfmlib_intel_snbep_unc_imc.c : Intel SandyBridge-EP Integrated Memory Controller (IMC) uncore PMU
   3 *
   4 * Copyright (c) 2012 Google, Inc
   5 * Contributed by Stephane Eranian <eranian@gmail.com>
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  11 * of the Software, and to permit persons to whom the Software is furnished to do so,
  12 * subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in all
  15 * copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
  18 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
  19 * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  20 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
  21 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  22 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23 */
  24#include <sys/types.h>
  25#include <ctype.h>
  26#include <string.h>
  27#include <stdlib.h>
  28#include <stdio.h>
  29
  30/* private headers */
  31#include "pfmlib_priv.h"
  32#include "pfmlib_intel_x86_priv.h"
  33#include "pfmlib_intel_snbep_unc_priv.h"
  34#include "events/intel_snbep_unc_imc_events.h"
  35
  36#define DEFINE_IMC_BOX(n) \
  37pfmlib_pmu_t intel_snbep_unc_imc##n##_support = { \
  38        .desc                   = "Intel Sandy Bridge-EP IMC"#n" uncore", \
  39        .name                   = "snbep_unc_imc"#n, \
  40        .perf_name              = "uncore_imc_"#n, \
  41        .pmu                    = PFM_PMU_INTEL_SNBEP_UNC_IMC##n, \
  42        .pme_count              = LIBPFM_ARRAY_SIZE(intel_snbep_unc_m_pe), \
  43        .type                   = PFM_PMU_TYPE_UNCORE, \
  44        .num_cntrs              = 4, \
  45        .num_fixed_cntrs        = 1, \
  46        .max_encoding           = 1, \
  47        .pe                     = intel_snbep_unc_m_pe, \
  48        .atdesc                 = snbep_unc_mods, \
  49        .flags                  = PFMLIB_PMU_FL_RAW_UMASK\
  50                                | PFMLIB_PMU_FL_NO_SMPL,\
  51        .pmu_detect             = pfm_intel_snbep_unc_detect, \
  52        .get_event_encoding[PFM_OS_NONE] = pfm_intel_snbep_unc_get_encoding, \
  53         PFMLIB_ENCODE_PERF(pfm_intel_snbep_unc_get_perf_encoding), \
  54        .get_event_first        = pfm_intel_x86_get_event_first, \
  55        .get_event_next         = pfm_intel_x86_get_event_next, \
  56        .event_is_valid         = pfm_intel_x86_event_is_valid, \
  57        .validate_table         = pfm_intel_x86_validate_table, \
  58        .get_event_info         = pfm_intel_x86_get_event_info, \
  59        .get_event_attr_info    = pfm_intel_x86_get_event_attr_info, \
  60        PFMLIB_VALID_PERF_PATTRS(pfm_intel_snbep_unc_perf_validate_pattrs), \
  61        .get_event_nattrs       = pfm_intel_x86_get_event_nattrs, \
  62};
  63
  64DEFINE_IMC_BOX(0);
  65DEFINE_IMC_BOX(1);
  66DEFINE_IMC_BOX(2);
  67DEFINE_IMC_BOX(3);
  68