akaros/user/perfmon/pfmlib_intel_snb_unc.c
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   1/*
   2 * pfmlib_intel_snb_unc.c : Intel SandyBridge C-Box uncore PMU
   3 *
   4 * Copyright (c) 2012 Google, Inc
   5 * Contributed by Stephane Eranian <eranian@gmail.com>
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  11 * of the Software, and to permit persons to whom the Software is furnished to do so,
  12 * subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in all
  15 * copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
  18 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
  19 * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  20 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
  21 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  22 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23 */
  24/* private headers */
  25#include "pfmlib_priv.h"
  26#include "pfmlib_intel_x86_priv.h"
  27
  28#define INTEL_SNB_UNC_ATTRS \
  29        (_INTEL_X86_ATTR_I|_INTEL_X86_ATTR_E|_INTEL_X86_ATTR_C)
  30
  31#include "events/intel_snb_unc_events.h"
  32
  33static const int snb_models[] = {
  34        42, /* Sandy Bridge (Core i7 26xx, 25xx) */
  35        0
  36};
  37
  38#define SNB_UNC_CBOX(n, p) \
  39pfmlib_pmu_t intel_snb_unc_cbo##n##_support={ \
  40        .desc                   = "Intel Sandy Bridge C-box"#n" uncore", \
  41        .name                   = "snb_unc_cbo"#n, \
  42        .perf_name              = "uncore_cbox_"#n, \
  43        .pmu                    = PFM_PMU_INTEL_SNB_UNC_CB##n, \
  44        .pme_count              = LIBPFM_ARRAY_SIZE(intel_snb_unc_##p##_pe), \
  45        .type                   = PFM_PMU_TYPE_UNCORE, \
  46        .num_cntrs              = 2, \
  47        .num_fixed_cntrs        = 1, \
  48        .max_encoding           = 1,\
  49        .pe                     = intel_snb_unc_##p##_pe, \
  50        .atdesc                 = intel_x86_mods, \
  51        .flags                  = PFMLIB_PMU_FL_RAW_UMASK\
  52                                | PFMLIB_PMU_FL_NO_SMPL,\
  53        .cpu_family             = 6,\
  54        .cpu_models             = snb_models, \
  55        .pmu_detect             = pfm_intel_x86_model_detect,\
  56        .get_event_encoding[PFM_OS_NONE] = pfm_intel_x86_get_encoding, \
  57         PFMLIB_ENCODE_PERF(pfm_intel_nhm_unc_get_perf_encoding), \
  58         PFMLIB_OS_DETECT(pfm_intel_x86_perf_detect), \
  59        .get_event_first        = pfm_intel_x86_get_event_first, \
  60        .get_event_next         = pfm_intel_x86_get_event_next, \
  61        .event_is_valid         = pfm_intel_x86_event_is_valid, \
  62        .validate_table         = pfm_intel_x86_validate_table, \
  63        .get_event_info         = pfm_intel_x86_get_event_info, \
  64        .get_event_attr_info    = pfm_intel_x86_get_event_attr_info, \
  65         PFMLIB_VALID_PERF_PATTRS(pfm_intel_x86_perf_validate_pattrs),\
  66        .get_event_nattrs       = pfm_intel_x86_get_event_nattrs,\
  67}
  68
  69SNB_UNC_CBOX(0, cbo0);
  70SNB_UNC_CBOX(1, cbo);
  71SNB_UNC_CBOX(2, cbo);
  72SNB_UNC_CBOX(3, cbo);
  73