akaros/user/perfmon/pfmlib_intel_hsw.c
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   1/*
   2 * pfmlib_intel_hsw.c : Intel Haswell core PMU
   3 *
   4 * Copyright (c) 2012 Google, Inc
   5 * Contributed by Stephane Eranian <eranian@gmail.com>
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  11 * of the Software, and to permit persons to whom the Software is furnished to do so,
  12 * subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in all
  15 * copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
  18 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
  19 * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  20 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
  21 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  22 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23 */
  24/* private headers */
  25#include "pfmlib_priv.h"
  26#include "pfmlib_intel_x86_priv.h"
  27#include "events/intel_hsw_events.h"
  28
  29static const int hsw_models[] = {
  30        60, /* Haswell */
  31        69, /* Haswell */
  32        70, /* Haswell */
  33        71, /* Haswell */
  34        0
  35};
  36
  37static const int hsw_ep_models[] = {
  38        63, /* Haswell */
  39        0
  40};
  41
  42static int
  43pfm_hsw_init(void *this)
  44{
  45        pfm_intel_x86_cfg.arch_version = 4;
  46        return PFM_SUCCESS;
  47}
  48
  49pfmlib_pmu_t intel_hsw_support={
  50        .desc                   = "Intel Haswell",
  51        .name                   = "hsw",
  52        .pmu                    = PFM_PMU_INTEL_HSW,
  53        .pme_count              = LIBPFM_ARRAY_SIZE(intel_hsw_pe),
  54        .type                   = PFM_PMU_TYPE_CORE,
  55        .supported_plm          = INTEL_X86_PLM,
  56        .num_cntrs              = 8, /* consider with HT off by default */
  57        .num_fixed_cntrs        = 3,
  58        .max_encoding           = 2, /* offcore_response */
  59        .pe                     = intel_hsw_pe,
  60        .atdesc                 = intel_x86_mods,
  61        .flags                  = PFMLIB_PMU_FL_RAW_UMASK
  62                                | INTEL_X86_PMU_FL_ECMASK,
  63        .cpu_family             = 6,
  64        .cpu_models             = hsw_models,
  65        .pmu_detect             = pfm_intel_x86_model_detect,
  66        .pmu_init               = pfm_hsw_init,
  67        .get_event_encoding[PFM_OS_NONE] = pfm_intel_x86_get_encoding,
  68         PFMLIB_ENCODE_PERF(pfm_intel_x86_get_perf_encoding),
  69        .get_event_first        = pfm_intel_x86_get_event_first,
  70        .get_event_next         = pfm_intel_x86_get_event_next,
  71        .event_is_valid         = pfm_intel_x86_event_is_valid,
  72        .validate_table         = pfm_intel_x86_validate_table,
  73        .get_event_info         = pfm_intel_x86_get_event_info,
  74        .get_event_attr_info    = pfm_intel_x86_get_event_attr_info,
  75         PFMLIB_VALID_PERF_PATTRS(pfm_intel_x86_perf_validate_pattrs),
  76        .get_event_nattrs       = pfm_intel_x86_get_event_nattrs,
  77        .can_auto_encode        = pfm_intel_x86_can_auto_encode,
  78};
  79
  80pfmlib_pmu_t intel_hsw_ep_support={
  81        .desc                   = "Intel Haswell EP",
  82        .name                   = "hsw_ep",
  83        .pmu                    = PFM_PMU_INTEL_HSW_EP,
  84        .pme_count              = LIBPFM_ARRAY_SIZE(intel_hsw_pe),
  85        .type                   = PFM_PMU_TYPE_CORE,
  86        .supported_plm          = INTEL_X86_PLM,
  87        .num_cntrs              = 8, /* consider with HT off by default */
  88        .num_fixed_cntrs        = 3,
  89        .max_encoding           = 2, /* offcore_response */
  90        .pe                     = intel_hsw_pe,
  91        .atdesc                 = intel_x86_mods,
  92        .flags                  = PFMLIB_PMU_FL_RAW_UMASK
  93                                | INTEL_X86_PMU_FL_ECMASK,
  94        .cpu_family             = 6,
  95        .cpu_models             = hsw_ep_models,
  96        .pmu_detect             = pfm_intel_x86_model_detect,
  97        .pmu_init               = pfm_hsw_init,
  98        .get_event_encoding[PFM_OS_NONE] = pfm_intel_x86_get_encoding,
  99         PFMLIB_ENCODE_PERF(pfm_intel_x86_get_perf_encoding),
 100        .get_event_first        = pfm_intel_x86_get_event_first,
 101        .get_event_next         = pfm_intel_x86_get_event_next,
 102        .event_is_valid         = pfm_intel_x86_event_is_valid,
 103        .validate_table         = pfm_intel_x86_validate_table,
 104        .get_event_info         = pfm_intel_x86_get_event_info,
 105        .get_event_attr_info    = pfm_intel_x86_get_event_attr_info,
 106         PFMLIB_VALID_PERF_PATTRS(pfm_intel_x86_perf_validate_pattrs),
 107        .get_event_nattrs       = pfm_intel_x86_get_event_nattrs,
 108        .can_auto_encode        = pfm_intel_x86_can_auto_encode,
 109};
 110