akaros/user/perfmon/events/intel_snbep_unc_qpi_events.h
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   1/*
   2 * Copyright (c) 2012 Google, Inc
   3 * Contributed by Stephane Eranian <eranian@gmail.com>
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
   6 * of this software and associated documentation files (the "Software"), to deal
   7 * in the Software without restriction, including without limitation the rights
   8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
   9 * of the Software, and to permit persons to whom the Software is furnished to do so,
  10 * subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in all
  13 * copies or substantial portions of the Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
  16 * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
  17 * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  18 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
  19 * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  20 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * This file is part of libpfm, a performance monitoring support library for
  23 * applications on Linux.
  24 *
  25 * This file has been automatically generated.
  26 *
  27 * PMU: snbep_unc_qpi (Intel SandyBridge-EP QPI uncore)
  28 */
  29
  30static const intel_x86_umask_t snbep_unc_q_direct2core[]={
  31  { .uname = "FAILURE_CREDITS",
  32    .udesc  = "Number of spawn failures due to lack of Egress credits",
  33    .ucode  = 0x200,
  34    .uflags = INTEL_X86_NCOMBO,
  35  },
  36  { .uname = "FAILURE_CREDITS_RBT",
  37    .udesc  = "Number of spawn failures due to lack of Egress credit and route-back table (RBT) bit was not set",
  38    .ucode  = 0x800,
  39    .uflags = INTEL_X86_NCOMBO,
  40  },
  41  { .uname = "FAILURE_RBT",
  42    .udesc  = "Number of spawn failures because route-back table (RBT) specified that the transaction should not trigger a direct2core transaction",
  43    .ucode  = 0x400,
  44    .uflags = INTEL_X86_NCOMBO,
  45  },
  46  { .uname = "SUCCESS",
  47    .udesc  = "Number of spawn successes",
  48    .ucode  = 0x100,
  49    .uflags = INTEL_X86_NCOMBO,
  50  },
  51};
  52
  53static const intel_x86_umask_t snbep_unc_q_rxl_credits_consumed_vn0[]={
  54  { .uname = "DRS",
  55    .udesc  = "Number of times VN0 consumed for DRS message class",
  56    .ucode  = 0x100,
  57    .uflags = INTEL_X86_NCOMBO,
  58  },
  59  { .uname = "HOM",
  60    .udesc  = "Number of times VN0 consumed for HOM message class",
  61    .ucode  = 0x800,
  62    .uflags = INTEL_X86_NCOMBO,
  63  },
  64  { .uname = "NCB",
  65    .udesc  = "Number of times VN0 consumed for NCB message class",
  66    .ucode  = 0x200,
  67    .uflags = INTEL_X86_NCOMBO,
  68  },
  69  { .uname = "NCS",
  70    .udesc  = "Number of times VN0 consumed for NCS message class",
  71    .ucode  = 0x400,
  72    .uflags = INTEL_X86_NCOMBO,
  73  },
  74  { .uname = "NDR",
  75    .udesc  = "Number of times VN0 consumed for NDR message class",
  76    .ucode  = 0x2000,
  77    .uflags = INTEL_X86_NCOMBO,
  78  },
  79  { .uname = "SNP",
  80    .udesc  = "Number of times VN0 consumed for SNP message class",
  81    .ucode  = 0x1000,
  82    .uflags = INTEL_X86_NCOMBO,
  83  },
  84};
  85
  86static const intel_x86_umask_t snbep_unc_q_rxl_flits_g0[]={
  87  { .uname = "DATA",
  88    .udesc  = "Number of data flits over QPI",
  89    .ucode  = 0x200,
  90    .uflags = INTEL_X86_NCOMBO,
  91  },
  92  { .uname = "IDLE",
  93    .udesc  = "Number of flits over QPI that do not hold protocol payload",
  94    .ucode  = 0x100,
  95    .uflags = INTEL_X86_NCOMBO,
  96  },
  97  { .uname = "NON_DATA",
  98    .udesc  = "Number of non-NULL non-data flits over QPI",
  99    .ucode  = 0x400,
 100    .uflags = INTEL_X86_NCOMBO,
 101  },
 102};
 103
 104static const intel_x86_umask_t snbep_unc_q_rxl_flits_g1[]={
 105  { .uname = "DRS",
 106    .udesc  = "Number of flits over QPI on the Data Response (DRS) channel",
 107    .ucode  = 0x1800,
 108    .uflags = INTEL_X86_NCOMBO,
 109  },
 110  { .uname = "DRS_DATA",
 111    .udesc  = "Number of data flits over QPI on the Data Response (DRS) channel",
 112    .ucode  = 0x800,
 113    .uflags = INTEL_X86_NCOMBO,
 114  },
 115  { .uname = "DRS_NONDATA",
 116    .udesc  = "Number of protocol flits over QPI on the Data Response (DRS) channel",
 117    .ucode  = 0x1000,
 118    .uflags = INTEL_X86_NCOMBO,
 119  },
 120  { .uname = "HOM",
 121    .udesc  = "Number of flits over QPI on the home channel",
 122    .ucode  = 0x600,
 123    .uflags = INTEL_X86_NCOMBO,
 124  },
 125  { .uname = "HOM_NONREQ",
 126    .udesc  = "Number of non-request flits over QPI on the home channel",
 127    .ucode  = 0x400,
 128    .uflags = INTEL_X86_NCOMBO,
 129  },
 130  { .uname = "HOM_REQ",
 131    .udesc  = "Number of data requests over QPI on the home channel",
 132    .ucode  = 0x200,
 133    .uflags = INTEL_X86_NCOMBO,
 134  },
 135  { .uname = "SNP",
 136    .udesc  = "Number of snoop requests flits over QPI",
 137    .ucode  = 0x100,
 138    .uflags = INTEL_X86_NCOMBO,
 139  },
 140};
 141
 142static const intel_x86_umask_t snbep_unc_q_rxl_flits_g2[]={
 143  { .uname = "NCB",
 144    .udesc  = "Number of non-coherent bypass flits",
 145    .ucode  = 0xc00,
 146    .uflags = INTEL_X86_NCOMBO,
 147  },
 148  { .uname = "NCB_DATA",
 149    .udesc  = "Number of non-coherent data flits",
 150    .ucode  = 0x400,
 151    .uflags = INTEL_X86_NCOMBO,
 152  },
 153  { .uname = "NCB_NONDATA",
 154    .udesc  = "Number of bypass non-data flits",
 155    .ucode  = 0x800,
 156    .uflags = INTEL_X86_NCOMBO,
 157  },
 158  { .uname = "NCS",
 159    .udesc  = "Number of non-coherent standard (NCS) flits",
 160    .ucode  = 0x1000,
 161    .uflags = INTEL_X86_NCOMBO,
 162  },
 163  { .uname = "NDR_AD",
 164    .udesc  = "Number of flits received over Non-data response (NDR) channel",
 165    .ucode  = 0x100,
 166    .uflags = INTEL_X86_NCOMBO,
 167  },
 168  { .uname = "NDR_AK",
 169    .udesc  = "Number of flits received on the Non-data response (NDR) channel)",
 170    .ucode  = 0x200,
 171    .uflags = INTEL_X86_NCOMBO,
 172  },
 173};
 174
 175static const intel_x86_entry_t intel_snbep_unc_q_pe[]={
 176  { .name = "UNC_Q_CLOCKTICKS",
 177    .desc = "Number of qfclks",
 178    .code = 0x14,
 179    .cntmsk = 0xf,
 180    .modmsk = SNBEP_UNC_QPI_ATTRS,
 181  },
 182  { .name = "UNC_Q_CTO_COUNT",
 183    .desc = "Count of CTO Events",
 184    .code = 0x38,
 185    .cntmsk = 0xf,
 186    .modmsk = SNBEP_UNC_QPI_ATTRS,
 187  },
 188  { .name = "UNC_Q_DIRECT2CORE",
 189    .desc = "Direct 2 Core Spawning",
 190    .code = 0x13,
 191    .cntmsk = 0xf,
 192    .ngrp = 1,
 193    .modmsk = SNBEP_UNC_QPI_ATTRS,
 194    .numasks = LIBPFM_ARRAY_SIZE(snbep_unc_q_direct2core),
 195    .umasks  = snbep_unc_q_direct2core
 196  },
 197  { .name = "UNC_Q_L1_POWER_CYCLES",
 198    .desc = "Cycles in L1",
 199    .code = 0x12,
 200    .cntmsk = 0xf,
 201    .modmsk = SNBEP_UNC_QPI_ATTRS,
 202  },
 203  { .name = "UNC_Q_RXL0P_POWER_CYCLES",
 204    .desc = "Cycles in L0p",
 205    .code = 0x10,
 206    .cntmsk = 0xf,
 207    .modmsk = SNBEP_UNC_QPI_ATTRS,
 208  },
 209  { .name = "UNC_Q_RXL0_POWER_CYCLES",
 210    .desc = "Cycles in L0",
 211    .code = 0xf,
 212    .cntmsk = 0xf,
 213    .modmsk = SNBEP_UNC_QPI_ATTRS,
 214  },
 215  { .name = "UNC_Q_RXL_BYPASSED",
 216    .desc = "Rx Flit Buffer Bypassed",
 217    .code = 0x9,
 218    .cntmsk = 0xf,
 219    .modmsk = SNBEP_UNC_QPI_ATTRS,
 220  },
 221  { .name = "UNC_Q_RXL_CREDITS_CONSUMED_VN0",
 222    .desc = "VN0 Credit Consumed",
 223    .code = 0x1e | (1ULL << 21), /* sel_ext */
 224    .cntmsk = 0xf,
 225    .ngrp = 1,
 226    .modmsk = SNBEP_UNC_QPI_ATTRS,
 227    .numasks = LIBPFM_ARRAY_SIZE(snbep_unc_q_rxl_credits_consumed_vn0),
 228    .umasks  = snbep_unc_q_rxl_credits_consumed_vn0
 229  },
 230  { .name = "UNC_Q_RXL_CREDITS_CONSUMED_VNA",
 231    .desc = "VNA Credit Consumed",
 232    .code = 0x1d | (1ULL << 21), /* sel_ext */
 233    .cntmsk = 0xf,
 234    .modmsk = SNBEP_UNC_QPI_ATTRS,
 235  },
 236  { .name = "UNC_Q_RXL_CYCLES_NE",
 237    .desc = "RxQ Cycles Not Empty",
 238    .code = 0xa,
 239    .cntmsk = 0xf,
 240    .modmsk = SNBEP_UNC_QPI_ATTRS,
 241  },
 242  { .name = "UNC_Q_RXL_FLITS_G0",
 243    .desc = "Flits Received - Group 0",
 244    .code = 0x1,
 245    .cntmsk = 0xf,
 246    .ngrp = 1,
 247    .modmsk = SNBEP_UNC_QPI_ATTRS,
 248    .numasks = LIBPFM_ARRAY_SIZE(snbep_unc_q_rxl_flits_g0),
 249    .umasks  = snbep_unc_q_rxl_flits_g0
 250  },
 251  { .name = "UNC_Q_RXL_FLITS_G1",
 252    .desc = "Flits Received - Group 1",
 253    .code = 0x2 | (1ULL << 21), /* sel_ext */
 254    .cntmsk = 0xf,
 255    .ngrp = 1,
 256    .modmsk = SNBEP_UNC_QPI_ATTRS,
 257    .numasks = LIBPFM_ARRAY_SIZE(snbep_unc_q_rxl_flits_g1),
 258    .umasks  = snbep_unc_q_rxl_flits_g1
 259  },
 260
 261  { .name = "UNC_Q_RXL_FLITS_G2",
 262    .desc = "Flits Received - Group 2",
 263    .code = 0x3 | (1ULL << 21), /* sel_ext */
 264    .cntmsk = 0xf,
 265    .ngrp = 1,
 266    .modmsk = SNBEP_UNC_QPI_ATTRS,
 267    .numasks = LIBPFM_ARRAY_SIZE(snbep_unc_q_rxl_flits_g2),
 268    .umasks  = snbep_unc_q_rxl_flits_g2
 269  },
 270  { .name = "UNC_Q_RXL_INSERTS",
 271    .desc = "Rx Flit Buffer Allocations",
 272    .code = 0x8,
 273    .cntmsk = 0xf,
 274    .modmsk = SNBEP_UNC_QPI_ATTRS,
 275  },
 276  { .name = "UNC_Q_RXL_INSERTS_DRS",
 277    .desc = "Rx Flit Buffer Allocations - DRS",
 278    .code = 0x9 | (1ULL << 21), /* sel_ext */
 279    .cntmsk = 0xf,
 280    .modmsk = SNBEP_UNC_QPI_ATTRS,
 281  },
 282  { .name = "UNC_Q_RXL_INSERTS_HOM",
 283    .desc = "Rx Flit Buffer Allocations - HOM",
 284    .code = 0xc | (1ULL << 21), /* sel_ext */
 285    .cntmsk = 0xf,
 286    .modmsk = SNBEP_UNC_QPI_ATTRS,
 287  },
 288  { .name = "UNC_Q_RXL_INSERTS_NCB",
 289    .desc = "Rx Flit Buffer Allocations - NCB",
 290    .code = 0xa | (1ULL << 21), /* sel_ext */
 291    .cntmsk = 0xf,
 292    .modmsk = SNBEP_UNC_QPI_ATTRS,
 293  },
 294  { .name = "UNC_Q_RXL_INSERTS_NCS",
 295    .desc = "Rx Flit Buffer Allocations - NCS",
 296    .code = 0xb | (1ULL << 21), /* sel_ext */
 297    .cntmsk = 0xf,
 298    .modmsk = SNBEP_UNC_QPI_ATTRS,
 299  },
 300  { .name = "UNC_Q_RXL_INSERTS_NDR",
 301    .desc = "Rx Flit Buffer Allocations - NDR",
 302    .code = 0xe | (1ULL << 21), /* sel_ext */
 303    .cntmsk = 0xf,
 304    .modmsk = SNBEP_UNC_QPI_ATTRS,
 305  },
 306  { .name = "UNC_Q_RXL_INSERTS_SNP",
 307    .desc = "Rx Flit Buffer Allocations - SNP",
 308    .code = 0xd | (1ULL << 21), /* sel_ext */
 309    .cntmsk = 0xf,
 310    .modmsk = SNBEP_UNC_QPI_ATTRS,
 311  },
 312  { .name = "UNC_Q_RXL_OCCUPANCY",
 313    .desc = "RxQ Occupancy - All Packets",
 314    .code = 0xb,
 315    .cntmsk = 0xf,
 316    .modmsk = SNBEP_UNC_QPI_ATTRS,
 317  },
 318  { .name = "UNC_Q_RXL_OCCUPANCY_DRS",
 319    .desc = "RxQ Occupancy - DRS",
 320    .code = 0x15 | (1ULL << 21), /* sel_ext */
 321    .cntmsk = 0xf,
 322    .modmsk = SNBEP_UNC_QPI_ATTRS,
 323  },
 324  { .name = "UNC_Q_RXL_OCCUPANCY_HOM",
 325    .desc = "RxQ Occupancy - HOM",
 326    .code = 0x18 | (1ULL << 21), /* sel_ext */
 327    .cntmsk = 0xf,
 328    .modmsk = SNBEP_UNC_QPI_ATTRS,
 329  },
 330  { .name = "UNC_Q_RXL_OCCUPANCY_NCB",
 331    .desc = "RxQ Occupancy - NCB",
 332    .code = 0x16 | (1ULL << 21), /* sel_ext */
 333    .cntmsk = 0xf,
 334    .modmsk = SNBEP_UNC_QPI_ATTRS,
 335  },
 336  { .name = "UNC_Q_RXL_OCCUPANCY_NCS",
 337    .desc = "RxQ Occupancy - NCS",
 338    .code = 0x17 | (1ULL << 21), /* sel_ext */
 339    .cntmsk = 0xf,
 340    .modmsk = SNBEP_UNC_QPI_ATTRS,
 341  },
 342  { .name = "UNC_Q_RXL_OCCUPANCY_NDR",
 343    .desc = "RxQ Occupancy - NDR",
 344    .code = 0x1a | (1ULL << 21), /* sel_ext */
 345    .cntmsk = 0xf,
 346    .modmsk = SNBEP_UNC_QPI_ATTRS,
 347  },
 348  { .name = "UNC_Q_RXL_OCCUPANCY_SNP",
 349    .desc = "RxQ Occupancy - SNP",
 350    .code = 0x19 | (1ULL << 21), /* sel_ext */
 351    .cntmsk = 0xf,
 352    .modmsk = SNBEP_UNC_QPI_ATTRS,
 353  },
 354  { .name = "UNC_Q_TXL0P_POWER_CYCLES",
 355    .desc = "Cycles in L0p",
 356    .code = 0xd,
 357    .cntmsk = 0xf,
 358    .modmsk = SNBEP_UNC_QPI_ATTRS,
 359  },
 360  { .name = "UNC_Q_TXL0_POWER_CYCLES",
 361    .desc = "Cycles in L0",
 362    .code = 0xc,
 363    .cntmsk = 0xf,
 364    .modmsk = SNBEP_UNC_QPI_ATTRS,
 365  },
 366  { .name = "UNC_Q_TXL_BYPASSED",
 367    .desc = "Tx Flit Buffer Bypassed",
 368    .code = 0x5,
 369    .cntmsk = 0xf,
 370    .modmsk = SNBEP_UNC_QPI_ATTRS,
 371  },
 372  { .name = "UNC_Q_TXL_CYCLES_NE",
 373    .desc = "Tx Flit Buffer Cycles not Empty",
 374    .code = 0x6,
 375    .cntmsk = 0xf,
 376    .modmsk = SNBEP_UNC_QPI_ATTRS,
 377  },
 378  { .name = "UNC_Q_TXL_FLITS_G0",
 379    .desc = "Flits Transferred - Group 0",
 380    .code = 0x0,
 381    .cntmsk = 0xf,
 382    .ngrp = 1,
 383    .modmsk = SNBEP_UNC_QPI_ATTRS,
 384    .numasks = LIBPFM_ARRAY_SIZE(snbep_unc_q_rxl_flits_g0),
 385    .umasks  = snbep_unc_q_rxl_flits_g0 /* shared with rxl_flits_g0 */
 386  },
 387  { .name = "UNC_Q_TXL_FLITS_G1",
 388    .desc = "Flits Transferred - Group 1",
 389    .code = 0x0 | (1ULL << 21), /* sel_ext */
 390    .cntmsk = 0xf,
 391    .ngrp = 1,
 392    .modmsk = SNBEP_UNC_QPI_ATTRS,
 393    .numasks = LIBPFM_ARRAY_SIZE(snbep_unc_q_rxl_flits_g1),
 394    .umasks  = snbep_unc_q_rxl_flits_g1 /* shared with rxl_flits_g1 */
 395  },
 396  { .name = "UNC_Q_TXL_FLITS_G2",
 397    .desc = "Flits Transferred - Group 2",
 398    .code = 0x1 | (1ULL << 21), /* sel_ext */
 399    .cntmsk = 0xf,
 400    .ngrp = 1,
 401    .modmsk = SNBEP_UNC_QPI_ATTRS,
 402    .numasks = LIBPFM_ARRAY_SIZE(snbep_unc_q_rxl_flits_g2),
 403    .umasks  = snbep_unc_q_rxl_flits_g2 /* shared with rxl_flits_g2 */
 404  },
 405  { .name = "UNC_Q_TXL_INSERTS",
 406    .desc = "Tx Flit Buffer Allocations",
 407    .code = 0x4,
 408    .cntmsk = 0xf,
 409    .modmsk = SNBEP_UNC_QPI_ATTRS,
 410  },
 411  { .name = "UNC_Q_TXL_OCCUPANCY",
 412    .desc = "Tx Flit Buffer Occupancy",
 413    .code = 0x7,
 414    .cntmsk = 0xf,
 415    .modmsk = SNBEP_UNC_QPI_ATTRS,
 416  },
 417  { .name = "UNC_Q_VNA_CREDIT_RETURNS",
 418    .desc = "VNA Credits Returned",
 419    .code = 0x1c | (1ULL << 21), /* sel_ext */
 420    .cntmsk = 0xf,
 421    .modmsk = SNBEP_UNC_QPI_ATTRS,
 422  },
 423  { .name = "UNC_Q_VNA_CREDIT_RETURN_OCCUPANCY",
 424    .desc = "VNA Credits Pending Return - Occupancy",
 425    .code = 0x1b | (1ULL << 21), /* sel_ext */
 426    .cntmsk = 0xf,
 427    .modmsk = SNBEP_UNC_QPI_ATTRS,
 428  },
 429};
 430