akaros/kern/arch/x86/time.h
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   1/* Copyright (c) 2009 The Regents of the University of California
   2 * David (Yu) Zhu <yuzhu@cs.berkeley.edu>
   3 * Barret Rhoden <brho@cs.berkeley.edu>
   4 *
   5 * See LICENSE for details. */
   6
   7#pragma once
   8
   9// PIT (Programmable Interval Timer)
  10#define TIMER_REG_CNTR0 0       /* timer counter 0 port */
  11#define TIMER_REG_CNTR1 1       /* timer counter 1 port */
  12#define TIMER_REG_CNTR2 2       /* timer counter 2 port */
  13#define TIMER_REG_MODE  3       /* timer mode port */
  14#define TIMER_SEL0      0x00    /* select counter 0 */
  15#define TIMER_SEL1      0x40    /* select counter 1 */
  16#define TIMER_SEL2      0x80    /* select counter 2 */
  17#define TIMER_INTTC     0x00    /* mode 0, intr on terminal cnt */
  18#define TIMER_ONESHOT   0x02    /* mode 1, one shot */
  19#define TIMER_RATEGEN   0x04    /* mode 2, rate generator */
  20#define TIMER_SQWAVE    0x06    /* mode 3, square wave */
  21#define TIMER_SWSTROBE  0x08    /* mode 4, s/w triggered strobe */
  22#define TIMER_HWSTROBE  0x0a    /* mode 5, h/w triggered strobe */
  23#define TIMER_LATCH     0x00    /* latch counter for reading */
  24#define TIMER_LSB       0x10    /* r/w counter LSB */
  25#define TIMER_MSB       0x20    /* r/w counter MSB */
  26#define TIMER_16BIT     0x30    /* r/w counter 16 bits, LSB first */
  27#define TIMER_BCD       0x01    /* count in BCD */
  28
  29#define PIT_FREQ                                        1193182
  30
  31#define IO_TIMER1   0x40        /* 8253 Timer #1 */
  32#define TIMER_CNTR0 (IO_TIMER1 + TIMER_REG_CNTR0)
  33#define TIMER_CNTR1 (IO_TIMER1 + TIMER_REG_CNTR1)
  34#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2)
  35#define TIMER_MODE  (IO_TIMER1 + TIMER_REG_MODE)
  36
  37// PIT related
  38void pit_set_timer(uint32_t freq, uint32_t mode);
  39void timer_init(void);
  40void udelay_pit(uint64_t usec);
  41// TODO: right now timer defaults to TSC
  42uint64_t gettimer(void);
  43uint64_t getfreq(void);
  44