akaros/kern/arch/x86/ros/vmx.h
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   1/*
   2 * vmx.h: VMX Architecture related definitions
   3 * Copyright (c) 2004, Intel Corporation.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms and conditions of the GNU General Public License,
   7 * version 2, as published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * You should have received a copy of the GNU General Public License along with
  15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  16 * Place - Suite 330, Boston, MA 02111-1307 USA.
  17 *
  18 * A few random additions are:
  19 * Copyright (C) 2006 Qumranet
  20 *    Avi Kivity <avi@qumranet.com>
  21 *    Yaniv Kamay <yaniv@qumranet.com>
  22 *
  23 */
  24#pragma once
  25
  26#include <ros/common.h>
  27#include <ros/arch/mmu.h>
  28
  29#define CPU_BASED_VIRTUAL_INTR_PENDING  0x00000004
  30#define CPU_BASED_USE_TSC_OFFSETING     0x00000008
  31#define CPU_BASED_HLT_EXITING           0x00000080
  32#define CPU_BASED_INVDPG_EXITING        0x00000200
  33#define CPU_BASED_MWAIT_EXITING         0x00000400
  34#define CPU_BASED_RDPMC_EXITING         0x00000800
  35#define CPU_BASED_RDTSC_EXITING         0x00001000
  36#define CPU_BASED_CR8_LOAD_EXITING      0x00080000
  37#define CPU_BASED_CR8_STORE_EXITING     0x00100000
  38#define CPU_BASED_TPR_SHADOW            0x00200000
  39#define CPU_BASED_MOV_DR_EXITING        0x00800000
  40#define CPU_BASED_UNCOND_IO_EXITING     0x01000000
  41#define CPU_BASED_ACTIVATE_IO_BITMAP    0x02000000
  42#define CPU_BASED_MSR_BITMAPS           0x10000000
  43#define CPU_BASED_MONITOR_EXITING       0x20000000
  44#define CPU_BASED_PAUSE_EXITING         0x40000000
  45
  46/*
  47 * Definitions of Primary Processor-Based VM-Execution Controls.
  48 */
  49#define CPU_BASED_VIRTUAL_INTR_PENDING          0x00000004
  50#define CPU_BASED_USE_TSC_OFFSETING             0x00000008
  51#define CPU_BASED_HLT_EXITING                   0x00000080
  52#define CPU_BASED_INVLPG_EXITING                0x00000200
  53#define CPU_BASED_MWAIT_EXITING                 0x00000400
  54#define CPU_BASED_RDPMC_EXITING                 0x00000800
  55#define CPU_BASED_RDTSC_EXITING                 0x00001000
  56#define CPU_BASED_CR3_LOAD_EXITING              0x00008000
  57#define CPU_BASED_CR3_STORE_EXITING             0x00010000
  58#define CPU_BASED_CR8_LOAD_EXITING              0x00080000
  59#define CPU_BASED_CR8_STORE_EXITING             0x00100000
  60#define CPU_BASED_TPR_SHADOW                    0x00200000
  61#define CPU_BASED_VIRTUAL_NMI_PENDING           0x00400000
  62#define CPU_BASED_MOV_DR_EXITING                0x00800000
  63#define CPU_BASED_UNCOND_IO_EXITING             0x01000000
  64#define CPU_BASED_USE_IO_BITMAPS                0x02000000
  65#define CPU_BASED_MONITOR_TRAP                  0x08000000
  66#define CPU_BASED_USE_MSR_BITMAPS               0x10000000
  67#define CPU_BASED_MONITOR_EXITING               0x20000000
  68#define CPU_BASED_PAUSE_EXITING                 0x40000000
  69#define CPU_BASED_ACTIVATE_SECONDARY_CONTROLS   0x80000000
  70/*
  71 * Definitions of Secondary Processor-Based VM-Execution Controls.
  72 */
  73#define SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES 0x00000001
  74#define SECONDARY_EXEC_ENABLE_EPT               0x00000002
  75#define SECONDARY_EXEC_DESCRIPTOR_EXITING       0x00000004
  76#define SECONDARY_EXEC_RDTSCP                   0x00000008
  77#define SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE   0x00000010
  78#define SECONDARY_EXEC_ENABLE_VPID              0x00000020
  79#define SECONDARY_EXEC_WBINVD_EXITING           0x00000040
  80#define SECONDARY_EXEC_UNRESTRICTED_GUEST       0x00000080
  81#define SECONDARY_EXEC_APIC_REGISTER_VIRT       0x00000100
  82#define SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY    0x00000200
  83#define SECONDARY_EXEC_PAUSE_LOOP_EXITING       0x00000400
  84#define SECONDARY_EXEC_RDRAND_EXITING           0x00000800
  85#define SECONDARY_EXEC_ENABLE_INVPCID           0x00001000
  86#define SECONDARY_EXEC_ENABLE_VMFUNC            0x00002000
  87#define SECONDARY_EXEC_SHADOW_VMCS              0x00004000
  88#define SECONDARY_EXEC_RDSEED_EXITING           0x00010000
  89#define SECONDARY_EXEC_ENABLE_PML               0x00020000
  90#define SECONDARY_EPT_VE                        0x00040000
  91#define SECONDARY_ENABLE_XSAV_RESTORE           0x00100000
  92#define SECONDARY_EXEC_TSC_SCALING              0x02000000
  93
  94#define PIN_BASED_EXT_INTR_MASK                 0x00000001
  95#define PIN_BASED_NMI_EXITING                   0x00000008
  96#define PIN_BASED_VIRTUAL_NMIS                  0x00000020
  97#define PIN_BASED_VMX_PREEMPTION_TIMER          0x00000040
  98#define PIN_BASED_POSTED_INTR                   0x00000080
  99
 100#define VM_EXIT_SAVE_DEBUG_CONTROLS             0x00000004
 101#define VM_EXIT_HOST_ADDR_SPACE_SIZE            0x00000200
 102#define VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL      0x00001000
 103#define VM_EXIT_ACK_INTR_ON_EXIT                0x00008000
 104#define VM_EXIT_SAVE_IA32_PAT                   0x00040000
 105#define VM_EXIT_LOAD_IA32_PAT                   0x00080000
 106#define VM_EXIT_SAVE_IA32_EFER                  0x00100000
 107#define VM_EXIT_LOAD_IA32_EFER                  0x00200000
 108#define VM_EXIT_SAVE_VMX_PREEMPTION_TIMER       0x00400000
 109
 110#define VM_ENTRY_LOAD_DEBUG_CONTROLS            0x00000004
 111#define VM_ENTRY_IA32E_MODE                     0x00000200
 112#define VM_ENTRY_SMM                            0x00000400
 113#define VM_ENTRY_DEACT_DUAL_MONITOR             0x00000800
 114#define VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL     0x00002000
 115#define VM_ENTRY_LOAD_IA32_PAT                  0x00004000
 116#define VM_ENTRY_LOAD_IA32_EFER                 0x00008000
 117
 118/* VMCS Encodings */
 119enum vmcs_field {
 120        VIRTUAL_PROCESSOR_ID            = 0x00000000,
 121        POSTED_NOTIFICATION_VEC         = 0x00000002,
 122        GUEST_ES_SELECTOR               = 0x00000800,
 123        GUEST_CS_SELECTOR               = 0x00000802,
 124        GUEST_SS_SELECTOR               = 0x00000804,
 125        GUEST_DS_SELECTOR               = 0x00000806,
 126        GUEST_FS_SELECTOR               = 0x00000808,
 127        GUEST_GS_SELECTOR               = 0x0000080a,
 128        GUEST_LDTR_SELECTOR             = 0x0000080c,
 129        GUEST_TR_SELECTOR               = 0x0000080e,
 130        GUEST_INTR_STATUS               = 0x00000810,
 131        GUEST_PML_INDEX                 = 0x00000812,
 132        HOST_ES_SELECTOR                = 0x00000c00,
 133        HOST_CS_SELECTOR                = 0x00000c02,
 134        HOST_SS_SELECTOR                = 0x00000c04,
 135        HOST_DS_SELECTOR                = 0x00000c06,
 136        HOST_FS_SELECTOR                = 0x00000c08,
 137        HOST_GS_SELECTOR                = 0x00000c0a,
 138        HOST_TR_SELECTOR                = 0x00000c0c,
 139        IO_BITMAP_A                     = 0x00002000,
 140        IO_BITMAP_A_HIGH                = 0x00002001,
 141        IO_BITMAP_B                     = 0x00002002,
 142        IO_BITMAP_B_HIGH                = 0x00002003,
 143        MSR_BITMAP                      = 0x00002004,
 144        MSR_BITMAP_HIGH                 = 0x00002005,
 145        VM_EXIT_MSR_STORE_ADDR          = 0x00002006,
 146        VM_EXIT_MSR_STORE_ADDR_HIGH     = 0x00002007,
 147        VM_EXIT_MSR_LOAD_ADDR           = 0x00002008,
 148        VM_EXIT_MSR_LOAD_ADDR_HIGH      = 0x00002009,
 149        VM_ENTRY_MSR_LOAD_ADDR          = 0x0000200a,
 150        VM_ENTRY_MSR_LOAD_ADDR_HIGH     = 0x0000200b,
 151        TSC_OFFSET                      = 0x00002010,
 152        TSC_OFFSET_HIGH                 = 0x00002011,
 153        VIRTUAL_APIC_PAGE_ADDR          = 0x00002012,
 154        VIRTUAL_APIC_PAGE_ADDR_HIGH     = 0x00002013,
 155        APIC_ACCESS_ADDR                = 0x00002014,
 156        APIC_ACCESS_ADDR_HIGH           = 0x00002015,
 157        POSTED_INTR_DESC_ADDR           = 0x00002016,
 158        POSTED_INTR_DESC_ADDR_HIGH      = 0x00002017,
 159        EPT_POINTER                     = 0x0000201a,
 160        EPT_POINTER_HIGH                = 0x0000201b,
 161        EOI_EXIT_BITMAP0                = 0x0000201c,
 162        EOI_EXIT_BITMAP0_HIGH           = 0x0000201d,
 163        EOI_EXIT_BITMAP1                = 0x0000201e,
 164        EOI_EXIT_BITMAP1_HIGH           = 0x0000201f,
 165        EOI_EXIT_BITMAP2                = 0x00002020,
 166        EOI_EXIT_BITMAP2_HIGH           = 0x00002021,
 167        EOI_EXIT_BITMAP3                = 0x00002022,
 168        EOI_EXIT_BITMAP3_HIGH           = 0x00002023,
 169        VMREAD_BITMAP                   = 0x00002026,
 170        VMWRITE_BITMAP                  = 0x00002028,
 171        XSS_EXIT_BITMAP                 = 0x0000202C,
 172        XSS_EXIT_BITMAP_HIGH            = 0x0000202D,
 173        GUEST_PHYSICAL_ADDRESS          = 0x00002400,
 174        GUEST_PHYSICAL_ADDRESS_HIGH     = 0x00002401,
 175        VMCS_LINK_POINTER               = 0x00002800,
 176        VMCS_LINK_POINTER_HIGH          = 0x00002801,
 177        GUEST_IA32_DEBUGCTL             = 0x00002802,
 178        GUEST_IA32_DEBUGCTL_HIGH        = 0x00002803,
 179        GUEST_IA32_PAT                  = 0x00002804,
 180        GUEST_IA32_PAT_HIGH             = 0x00002805,
 181        GUEST_IA32_EFER                 = 0x00002806,
 182        GUEST_IA32_EFER_HIGH            = 0x00002807,
 183        GUEST_IA32_PERF_GLOBAL_CTRL     = 0x00002808,
 184        GUEST_IA32_PERF_GLOBAL_CTRL_HIGH= 0x00002809,
 185        GUEST_PDPTR0                    = 0x0000280a,
 186        GUEST_PDPTR0_HIGH               = 0x0000280b,
 187        GUEST_PDPTR1                    = 0x0000280c,
 188        GUEST_PDPTR1_HIGH               = 0x0000280d,
 189        GUEST_PDPTR2                    = 0x0000280e,
 190        GUEST_PDPTR2_HIGH               = 0x0000280f,
 191        GUEST_PDPTR3                    = 0x00002810,
 192        GUEST_PDPTR3_HIGH               = 0x00002811,
 193        HOST_IA32_PAT                   = 0x00002c00,
 194        HOST_IA32_PAT_HIGH              = 0x00002c01,
 195        HOST_IA32_EFER                  = 0x00002c02,
 196        HOST_IA32_EFER_HIGH             = 0x00002c03,
 197        HOST_IA32_PERF_GLOBAL_CTRL      = 0x00002c04,
 198        HOST_IA32_PERF_GLOBAL_CTRL_HIGH = 0x00002c05,
 199        PIN_BASED_VM_EXEC_CONTROL       = 0x00004000,
 200        CPU_BASED_VM_EXEC_CONTROL       = 0x00004002,
 201        EXCEPTION_BITMAP                = 0x00004004,
 202        PAGE_FAULT_ERROR_CODE_MASK      = 0x00004006,
 203        PAGE_FAULT_ERROR_CODE_MATCH     = 0x00004008,
 204        CR3_TARGET_COUNT                = 0x0000400a,
 205        VM_EXIT_CONTROLS                = 0x0000400c,
 206        VM_EXIT_MSR_STORE_COUNT         = 0x0000400e,
 207        VM_EXIT_MSR_LOAD_COUNT          = 0x00004010,
 208        VM_ENTRY_CONTROLS               = 0x00004012,
 209        VM_ENTRY_MSR_LOAD_COUNT         = 0x00004014,
 210        VM_ENTRY_INTR_INFO_FIELD        = 0x00004016,
 211        VM_ENTRY_EXCEPTION_ERROR_CODE   = 0x00004018,
 212        VM_ENTRY_INSTRUCTION_LEN        = 0x0000401a,
 213        TPR_THRESHOLD                   = 0x0000401c,
 214        SECONDARY_VM_EXEC_CONTROL       = 0x0000401e,
 215        PLE_GAP                         = 0x00004020,
 216        PLE_WINDOW                      = 0x00004022,
 217        VM_INSTRUCTION_ERROR            = 0x00004400,
 218        VM_EXIT_REASON                  = 0x00004402,
 219        VM_EXIT_INTR_INFO               = 0x00004404,
 220        VM_EXIT_INTR_ERROR_CODE         = 0x00004406,
 221        IDT_VECTORING_INFO_FIELD        = 0x00004408,
 222        IDT_VECTORING_ERROR_CODE        = 0x0000440a,
 223        VM_EXIT_INSTRUCTION_LEN         = 0x0000440c,
 224        VMX_INSTRUCTION_INFO            = 0x0000440e,
 225        GUEST_ES_LIMIT                  = 0x00004800,
 226        GUEST_CS_LIMIT                  = 0x00004802,
 227        GUEST_SS_LIMIT                  = 0x00004804,
 228        GUEST_DS_LIMIT                  = 0x00004806,
 229        GUEST_FS_LIMIT                  = 0x00004808,
 230        GUEST_GS_LIMIT                  = 0x0000480a,
 231        GUEST_LDTR_LIMIT                = 0x0000480c,
 232        GUEST_TR_LIMIT                  = 0x0000480e,
 233        GUEST_GDTR_LIMIT                = 0x00004810,
 234        GUEST_IDTR_LIMIT                = 0x00004812,
 235        GUEST_ES_AR_BYTES               = 0x00004814,
 236        GUEST_CS_AR_BYTES               = 0x00004816,
 237        GUEST_SS_AR_BYTES               = 0x00004818,
 238        GUEST_DS_AR_BYTES               = 0x0000481a,
 239        GUEST_FS_AR_BYTES               = 0x0000481c,
 240        GUEST_GS_AR_BYTES               = 0x0000481e,
 241        GUEST_LDTR_AR_BYTES             = 0x00004820,
 242        GUEST_TR_AR_BYTES               = 0x00004822,
 243        GUEST_INTERRUPTIBILITY_INFO     = 0x00004824,
 244        GUEST_ACTIVITY_STATE            = 0X00004826,
 245        GUEST_SYSENTER_CS               = 0x0000482A,
 246        HOST_IA32_SYSENTER_CS           = 0x00004c00,
 247        CR0_GUEST_HOST_MASK             = 0x00006000,
 248        CR4_GUEST_HOST_MASK             = 0x00006002,
 249        CR0_READ_SHADOW                 = 0x00006004,
 250        CR4_READ_SHADOW                 = 0x00006006,
 251        CR3_TARGET_VALUE0               = 0x00006008,
 252        CR3_TARGET_VALUE1               = 0x0000600a,
 253        CR3_TARGET_VALUE2               = 0x0000600c,
 254        CR3_TARGET_VALUE3               = 0x0000600e,
 255        EXIT_QUALIFICATION              = 0x00006400,
 256        GUEST_LINEAR_ADDRESS            = 0x0000640a,
 257        GUEST_CR0                       = 0x00006800,
 258        GUEST_CR3                       = 0x00006802,
 259        GUEST_CR4                       = 0x00006804,
 260        GUEST_ES_BASE                   = 0x00006806,
 261        GUEST_CS_BASE                   = 0x00006808,
 262        GUEST_SS_BASE                   = 0x0000680a,
 263        GUEST_DS_BASE                   = 0x0000680c,
 264        GUEST_FS_BASE                   = 0x0000680e,
 265        GUEST_GS_BASE                   = 0x00006810,
 266        GUEST_LDTR_BASE                 = 0x00006812,
 267        GUEST_TR_BASE                   = 0x00006814,
 268        GUEST_GDTR_BASE                 = 0x00006816,
 269        GUEST_IDTR_BASE                 = 0x00006818,
 270        GUEST_DR7                       = 0x0000681a,
 271        GUEST_RSP                       = 0x0000681c,
 272        GUEST_RIP                       = 0x0000681e,
 273        GUEST_RFLAGS                    = 0x00006820,
 274        GUEST_PENDING_DBG_EXCEPTIONS    = 0x00006822,
 275        GUEST_SYSENTER_ESP              = 0x00006824,
 276        GUEST_SYSENTER_EIP              = 0x00006826,
 277        HOST_CR0                        = 0x00006c00,
 278        HOST_CR3                        = 0x00006c02,
 279        HOST_CR4                        = 0x00006c04,
 280        HOST_FS_BASE                    = 0x00006c06,
 281        HOST_GS_BASE                    = 0x00006c08,
 282        HOST_TR_BASE                    = 0x00006c0a,
 283        HOST_GDTR_BASE                  = 0x00006c0c,
 284        HOST_IDTR_BASE                  = 0x00006c0e,
 285        HOST_IA32_SYSENTER_ESP          = 0x00006c10,
 286        HOST_IA32_SYSENTER_EIP          = 0x00006c12,
 287        HOST_RSP                        = 0x00006c14,
 288        HOST_RIP                        = 0x00006c16,
 289};
 290
 291#define VMX_EXIT_REASONS_FAILED_VMENTRY         0x80000000
 292
 293#define EXIT_REASON_EXCEPTION_NMI       0
 294#define EXIT_REASON_EXTERNAL_INTERRUPT  1
 295#define EXIT_REASON_TRIPLE_FAULT        2
 296#define EXIT_REASON_INIT_SIGNAL         3
 297#define EXIT_REASON_START_UP_IPI        4
 298#define EXIT_REASON_IO_SM_INTERRUPT     5
 299#define EXIT_REASON_OTHER_SMI           6
 300#define EXIT_REASON_PENDING_INTERRUPT   7
 301#define EXIT_REASON_INTERRUPT_WINDOW    7
 302#define EXIT_REASON_NMI_WINDOW          8
 303#define EXIT_REASON_TASK_SWITCH         9
 304#define EXIT_REASON_CPUID               10
 305#define EXIT_REASON_GETSEC              11
 306#define EXIT_REASON_HLT                 12
 307#define EXIT_REASON_INVD                13
 308#define EXIT_REASON_INVLPG              14
 309#define EXIT_REASON_RDPMC               15
 310#define EXIT_REASON_RDTSC               16
 311#define EXIT_REASON_RSM                 17
 312#define EXIT_REASON_VMCALL              18
 313#define EXIT_REASON_VMCLEAR             19
 314#define EXIT_REASON_VMLAUNCH            20
 315#define EXIT_REASON_VMPTRLD             21
 316#define EXIT_REASON_VMPTRST             22
 317#define EXIT_REASON_VMREAD              23
 318#define EXIT_REASON_VMRESUME            24
 319#define EXIT_REASON_VMWRITE             25
 320#define EXIT_REASON_VMOFF               26
 321#define EXIT_REASON_VMON                27
 322#define EXIT_REASON_CR_ACCESS           28
 323#define EXIT_REASON_DR_ACCESS           29
 324#define EXIT_REASON_IO_INSTRUCTION      30
 325#define EXIT_REASON_MSR_READ            31
 326#define EXIT_REASON_MSR_WRITE           32
 327#define EXIT_REASON_INVALID_STATE       33
 328#define EXIT_REASON_ENTRY_MSR_LOADING   34
 329#define EXIT_REASON_MWAIT_INSTRUCTION   36
 330#define EXIT_REASON_MONITOR_TRAP_FLAG   37
 331#define EXIT_REASON_MONITOR_INSTRUCTION 39
 332#define EXIT_REASON_PAUSE_INSTRUCTION   40
 333#define EXIT_REASON_MCE_DURING_VMENTRY  41
 334#define EXIT_REASON_TPR_BELOW_THRESHOLD 43
 335#define EXIT_REASON_APIC_ACCESS         44
 336#define EXIT_REASON_VIRTUALIZED_EOI     45
 337#define EXIT_REASON_GDTR_IDTR_ACCESS    46
 338#define EXIT_REASON_LDTR_TR_ACCESS      47
 339#define EXIT_REASON_EPT_VIOLATION       48
 340#define EXIT_REASON_EPT_MISCONFIG       49
 341#define EXIT_REASON_INVEPT              50
 342#define EXIT_REASON_RDTSCP              51
 343#define EXIT_REASON_VMX_TIMER_EXPIRED   52
 344#define EXIT_REASON_INVVPID             53
 345#define EXIT_REASON_WBINVD              54
 346#define EXIT_REASON_XSETBV              55
 347#define EXIT_REASON_APIC_WRITE          56
 348#define EXIT_REASON_RDRAND              57
 349#define EXIT_REASON_INVPCID             58
 350#define EXIT_REASON_VMFUNC              59
 351#define EXIT_REASON_RDSEED              61
 352#define EXIT_REASON_XSAVES              63
 353#define EXIT_REASON_XRSTORS             64
 354/* Non-standard exit reasons */
 355#define EXIT_REASON_GUEST_IN_USE        257
 356#define EXIT_REASON_VMENTER_FAILED      258
 357
 358#define VMX_EXIT_REASONS \
 359        [EXIT_REASON_EXCEPTION_NMI]         "EXCEPTION_NMI", \
 360        [EXIT_REASON_EXTERNAL_INTERRUPT]    "EXTERNAL_INTERRUPT", \
 361        [EXIT_REASON_TRIPLE_FAULT]          "TRIPLE_FAULT", \
 362        [EXIT_REASON_PENDING_INTERRUPT]     "PENDING_INTERRUPT", \
 363        [EXIT_REASON_NMI_WINDOW]            "NMI_WINDOW", \
 364        [EXIT_REASON_TASK_SWITCH]           "TASK_SWITCH", \
 365        [EXIT_REASON_CPUID]                 "CPUID", \
 366        [EXIT_REASON_HLT]                   "HLT", \
 367        [EXIT_REASON_INVLPG]                "INVLPG", \
 368        [EXIT_REASON_RDPMC]                 "RDPMC", \
 369        [EXIT_REASON_RDTSC]                 "RDTSC", \
 370        [EXIT_REASON_VMCALL]                "VMCALL", \
 371        [EXIT_REASON_VMCLEAR]               "VMCLEAR", \
 372        [EXIT_REASON_VMLAUNCH]              "VMLAUNCH", \
 373        [EXIT_REASON_VMPTRLD]               "VMPTRLD", \
 374        [EXIT_REASON_VMPTRST]               "VMPTRST", \
 375        [EXIT_REASON_VMREAD]                "VMREAD", \
 376        [EXIT_REASON_VMRESUME]              "VMRESUME", \
 377        [EXIT_REASON_VMWRITE]               "VMWRITE", \
 378        [EXIT_REASON_VMOFF]                 "VMOFF", \
 379        [EXIT_REASON_VMON]                  "VMON", \
 380        [EXIT_REASON_CR_ACCESS]             "CR_ACCESS", \
 381        [EXIT_REASON_DR_ACCESS]             "DR_ACCESS", \
 382        [EXIT_REASON_IO_INSTRUCTION]        "IO_INSTRUCTION", \
 383        [EXIT_REASON_MSR_READ]              "MSR_READ", \
 384        [EXIT_REASON_MSR_WRITE]             "MSR_WRITE", \
 385        [EXIT_REASON_MWAIT_INSTRUCTION]     "MWAIT_INSTRUCTION", \
 386        [EXIT_REASON_MONITOR_INSTRUCTION]   "MONITOR_INSTRUCTION", \
 387        [EXIT_REASON_PAUSE_INSTRUCTION]     "PAUSE_INSTRUCTION", \
 388        [EXIT_REASON_MCE_DURING_VMENTRY]    "MCE_DURING_VMENTRY", \
 389        [EXIT_REASON_TPR_BELOW_THRESHOLD]   "TPR_BELOW_THRESHOLD", \
 390        [EXIT_REASON_APIC_ACCESS]           "APIC_ACCESS", \
 391        [EXIT_REASON_EPT_VIOLATION]         "EPT_VIOLATION", \
 392        [EXIT_REASON_EPT_MISCONFIG]         "EPT_MISCONFIG", \
 393        [EXIT_REASON_WBINVD]                "WBINVD", \
 394        [EXIT_REASON_GUEST_IN_USE]          "GUEST_IN_USE", \
 395        [EXIT_REASON_VMENTER_FAILED]        "VMENTER_FAILED"
 396
 397/*
 398 * Interruption-information format
 399 */
 400#define INTR_INFO_VECTOR_MASK           0xff            /* 7:0 */
 401#define INTR_INFO_INTR_TYPE_MASK        0x700           /* 10:8 */
 402#define INTR_INFO_DELIVER_CODE_MASK     0x800           /* 11 */
 403#define INTR_INFO_UNBLOCK_NMI           0x1000          /* 12 */
 404#define INTR_INFO_VALID_MASK            0x80000000      /* 31 */
 405#define INTR_INFO_RESVD_BITS_MASK       0x7ffff000
 406
 407#define VECTORING_INFO_VECTOR_MASK              INTR_INFO_VECTOR_MASK
 408#define VECTORING_INFO_TYPE_MASK                INTR_INFO_INTR_TYPE_MASK
 409#define VECTORING_INFO_DELIEVER_CODE_MASK       INTR_INFO_DELIEVER_CODE_MASK
 410#define VECTORING_INFO_VALID_MASK               INTR_INFO_VALID_MASK
 411
 412#define INTR_TYPE_EXT_INTR              (0 << 8) /* external interrupt */
 413#define INTR_TYPE_NMI_INTR              (2 << 8) /* NMI */
 414#define INTR_TYPE_HARD_EXCEPTION        (3 << 8) /* processor exception */
 415#define INTR_TYPE_EXCEPTION             (3 << 8)       /* processor exception */
 416#define INTR_TYPE_SOFT_INTR             (4 << 8) /* software interrupt */
 417#define INTR_TYPE_SOFT_EXCEPTION        (6 << 8) /* software exception */
 418
 419#define VMX_POSTED_OUTSTANDING_NOTIF            256
 420
 421/* GUEST_INTERRUPTIBILITY_INFO flags. */
 422#define GUEST_INTR_STATE_STI            0x00000001
 423#define GUEST_INTR_STATE_MOV_SS         0x00000002
 424#define GUEST_INTR_STATE_SMI            0x00000004
 425#define GUEST_INTR_STATE_NMI            0x00000008
 426
 427/* GUEST_ACTIVITY_STATE flags */
 428#define GUEST_ACTIVITY_ACTIVE           0
 429#define GUEST_ACTIVITY_HLT              1
 430#define GUEST_ACTIVITY_SHUTDOWN         2
 431#define GUEST_ACTIVITY_WAIT_SIPI        3
 432
 433/*
 434 * Exit Qualifications for MOV for Control Register Access
 435 */
 436#define CONTROL_REG_ACCESS_NUM          0x7     /* 2:0, number of control register */
 437#define CONTROL_REG_ACCESS_TYPE         0x30    /* 5:4, access type */
 438#define CONTROL_REG_ACCESS_REG          0xf00   /* 10:8, general purpose register */
 439#define LMSW_SOURCE_DATA_SHIFT 16
 440#define LMSW_SOURCE_DATA  (0xFFFF << LMSW_SOURCE_DATA_SHIFT)    /* 16:31 lmsw source */
 441#define REG_EAX                         (0 << 8)
 442#define REG_ECX                         (1 << 8)
 443#define REG_EDX                         (2 << 8)
 444#define REG_EBX                         (3 << 8)
 445#define REG_ESP                         (4 << 8)
 446#define REG_EBP                         (5 << 8)
 447#define REG_ESI                         (6 << 8)
 448#define REG_EDI                         (7 << 8)
 449#define REG_R8                         (8 << 8)
 450#define REG_R9                         (9 << 8)
 451#define REG_R10                        (10 << 8)
 452#define REG_R11                        (11 << 8)
 453#define REG_R12                        (12 << 8)
 454#define REG_R13                        (13 << 8)
 455#define REG_R14                        (14 << 8)
 456#define REG_R15                        (15 << 8)
 457
 458/*
 459 * Exit Qualifications for MOV for Debug Register Access
 460 */
 461#define DEBUG_REG_ACCESS_NUM            0x7     /* 2:0, number of debug register */
 462#define DEBUG_REG_ACCESS_TYPE           0x10    /* 4, direction of access */
 463#define TYPE_MOV_TO_DR                  (0 << 4)
 464#define TYPE_MOV_FROM_DR                (1 << 4)
 465#define DEBUG_REG_ACCESS_REG(eq)        (((eq) >> 8) & 0xf) /* 11:8, general purpose reg. */
 466
 467
 468/*
 469 * Exit Qualifications for APIC-Access
 470 */
 471#define APIC_ACCESS_OFFSET              0xfff   /* 11:0, offset within the APIC page */
 472#define APIC_ACCESS_TYPE                0xf000  /* 15:12, access type */
 473#define TYPE_LINEAR_APIC_INST_READ      (0 << 12)
 474#define TYPE_LINEAR_APIC_INST_WRITE     (1 << 12)
 475#define TYPE_LINEAR_APIC_INST_FETCH     (2 << 12)
 476#define TYPE_LINEAR_APIC_EVENT          (3 << 12)
 477#define TYPE_PHYSICAL_APIC_EVENT        (10 << 12)
 478#define TYPE_PHYSICAL_APIC_INST         (15 << 12)
 479
 480/* segment AR */
 481#define SEGMENT_AR_L_MASK (1 << 13)
 482
 483/* entry controls */
 484#define VM_ENTRY_CONTROLS_IA32E_MASK (1 << 9)
 485
 486#define AR_TYPE_ACCESSES_MASK 1
 487#define AR_TYPE_READABLE_MASK (1 << 1)
 488#define AR_TYPE_WRITEABLE_MASK (1 << 2)
 489#define AR_TYPE_CODE_MASK (1 << 3)
 490#define AR_TYPE_MASK 0x0f
 491#define AR_TYPE_BUSY_64_TSS 11
 492#define AR_TYPE_BUSY_32_TSS 11
 493#define AR_TYPE_BUSY_16_TSS 3
 494#define AR_TYPE_LDT 2
 495
 496#define AR_UNUSABLE_MASK (1 << 16)
 497#define AR_S_MASK (1 << 4)
 498#define AR_P_MASK (1 << 7)
 499#define AR_L_MASK (1 << 13)
 500#define AR_DB_MASK (1 << 14)
 501#define AR_G_MASK (1 << 15)
 502#define AR_DPL_SHIFT 5
 503#define AR_DPL(ar) (((ar) >> AR_DPL_SHIFT) & 3)
 504
 505#define AR_RESERVD_MASK 0xfffe0f00
 506
 507#define TSS_PRIVATE_MEMSLOT                     (KVM_MEMORY_SLOTS + 0)
 508#define APIC_ACCESS_PAGE_PRIVATE_MEMSLOT        (KVM_MEMORY_SLOTS + 1)
 509#define IDENTITY_PAGETABLE_PRIVATE_MEMSLOT      (KVM_MEMORY_SLOTS + 2)
 510
 511#define VMX_NR_VPIDS                            (1 << 16)
 512#define VMX_VPID_EXTENT_SINGLE_CONTEXT          1
 513#define VMX_VPID_EXTENT_ALL_CONTEXT             2
 514
 515#define VMX_EPT_EXTENT_INDIVIDUAL_ADDR          0
 516#define VMX_EPT_EXTENT_CONTEXT                  1
 517#define VMX_EPT_EXTENT_GLOBAL                   2
 518
 519#define VMX_EPT_EXECUTE_ONLY_BIT                (1ull)
 520#define VMX_EPT_PAGE_WALK_4_BIT                 (1ull << 6)
 521#define VMX_EPTP_UC_BIT                         (1ull << 8)
 522#define VMX_EPTP_WB_BIT                         (1ull << 14)
 523#define VMX_EPT_2MB_PAGE_BIT                    (1ull << 16)
 524#define VMX_EPT_1GB_PAGE_BIT                    (1ull << 17)
 525#define VMX_EPT_INVEPT_BIT                              (1ull << 20)
 526#define VMX_EPT_AD_BIT                              (1ull << 21)
 527#define VMX_EPT_EXTENT_CONTEXT_BIT              (1ull << 25)
 528#define VMX_EPT_EXTENT_GLOBAL_BIT               (1ull << 26)
 529#define VMX_EPT_EXTENT_INDIVIDUAL_BIT           (1ull << 24)
 530
 531#define SHUTDOWN_REASON(r)      ((r) >> 16)
 532#define SHUTDOWN_STATUS(r)      ((r) & 0xffff)
 533
 534#define VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT      (1ull << 9) /* (41 - 32) */
 535#define VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT      (1ull << 10) /* (42 - 32) */
 536
 537#define VMX_EPT_GAW_4_LVL                               3       /* LVL - 1 */
 538#define VMX_EPT_MAX_GAW                                 0x4
 539#define VMX_EPT_MT_EPTE_SHIFT                   3
 540#define VMX_EPT_GAW_EPTP_SHIFT                  3
 541#define VMX_EPT_AD_ENABLE_BIT                   (1ull << 6)
 542#define VMX_EPT_MEM_TYPE_WB                             0x6ull
 543#define VMX_EPT_READABLE_MASK                   0x1ull
 544#define VMX_EPT_WRITABLE_MASK                   0x2ull
 545#define VMX_EPT_EXECUTABLE_MASK                 0x4ull
 546#define VMX_EPT_IPAT_BIT                        (1ull << 6)
 547#define VMX_EPT_ACCESS_BIT                              (1ull << 8)
 548#define VMX_EPT_DIRTY_BIT                               (1ull << 9)
 549
 550#define VMX_EPT_IDENTITY_PAGETABLE_ADDR         0xfffbc000ul
 551
 552#define VMX_EPT_FAULT_READ      0x01
 553#define VMX_EPT_FAULT_WRITE     0x02
 554#define VMX_EPT_FAULT_INS       0x04
 555
 556#define ASM_VMX_VMCLEAR_RAX       ".byte 0x66, 0x0f, 0xc7, 0x30"
 557#define ASM_VMX_VMLAUNCH          ".byte 0x0f, 0x01, 0xc2"
 558#define ASM_VMX_VMRESUME          ".byte 0x0f, 0x01, 0xc3"
 559#define ASM_VMX_VMPTRLD_RAX       ".byte 0x0f, 0xc7, 0x30"
 560#define ASM_VMX_VMPTRST_RAX       ".byte 0x0f, 0xc7, 0x38"
 561#define ASM_VMX_VMREAD_RDX_RAX    ".byte 0x0f, 0x78, 0xd0"
 562#define ASM_VMX_VMWRITE_RAX_RDX   ".byte 0x0f, 0x79, 0xd0"
 563#define ASM_VMX_VMWRITE_RSP_RDX   ".byte 0x0f, 0x79, 0xd4"
 564#define ASM_VMX_VMXOFF            ".byte 0x0f, 0x01, 0xc4"
 565#define ASM_VMX_VMXON_RAX         ".byte 0xf3, 0x0f, 0xc7, 0x30"
 566#define ASM_VMX_INVEPT            ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
 567#define ASM_VMX_INVVPID           ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
 568
 569/*
 570 * Exit Qualifications for entry failure during or after loading guest state
 571 */
 572#define ENTRY_FAIL_DEFAULT              0
 573#define ENTRY_FAIL_PDPTE                2
 574#define ENTRY_FAIL_NMI                  3
 575#define ENTRY_FAIL_VMCS_LINK_PTR        4
 576
 577/*
 578 * VM-instruction error numbers
 579 */
 580enum vm_instruction_error_number {
 581        VMXERR_VMCALL_IN_VMX_ROOT_OPERATION = 1,
 582        VMXERR_VMCLEAR_INVALID_ADDRESS = 2,
 583        VMXERR_VMCLEAR_VMXON_POINTER = 3,
 584        VMXERR_VMLAUNCH_NONCLEAR_VMCS = 4,
 585        VMXERR_VMRESUME_NONLAUNCHED_VMCS = 5,
 586        VMXERR_VMRESUME_AFTER_VMXOFF = 6,
 587        VMXERR_ENTRY_INVALID_CONTROL_FIELD = 7,
 588        VMXERR_ENTRY_INVALID_HOST_STATE_FIELD = 8,
 589        VMXERR_VMPTRLD_INVALID_ADDRESS = 9,
 590        VMXERR_VMPTRLD_VMXON_POINTER = 10,
 591        VMXERR_VMPTRLD_INCORRECT_VMCS_REVISION_ID = 11,
 592        VMXERR_UNSUPPORTED_VMCS_COMPONENT = 12,
 593        VMXERR_VMWRITE_READ_ONLY_VMCS_COMPONENT = 13,
 594        VMXERR_VMXON_IN_VMX_ROOT_OPERATION = 15,
 595        VMXERR_ENTRY_INVALID_EXECUTIVE_VMCS_POINTER = 16,
 596        VMXERR_ENTRY_NONLAUNCHED_EXECUTIVE_VMCS = 17,
 597        VMXERR_ENTRY_EXECUTIVE_VMCS_POINTER_NOT_VMXON_POINTER = 18,
 598        VMXERR_VMCALL_NONCLEAR_VMCS = 19,
 599        VMXERR_VMCALL_INVALID_VM_EXIT_CONTROL_FIELDS = 20,
 600        VMXERR_VMCALL_INCORRECT_MSEG_REVISION_ID = 22,
 601        VMXERR_VMXOFF_UNDER_DUAL_MONITOR_TREATMENT_OF_SMIS_AND_SMM = 23,
 602        VMXERR_VMCALL_INVALID_SMM_MONITOR_FEATURES = 24,
 603        VMXERR_ENTRY_INVALID_VM_EXECUTION_CONTROL_FIELDS_IN_EXECUTIVE_VMCS = 25,
 604        VMXERR_ENTRY_EVENTS_BLOCKED_BY_MOV_SS = 26,
 605        VMXERR_INVALID_OPERAND_TO_INVEPT_INVVPID = 28,
 606};
 607
 608/*
 609 * shutdown reasons
 610 */
 611enum shutdown_reason {
 612        SHUTDOWN_SYS_EXIT = 1,
 613        SHUTDOWN_SYS_EXIT_GROUP,
 614        SHUTDOWN_SYS_EXECVE,
 615        SHUTDOWN_FATAL_SIGNAL,
 616        SHUTDOWN_EPT_VIOLATION,
 617        SHUTDOWN_NMI_EXCEPTION,
 618        SHUTDOWN_UNHANDLED_EXIT_REASON,
 619};
 620