akaros/kern/arch/riscv/ros/membar.h
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   1#pragma once
   2
   3/* Full CPU memory barrier */
   4#define mb() __sync_synchronize()
   5/* Compiler memory barrier */
   6#define cmb() ({ asm volatile("" ::: "memory"); })
   7/* Partial CPU memory barriers */
   8#define rmb() mb()
   9#define wmb() mb()
  10#define wrmb() mb()
  11#define rwmb() mb()
  12
  13/* Forced barriers, used for string ops, SSE ops, dealing with hardware, or
  14 * other places where you avoid 'normal' x86 read/writes (like having an IPI
  15 * beat a write) */
  16#define mb_f() mb()
  17#define rmb_f() rmb()
  18#define wmb_f() wmb()
  19#define wrmb_f() wrmb()
  20#define rwmb_f() rwmb()
  21
  22/* Bus memory barriers */
  23#warning "Implement bus memory barriers"
  24#define bus_wmb() mb()
  25#define bus_rmb() mb()
  26