Needed to remove -lparlib from cp30's Makefrag
[akaros.git] / kern / arch /
2012-11-21 Barret RhodenSpinlock irqsave usage checks
2012-11-21 Barret RhodenNo longer inlines spin_lock
2012-11-21 Barret RhodenKernel context (IRQ, etc) tracking
2012-11-21 Barret RhodenMakes kmsg code arch independent
2012-11-21 Barret RhodenRISCV/SPARC: send_ipi() takes a vector
2012-11-21 Barret Rhodenx86: send_ipi takes an OS coreid
2012-11-21 Barret RhodenKMSGs no longer self-ipi for routine messages
2012-11-21 Barret Rhodenx86: sends the EOI earlier in the IRQ path
2012-11-09 Barret RhodenKernel message nested function scoping
2012-11-05 Barret RhodenFixes irqsave issue with CVs
2012-10-16 Barret RhodenNo longer disables irqs when mucking with pcpui
2012-09-05 Barret RhodenEnsures IRQs are enabled when proc_destroy()ing
2012-09-05 Barret RhodenDebug code to see remote kmsgs
2012-09-05 Barret RhodenSpinlock depth checking
2012-05-18 Andrew Watermanmake risc-v front-end syscalls asynchronous
2012-05-18 Andrew Watermanfix risc-v fpu emulation bugs
2012-05-29 Andrew Watermanfor RISC-V, emulate missing fdiv/fsqrt instructions
2012-05-17 Andrew Watermanimprove risc-v console
2012-05-15 Andrew Watermanrisc-v bugfix potpourri
2012-05-15 Andrew Watermandon't dereference PC during trap entry
2012-05-12 Andrew Watermanon risc-v, emulate keyboard input using an alarm
2012-05-12 Andrew Watermanon risc-v, initialize core_stacktops; fix halt
2012-05-11 Andrew Watermanrisc-v supervisor mode updates
2012-05-11 Andrew Watermanrisc-v boot process bugfixes
2012-04-10 Barret RhodenConfig option to turn off backspace for printk
2012-04-10 Barret Rhodenx86 console and readline() honor 0x7f
2012-04-09 Barret RhodenFixes x86 LAPIC_ISR/IRR reading
2012-04-05 Barret Rhodenx86: handles spurious IRQs from the PIC and LAPIC
2012-04-05 Barret RhodenFixes bug with reading LAPIC ISR/IRR
2012-04-04 Barret RhodenPIC helper functions to read the ISR, IRR, and IMR
2012-04-04 Barret Rhodenx86 register IRQ handlers for devices that exist
2012-04-04 Barret Rhodenx86 console/serial cleanup
2012-04-03 Barret RhodenFixes serial interrupt enabling on x86 hardware
2012-03-24 Barret RhodenKeyboard/char input buffering and irq handling
2012-03-06 Barret RhodenFixes bug with abort_halt()
2012-01-31 Barret RhodenFixes MAP_PRIVATE bug in mmap()
2012-01-23 Barret RhodenFixes occasional STAB error on x86
2011-12-16 Barret RhodenRemoved dangling symlink
2011-12-15 Barret Rhodenx86: Detection for RDFSBASE and friends
2011-12-15 Barret RhodenFixes gcc 4.6.1 incompatibility with old x86 asm
2011-11-12 Your NameFixed bug in RISC-V env_user_mem_free
2011-11-11 Andrew WatermanFixed RISC-V page fault handling
2011-11-11 Andrew WatermanChanges to RISC-V supervisor mode
2011-11-08 Andrew WatermanRISC-V architecture bugfix potpourri
2011-11-03 Andrew Watermanfixes to RISC-V trap handling
2011-11-03 Andrew Watermanhandle sizeof(pid_t) != sizeof(void*) gracefully
2011-11-03 Andrew WatermanFixed RISC-V trap entry
2011-11-03 Andrew WatermanUpdated RISC-V boot sequence; use 8KB pages
2011-11-03 Andrew Watermancode changes for new RISC-V GCC toolchain
2011-11-03 Barret Rhodenproc_destroy() no longer requires edible refs
2011-11-03 Barret Rhodenset_current_tf() no longer sets the local *tf var
2011-11-03 Barret Rhodenx86 interrupts are disabled til cur_tf is set
2011-11-03 Barret Rhodenx86 kernel messages go through irq_handler()
2011-11-03 Barret RhodenCleaned up memory barrier usage (XCC)
2011-11-03 Barret RhodenKmsg debug routine
2011-11-03 Barret RhodenSparc's cpu_halt() enables interrupts
2011-11-03 Barret RhodenFixes race where we'd ignore a kmsg when halting
2011-11-03 Barret RhodenHelpers for converting time to and from tsc ticks
2011-11-03 Barret RhodenCleaned up the 'timer interfaces'
2011-11-03 Barret Rhodenmm.h directly includes ros/mman.h
2011-11-03 Barret Rhodenarch/mmu.h contents now in ros/arch/mmu.h (XCC)
2011-11-03 Andrew Watermanfixed atomic_read to be assumed volatile
2011-11-03 Andrew WatermanRISC-V compile fixes
2011-11-03 Andrew Watermansome RISC-V fixes
2011-11-03 Andrew WatermanFixed compile error on SPARC port
2011-11-03 Barret Rhodene1000 uses the new kernel dynamic VA mapping
2011-11-03 Barret RhodenFixes showmapping to work with non-page back maps
2011-11-03 Barret RhodenKernel static mappings grow down, APICs remapped
2011-11-03 Barret RhodenKernel message parameters are now longs
2011-11-03 Barret RhodenUTOP -> UWLIM
2011-11-03 Barret RhodenRemoved KSTACKTOP
2011-11-03 Barret RhodenAtomics rewrite (XCC)
2011-11-03 Barret RhodenFixes sparc compilation error
2011-11-03 Barret RhodenKthread stack poisoning
2011-11-03 Barret Rhodenatomic_and()
2011-11-03 Barret RhodenDon't cache pcpui across potential kthread blocks
2011-11-03 Andrew Watermana risc-v single-core process works!!
2011-11-03 Andrew Watermandecoupled ULIM from KERNBASE. rebuild your xcc.
2011-11-03 Andrew Watermanadded NOVPT option to disable VPT/UVPT mappings
2011-11-03 Andrew Watermanfixes towards risc-v user programs running
2011-11-03 Andrew WatermanSynced up RISC-V build
2011-11-03 Andrew Watermannew 64b kernel memory map (not userspace yet)
2011-11-03 Barret RhodenKernel message sanity checks
2011-11-03 Barret RhodenBacktrace reports the last entry
2011-11-03 Barret RhodenFixes some CAS loops
2011-11-03 Barret RhodenNMIs and cross-core trapframe inspection
2011-11-03 Barret RhodenKernel debugging helpers
2011-11-03 Barret RhodenAvoids nehalem keyboard issues, better monitors
2011-11-03 Barret RhodenFixes nasty CAS bug
2011-11-03 Andrew WatermanRISC-V SMP boot works
2011-11-03 Andrew WatermanRISC-V port mostly links now
2011-11-03 Andrew WatermanInitial commit of RISC-V architecture port
2011-11-03 Andrew Waterman32b/64b compatibility fixes
2011-11-03 Barret RhodenFixed corner case with alarm rel_time
2011-11-03 Barret RhodenArch independent per-cpu initialization
2011-11-03 Barret Rhodenset_core_timer() now takes a periodic flag
2011-11-03 Barret RhodenAlarm infrastructure
2011-11-03 Barret Rhodenstruct syscall's flags is now an atomic_t (XCC)
2011-11-03 Barret RhodenFixes sparc syscall interface (XCC)
2011-11-03 David ZhuMore addition to arsc infrastructure.
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