Fix IA32_MISCENABLE disabling of PEBS
authorGan Shun <ganshun@gmail.com>
Wed, 26 Oct 2016 18:08:56 +0000 (11:08 -0700)
committerBarret Rhoden <brho@cs.berkeley.edu>
Wed, 26 Oct 2016 18:14:43 +0000 (14:14 -0400)
We weren't correctly checking the written value. We tell the guest that
PEBS is disabled, thus when they write the same value back to the MSR, we
should check for the disable bit in miscenable

Signed-off-by: Gan Shun <ganshun@gmail.com>
Change-Id: I0e00119d7fec678e2c4e3b2185565444022ac140
Signed-off-by: Barret Rhoden <brho@cs.berkeley.edu>
kern/arch/x86/vmm/vmm.c

index c0172d6..f8a8294 100644 (file)
@@ -303,6 +303,7 @@ bool emsr_miscenable(struct emmsr *msr, uint64_t *rcx, uint64_t *rdx,
                return TRUE;
        } else {
                /* if they are writing what is already written, that's ok. */
+               eax |= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL;
                if (((uint32_t) *rax == eax) && ((uint32_t) *rdx == edx))
                        return TRUE;
        }