RISC-V compile fixes
authorAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Tue, 12 Jul 2011 19:46:42 +0000 (12:46 -0700)
committerKevin Klues <klueska@cs.berkeley.edu>
Thu, 3 Nov 2011 00:36:04 +0000 (17:36 -0700)
kern/arch/riscv/atomic.c
kern/arch/riscv/atomic.h
kern/arch/riscv/smp.c

index bbe10eb..ba5f307 100644 (file)
@@ -3,7 +3,7 @@
 // This emulates compare and swap by hashing the address into one of
 // K buckets, acquiring the lock for that bucket, then performing the
 // operation during the critical section.  :-(
-bool atomic_cas(atomic_t *addr, long exp_val, long new_val);
+bool atomic_cas(atomic_t *addr, long exp_val, long new_val)
 {
        if ((long)*addr != exp_val)
                return 0;
index 95c12b7..507f989 100644 (file)
@@ -76,10 +76,10 @@ static inline void atomic_or(atomic_t *number, long mask)
 
 static inline long atomic_swap(atomic_t *addr, long val)
 {
-       return __sync_lock_test_and_set(addr, val); // yes, really
+       return (long)__sync_lock_test_and_set(addr, val); // yes, really
 }
 
-static inline long atomic_swap_u32(uint32_t *addr, uint32_t val)
+static inline uint32_t atomic_swap_u32(uint32_t *addr, uint32_t val)
 {
        return __sync_lock_test_and_set(addr, val); // yes, really
 }
@@ -102,7 +102,7 @@ static inline void atomic_orb(volatile uint8_t* number, uint8_t mask)
        __sync_fetch_and_or((uint32_t*)((uintptr_t)number & ~3), wmask);
 }
 
-static inline uint32_t spin_locked(spinlock_t* lock)
+static inline bool spin_locked(spinlock_t* lock)
 {
        return lock->rlock;
 }
index bce487f..1ced0a9 100644 (file)
@@ -23,7 +23,7 @@ smp_boot(void)
        
        while(*(volatile uint32_t*)&num_cpus < num_cores());
 
-       printd("%d cores reporting!\n",num_cpus);
+       printd("%d cores reporting!\n", num_cpus);
 }
 
 void
@@ -56,24 +56,24 @@ smp_make_wrapper()
 
 void
 smp_call_wrapper(trapframe_t* tf, uint32_t src, isr_t handler,
-                 handler_wrapper_t* wrapper,void* data)
+                 handler_wrapper_t* wrapper, void* data)
 {
        if(wrapper)
                wrapper->wait_list[core_id()] = 0;
-       handler(tf,data);
+       handler(tf, data);
 }
 
 int smp_call_function_self(isr_t handler, void* data,
                            handler_wrapper_t** wait_wrapper)
 {
-       return smp_call_function_single(core_id(),handler,data,wait_wrapper);
+       return smp_call_function_single(core_id(), handler, data, wait_wrapper);
 }
 
 int smp_call_function_all(isr_t handler, void* data,
                           handler_wrapper_t** wait_wrapper)
 {
        int8_t state = 0;
-       int i;
+       int i, me;
        handler_wrapper_t* wrapper = 0;
        if(wait_wrapper)
        {
@@ -88,18 +88,18 @@ int smp_call_function_all(isr_t handler, void* data,
        enable_irqsave(&state);
 
        // send to others
-       for(i = 0; i < num_cpus; i++)
+       for(i = 0, me = core_id(); i < num_cpus; i++)
        {
-               if(i == core_id())
+               if(i == me)
                        continue;
 
-               send_kernel_message(i,(amr_t)smp_call_wrapper,
-                                         handler, wrapper, data, KMSG_IMMEDIATE);
+               send_kernel_message(i, (amr_t)smp_call_wrapper, (long)handler,
+                                   (long)wrapper, (long)data, KMSG_IMMEDIATE);
        }
 
        // send to me
-       send_kernel_message(core_id(),(amr_t)smp_call_wrapper,
-                                 handler,wrapper,data, KMSG_IMMEDIATE);
+       send_kernel_message(me, (amr_t)smp_call_wrapper, (long)handler,
+                           (long)wrapper, (long)data, KMSG_IMMEDIATE);
 
        cpu_relax(); // wait to get the interrupt
 
@@ -123,8 +123,8 @@ int smp_call_function_single(uint32_t dest, isr_t handler, void* data,
 
        enable_irqsave(&state);
 
-       send_kernel_message(dest,(amr_t)smp_call_wrapper,
-                                 handler,wrapper,data, KMSG_IMMEDIATE);
+       send_kernel_message(dest, (amr_t)smp_call_wrapper, (long)handler,
+                           (long)wrapper, (long)data, KMSG_IMMEDIATE);
 
        cpu_relax(); // wait to get the interrupt, if it's to this core