Removes test_print_info()
authorBarret Rhoden <brho@cs.berkeley.edu>
Tue, 6 May 2014 23:40:14 +0000 (16:40 -0700)
committerBarret Rhoden <brho@cs.berkeley.edu>
Tue, 6 May 2014 23:40:14 +0000 (16:40 -0700)
Moves the functionality to the monitor.  The "all cores" option needs to be
kfunc'd.

kern/include/testing.h
kern/src/ktest/Kconfig.postboot
kern/src/ktest/pb_ktests.c
kern/src/monitor.c

index d8e2bae..f563188 100644 (file)
@@ -5,7 +5,6 @@
 #include <trap.h>
 
 void test_hello_world_handler(struct hw_trapframe *hw_tf, void *data);
-void test_print_info_handler(struct hw_trapframe *hw_tf, void *data);
 void test_barrier_handler(struct hw_trapframe *hw_tf, void *data);
 
 #endif /* !ROS_INC_TESTING_H */
index 719cbda..5883c64 100644 (file)
@@ -68,13 +68,6 @@ config TEST_color_alloc
     help
         Run the color_alloc test
 
-config TEST_print_info
-    depends on PB_KTESTS
-    bool "Print info test"
-    default n
-    help
-        Run the print_info test
-
 config TEST_barrier
     depends on PB_KTESTS
     bool "Barrier test"
index ed053b3..4df0ba2 100644 (file)
@@ -140,15 +140,6 @@ bool test_ioapic_pit_reroute(void)
 
 #endif // CONFIG_X86
 
-// TODO: Assert printed info follows the standard (or whatever we want to test).
-bool test_print_info(void)
-{
-       cprintf("\nCORE 0 asking all cores to print info:\n");
-       smp_call_function_all(test_print_info_handler, NULL, 0);
-       cprintf("\nDone!\n");
-       return true;
-}
-
 // TODO: Add assertions. Possibly the way to go is to extract relevant info 
 //       from cache properties and make assertions on the colored pages lists 
 //       based on those.
@@ -628,40 +619,6 @@ void test_hello_world_handler(struct hw_trapframe *hw_tf, void *data)
                trapno, core_id(), hw_tf);
 }
 
-spinlock_t print_info_lock = SPINLOCK_INITIALIZER_IRQSAVE;
-
-void test_print_info_handler(struct hw_trapframe *hw_tf, void *data)
-{
-       uint64_t tsc = read_tsc();
-
-       spin_lock_irqsave(&print_info_lock);
-       cprintf("----------------------------\n");
-       cprintf("This is Core %d\n", core_id());
-       cprintf("Timestamp = %lld\n", tsc);
-#ifdef CONFIG_X86
-       cprintf("Hardware core %d\n", hw_core_id());
-       cprintf("MTRR_DEF_TYPE = 0x%08x\n", read_msr(IA32_MTRR_DEF_TYPE));
-       cprintf("MTRR Phys0 Base = 0x%016llx, Mask = 0x%016llx\n",
-               read_msr(0x200), read_msr(0x201));
-       cprintf("MTRR Phys1 Base = 0x%016llx, Mask = 0x%016llx\n",
-               read_msr(0x202), read_msr(0x203));
-       cprintf("MTRR Phys2 Base = 0x%016llx, Mask = 0x%016llx\n",
-               read_msr(0x204), read_msr(0x205));
-       cprintf("MTRR Phys3 Base = 0x%016llx, Mask = 0x%016llx\n",
-               read_msr(0x206), read_msr(0x207));
-       cprintf("MTRR Phys4 Base = 0x%016llx, Mask = 0x%016llx\n",
-               read_msr(0x208), read_msr(0x209));
-       cprintf("MTRR Phys5 Base = 0x%016llx, Mask = 0x%016llx\n",
-               read_msr(0x20a), read_msr(0x20b));
-       cprintf("MTRR Phys6 Base = 0x%016llx, Mask = 0x%016llx\n",
-               read_msr(0x20c), read_msr(0x20d));
-       cprintf("MTRR Phys7 Base = 0x%016llx, Mask = 0x%016llx\n",
-               read_msr(0x20e), read_msr(0x20f));
-#endif // CONFIG_X86
-       cprintf("----------------------------\n");
-       spin_unlock_irqsave(&print_info_lock);
-}
-
 void test_barrier_handler(struct hw_trapframe *hw_tf, void *data)
 {
        cprintf("Round 1: Core %d\n", core_id());
@@ -2030,7 +1987,6 @@ static struct ktest ktests[] = {
        KTEST_REG(page_coloring,      CONFIG_TEST_page_coloring),
        KTEST_REG(color_alloc,        CONFIG_TEST_color_alloc),
 #endif // CONFIG_PAGE_COLORING
-       KTEST_REG(print_info,         CONFIG_TEST_print_info),
        KTEST_REG(barrier,            CONFIG_TEST_barrier),
        KTEST_REG(interrupts_irqsave, CONFIG_TEST_interrupts_irqsave),
        KTEST_REG(bitmasks,           CONFIG_TEST_bitmasks),
index 9cdb985..89d388e 100644 (file)
@@ -252,16 +252,58 @@ int mon_setmapperm(int argc, char **argv, struct hw_trapframe *hw_tf)
 #endif
 }
 
+static spinlock_t print_info_lock = SPINLOCK_INITIALIZER_IRQSAVE;
+
+static void print_info_handler(struct hw_trapframe *hw_tf, void *data)
+{
+       uint64_t tsc = read_tsc();
+
+       spin_lock_irqsave(&print_info_lock);
+       cprintf("----------------------------\n");
+       cprintf("This is Core %d\n", core_id());
+       cprintf("Timestamp = %lld\n", tsc);
+#ifdef CONFIG_X86
+       cprintf("Hardware core %d\n", hw_core_id());
+       cprintf("MTRR_DEF_TYPE = 0x%08x\n", read_msr(IA32_MTRR_DEF_TYPE));
+       cprintf("MTRR Phys0 Base = 0x%016llx, Mask = 0x%016llx\n",
+               read_msr(0x200), read_msr(0x201));
+       cprintf("MTRR Phys1 Base = 0x%016llx, Mask = 0x%016llx\n",
+               read_msr(0x202), read_msr(0x203));
+       cprintf("MTRR Phys2 Base = 0x%016llx, Mask = 0x%016llx\n",
+               read_msr(0x204), read_msr(0x205));
+       cprintf("MTRR Phys3 Base = 0x%016llx, Mask = 0x%016llx\n",
+               read_msr(0x206), read_msr(0x207));
+       cprintf("MTRR Phys4 Base = 0x%016llx, Mask = 0x%016llx\n",
+               read_msr(0x208), read_msr(0x209));
+       cprintf("MTRR Phys5 Base = 0x%016llx, Mask = 0x%016llx\n",
+               read_msr(0x20a), read_msr(0x20b));
+       cprintf("MTRR Phys6 Base = 0x%016llx, Mask = 0x%016llx\n",
+               read_msr(0x20c), read_msr(0x20d));
+       cprintf("MTRR Phys7 Base = 0x%016llx, Mask = 0x%016llx\n",
+               read_msr(0x20e), read_msr(0x20f));
+#endif // CONFIG_X86
+       cprintf("----------------------------\n");
+       spin_unlock_irqsave(&print_info_lock);
+}
+
+static bool print_all_info(void)
+{
+       cprintf("\nCORE 0 asking all cores to print info:\n");
+       smp_call_function_all(print_info_handler, NULL, 0);
+       cprintf("\nDone!\n");
+       return true;
+}
+
 int mon_cpuinfo(int argc, char **argv, struct hw_trapframe *hw_tf)
 {
        cprintf("Number of CPUs detected: %d\n", num_cpus);
        cprintf("Calling CPU's ID: 0x%08x\n", core_id());
 
        if (argc < 2)
-               smp_call_function_self(test_print_info_handler, NULL, 0);
+               smp_call_function_self(print_info_handler, NULL, 0);
        else
                smp_call_function_single(strtol(argv[1], 0, 10),
-                                        test_print_info_handler, NULL, 0);
+                                        print_info_handler, NULL, 0);
        return 0;
 }