Add "first draft" glibc support for x86_64 xcc (XCC)
authorKevin Klues <klueska@cs.berkeley.edu>
Fri, 21 Jun 2013 17:50:24 +0000 (10:50 -0700)
committerKevin Klues <klueska@cs.berkeley.edu>
Fri, 21 Jun 2013 17:50:24 +0000 (10:50 -0700)
Need to actually make things work for this xcc, but at least everything is
compiling.

12 files changed:
tools/compilers/gcc-glibc/glibc-2.14.1-ros/nptl/shlib-versions
tools/compilers/gcc-glibc/glibc-2.14.1-ros/shlib-versions
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/Makefile
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/Makefile [new file with mode: 0644]
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/____longjmp_chk.S [new file with mode: 0644]
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/bits/sigcontext.h [new file with mode: 0644]
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/profil-counter.h [new file with mode: 0644]
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/sys/ucontext.h [new file with mode: 0644]
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/sysdep.h [new file with mode: 0644]
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/tcb-offsets.sym [new file with mode: 0644]
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/tls.h [new file with mode: 0644]
tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/x86_64/tlsdesc.sym [new file with mode: 0644]

index a6ad3d5..19db652 100644 (file)
@@ -6,6 +6,7 @@ hppa.*-.*-linux.*       libpthread=0            GLIBC_2.2
 s390x-.*-linux.*       libpthread=0            GLIBC_2.2
 cris-.*-linux.*                libpthread=0            GLIBC_2.2
 x86_64-.*-linux.*      libpthread=0            GLIBC_2.2.5
+x86_64-.*-ros.*                libpthread=0            GLIBC_2.2.5
 powerpc64-.*-linux.*   libpthread=0            GLIBC_2.3
 .*-.*-linux.*          libpthread=0
 .*-.*-ros.*                    libpthread=0
index 3507189..901c9b5 100644 (file)
@@ -29,6 +29,7 @@
 s390x-.*-linux.*        DEFAULT                        GLIBC_2.2
 cris-.*-linux.*                DEFAULT                 GLIBC_2.2
 x86_64-.*-linux.*       DEFAULT                        GLIBC_2.2.5
+x86_64-.*-ros.*       DEFAULT                  GLIBC_2.2.5
 powerpc64-.*-linux.*   DEFAULT                 GLIBC_2.3
 .*-.*-gnu-gnu.*                DEFAULT                 GLIBC_2.2.6
 
index abba0b7..41874d5 100644 (file)
@@ -1,7 +1,6 @@
 CPPFLAGS += -DHAVE_MMAP=1
 CPPFLAGS += -DHAVE_MUNMAP=1
 CPPFLAGS += -D_LIBC_REENTRANT=1
-CPPFLAGS += -D_IO_MTSAFE_IO=1
 
 # Any sysdep .c file you want needs to be added here, if it's not somewhere
 # else already.  Many posix-ish .c files already are taken care of.  We also
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/Makefile b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/Makefile
new file mode 100644 (file)
index 0000000..9640c8d
--- /dev/null
@@ -0,0 +1,22 @@
+# Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
+# This file is part of the GNU C Library.
+
+# The GNU C Library is free software; you can redistribute it and/or
+# modify it under the terms of the GNU Lesser General Public
+# License as published by the Free Software Foundation; either
+# version 2.1 of the License, or (at your option) any later version.
+
+# The GNU C Library is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# Lesser General Public License for more details.
+
+# You should have received a copy of the GNU Lesser General Public
+# License along with the GNU C Library; if not, write to the Free
+# Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+# 02111-1307 USA.
+
+ifeq ($(subdir),csu)
+gen-as-const-headers += tcb-offsets.sym
+endif
+
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/____longjmp_chk.S b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/____longjmp_chk.S
new file mode 100644 (file)
index 0000000..5200eb2
--- /dev/null
@@ -0,0 +1,117 @@
+/* Copyright (C) 2001,2004,2005,2006,2009,2010,2011 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#include <sysdep.h>
+#include <jmpbuf-offsets.h>
+#include <asm-syntax.h>
+
+       .section .rodata.str1.1,"aMS",@progbits,1
+       .type   longjmp_msg,@object
+longjmp_msg:
+       .string "longjmp causes uninitialized stack frame"
+       .size   longjmp_msg, .-longjmp_msg
+
+
+//#define __longjmp ____longjmp_chk
+
+#ifdef PIC
+# define CALL_FAIL     subq    $8, %rsp;                                     \
+                       cfi_remember_state;                                   \
+                       cfi_def_cfa_offset(16);                               \
+                       leaq    longjmp_msg(%rip), %rdi;                      \
+                       call    __GI___fortify_fail;                          \
+                       nop;                                                  \
+                       cfi_restore_state
+#else
+# define CALL_FAIL     subq    $8, %rsp;                                     \
+                       cfi_remember_state;                                   \
+                       cfi_def_cfa_offset(16);                               \
+                       movq    $longjmp_msg, %rdi;                           \
+                       call    __fortify_fail;                               \
+                       nop;                                                  \
+                       cfi_restore_state
+#endif
+
+/* Jump to the position specified by ENV, causing the
+   setjmp call there to return VAL, or 1 if VAL is 0.
+   void __longjmp (__jmp_buf env, int val).  */
+       .text
+ENTRY(____longjmp_chk)
+       /* Restore registers.  */
+       movq    (JB_RSP*8)(%rdi), %r8
+       movq    (JB_RBP*8)(%rdi), %r9
+       movq    (JB_PC*8)(%rdi), %rdx
+#ifdef PTR_DEMANGLE
+       PTR_DEMANGLE (%r8)
+       PTR_DEMANGLE (%r9)
+       PTR_DEMANGLE (%rdx)
+#endif
+
+       cmpq    %r8, %rsp
+       jbe     .Lok
+
+       /* Save function parameters.  */
+       movq    %rdi, %r10
+       cfi_register (%rdi, %r10)
+       movl    %esi, %ebx
+       cfi_register (%rsi, %rbx)
+
+       xorl    %edi, %edi
+       leaq    -24(%rsp), %rsi
+       movl    $0, %eax
+       syscall
+       /* Without working sigaltstack we cannot perform the test.  */
+       testl   %eax, %eax
+       jne     .Lok2
+       testl   $1, -16(%rsp)
+       jz      .Lfail
+
+       movq    -24(%rsp), %rax
+       addq    -8(%rsp), %rax
+       subq    %r8, %rax
+       cmpq    -8(%rsp), %rax
+       jae     .Lok2
+
+.Lfail:        CALL_FAIL
+
+.Lok2: movq    %r10, %rdi
+       cfi_restore (%rdi)
+       movl    %ebx, %esi
+       cfi_restore (%rsi)
+
+.Lok:  /* We add unwind information for the target here.  */
+       cfi_def_cfa(%rdi, 0)
+       cfi_register(%rsp,%r8)
+       cfi_register(%rbp,%r9)
+       cfi_register(%rip,%rdx)
+       cfi_offset(%rbx,JB_RBX*8)
+       cfi_offset(%r12,JB_R12*8)
+       cfi_offset(%r13,JB_R13*8)
+       cfi_offset(%r14,JB_R14*8)
+       cfi_offset(%r15,JB_R15*8)
+       movq    (JB_RBX*8)(%rdi), %rbx
+       movq    (JB_R12*8)(%rdi), %r12
+       movq    (JB_R13*8)(%rdi), %r13
+       movq    (JB_R14*8)(%rdi), %r14
+       movq    (JB_R15*8)(%rdi), %r15
+       /* Set return value for setjmp.  */
+       movl    %esi, %eax
+       movq    %r8,%rsp
+       movq    %r9,%rbp
+       jmpq    *%rdx
+END (____longjmp_chk)
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/bits/sigcontext.h b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/bits/sigcontext.h
new file mode 100644 (file)
index 0000000..c0d5fe7
--- /dev/null
@@ -0,0 +1,159 @@
+/* Copyright (C) 2002 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _BITS_SIGCONTEXT_H
+#define _BITS_SIGCONTEXT_H  1
+
+#if !defined _SIGNAL_H && !defined _SYS_UCONTEXT_H
+# error "Never use <bits/sigcontext.h> directly; include <signal.h> instead."
+#endif
+
+#include <bits/wordsize.h>
+
+struct _fpreg
+{
+  unsigned short significand[4];
+  unsigned short exponent;
+};
+
+struct _fpxreg
+{
+  unsigned short significand[4];
+  unsigned short exponent;
+  unsigned short padding[3];
+};
+
+struct _xmmreg
+{
+  __uint32_t   element[4];
+};
+
+
+
+#if __WORDSIZE == 32
+
+struct _fpstate
+{
+  /* Regular FPU environment.  */
+  __uint32_t   cw;
+  __uint32_t           sw;
+  __uint32_t           tag;
+  __uint32_t           ipoff;
+  __uint32_t           cssel;
+  __uint32_t           dataoff;
+  __uint32_t           datasel;
+  struct _fpreg        _st[8];
+  unsigned short status;
+  unsigned short magic;
+
+  /* FXSR FPU environment.  */
+  __uint32_t           _fxsr_env[6];
+  __uint32_t           mxcsr;
+  __uint32_t           reserved;
+  struct _fpxreg       _fxsr_st[8];
+  struct _xmmreg       _xmm[8];
+  __uint32_t           padding[56];
+};
+
+#ifndef sigcontext_struct
+/* Kernel headers before 2.1.1 define a struct sigcontext_struct, but
+   we need sigcontext.  Some packages have come to rely on
+   sigcontext_struct being defined on 32-bit x86, so define this for
+   their benefit.  */
+# define sigcontext_struct sigcontext
+#endif
+
+struct sigcontext
+{
+  unsigned short gs, __gsh;
+  unsigned short fs, __fsh;
+  unsigned short es, __esh;
+  unsigned short ds, __dsh;
+  unsigned long edi;
+  unsigned long esi;
+  unsigned long ebp;
+  unsigned long esp;
+  unsigned long ebx;
+  unsigned long edx;
+  unsigned long ecx;
+  unsigned long eax;
+  unsigned long trapno;
+  unsigned long err;
+  unsigned long eip;
+  unsigned short cs, __csh;
+  unsigned long eflags;
+  unsigned long esp_at_signal;
+  unsigned short ss, __ssh;
+  struct _fpstate * fpstate;
+  unsigned long oldmask;
+  unsigned long cr2;
+};
+
+#else /* __WORDSIZE == 64 */
+
+struct _fpstate
+{
+  /* FPU environment matching the 64-bit FXSAVE layout.  */
+  __uint16_t           cwd;
+  __uint16_t           swd;
+  __uint16_t           ftw;
+  __uint16_t           fop;
+  __uint64_t           rip;
+  __uint64_t           rdp;
+  __uint32_t           mxcsr;
+  __uint32_t           mxcr_mask;
+  struct _fpxreg       _st[8];
+  struct _xmmreg       _xmm[16];
+  __uint32_t           padding[24];
+};
+
+struct sigcontext
+{
+  unsigned long r8;
+  unsigned long r9;
+  unsigned long r10;
+  unsigned long r11;
+  unsigned long r12;
+  unsigned long r13;
+  unsigned long r14;
+  unsigned long r15;
+  unsigned long rdi;
+  unsigned long rsi;
+  unsigned long rbp;
+  unsigned long rbx;
+  unsigned long rdx;
+  unsigned long rax;
+  unsigned long rcx;
+  unsigned long rsp;
+  unsigned long rip;
+  unsigned long eflags;
+  unsigned short cs;
+  unsigned short gs;
+  unsigned short fs;
+  unsigned short __pad0;
+  unsigned long err;
+  unsigned long trapno;
+  unsigned long oldmask;
+  unsigned long cr2;
+  struct _fpstate * fpstate;
+  unsigned long __reserved1 [8];
+};
+
+#endif /* __WORDSIZE == 64 */
+
+#endif /* _BITS_SIGCONTEXT_H */
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/profil-counter.h b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/profil-counter.h
new file mode 100644 (file)
index 0000000..0b24417
--- /dev/null
@@ -0,0 +1,32 @@
+/* Low-level statistical profiling support function.  Linux/x86-64 version.
+   Copyright (C) 2001, 2002 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#include <signal.h>
+#include <sigcontextinfo.h>
+
+static void
+profil_counter (int signo, SIGCONTEXT scp)
+{
+  profil_count ((void *) GET_PC (scp));
+
+  /* This is a hack to prevent the compiler from implementing the
+     above function call as a sibcall.  The sibcall would overwrite
+     the signal context.  */
+  asm volatile ("");
+}
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/sys/ucontext.h b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/sys/ucontext.h
new file mode 100644 (file)
index 0000000..b59cd29
--- /dev/null
@@ -0,0 +1,248 @@
+/* Copyright (C) 2001, 2002 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _SYS_UCONTEXT_H
+#define _SYS_UCONTEXT_H        1
+
+#include <features.h>
+#include <signal.h>
+#include <bits/wordsize.h>
+
+/* We need the signal context definitions even if they are not used
+   included in <signal.h>.  */
+#include <bits/sigcontext.h>
+
+#if __WORDSIZE == 64
+
+/* Type for general register.  */
+typedef long int greg_t;
+
+/* Number of general registers.  */
+#define NGREG  23
+
+/* Container for all general registers.  */
+typedef greg_t gregset_t[NGREG];
+
+#ifdef __USE_GNU
+/* Number of each register in the `gregset_t' array.  */
+enum
+{
+  REG_R8 = 0,
+# define REG_R8                REG_R8
+  REG_R9,
+# define REG_R9                REG_R9
+  REG_R10,
+# define REG_R10       REG_R10
+  REG_R11,
+# define REG_R11       REG_R11
+  REG_R12,
+# define REG_R12       REG_R12
+  REG_R13,
+# define REG_R13       REG_R13
+  REG_R14,
+# define REG_R14       REG_R14
+  REG_R15,
+# define REG_R15       REG_R15
+  REG_RDI,
+# define REG_RDI       REG_RDI
+  REG_RSI,
+# define REG_RSI       REG_RSI
+  REG_RBP,
+# define REG_RBP       REG_RBP
+  REG_RBX,
+# define REG_RBX       REG_RBX
+  REG_RDX,
+# define REG_RDX       REG_RDX
+  REG_RAX,
+# define REG_RAX       REG_RAX
+  REG_RCX,
+# define REG_RCX       REG_RCX
+  REG_RSP,
+# define REG_RSP       REG_RSP
+  REG_RIP,
+# define REG_RIP       REG_RIP
+  REG_EFL,
+# define REG_EFL       REG_EFL
+  REG_CSGSFS,          /* Actually short cs, gs, fs, __pad0.  */
+# define REG_CSGSFS    REG_CSGSFS
+  REG_ERR,
+# define REG_ERR       REG_ERR
+  REG_TRAPNO,
+# define REG_TRAPNO    REG_TRAPNO
+  REG_OLDMASK,
+# define REG_OLDMASK   REG_OLDMASK
+  REG_CR2
+# define REG_CR2       REG_CR2
+};
+#endif
+
+struct _libc_fpxreg
+{
+  unsigned short int significand[4];
+  unsigned short int exponent;
+  unsigned short int padding[3];
+};
+
+struct _libc_xmmreg
+{
+  __uint32_t   element[4];
+};
+
+struct _libc_fpstate
+{
+  /* 64-bit FXSAVE format.  */
+  __uint16_t           cwd;
+  __uint16_t           swd;
+  __uint16_t           ftw;
+  __uint16_t           fop;
+  __uint64_t           rip;
+  __uint64_t           rdp;
+  __uint32_t           mxcsr;
+  __uint32_t           mxcr_mask;
+  struct _libc_fpxreg  _st[8];
+  struct _libc_xmmreg  _xmm[16];
+  __uint32_t           padding[24];
+};
+
+/* Structure to describe FPU registers.  */
+typedef struct _libc_fpstate *fpregset_t;
+
+/* Context to describe whole processor state.  */
+typedef struct
+  {
+    gregset_t gregs;
+    /* Note that fpregs is a pointer.  */
+    fpregset_t fpregs;
+    unsigned long __reserved1 [8];
+} mcontext_t;
+
+/* Userlevel context.  */
+typedef struct ucontext
+  {
+    unsigned long int uc_flags;
+    struct ucontext *uc_link;
+    stack_t uc_stack;
+    mcontext_t uc_mcontext;
+    __sigset_t uc_sigmask;
+    struct _libc_fpstate __fpregs_mem;
+  } ucontext_t;
+
+#else /* __WORDSIZE == 32 */
+
+/* Type for general register.  */
+typedef int greg_t;
+
+/* Number of general registers.  */
+#define NGREG  19
+
+/* Container for all general registers.  */
+typedef greg_t gregset_t[NGREG];
+
+#ifdef __USE_GNU
+/* Number of each register is the `gregset_t' array.  */
+enum
+{
+  REG_GS = 0,
+# define REG_GS                REG_GS
+  REG_FS,
+# define REG_FS                REG_FS
+  REG_ES,
+# define REG_ES                REG_ES
+  REG_DS,
+# define REG_DS                REG_DS
+  REG_EDI,
+# define REG_EDI       REG_EDI
+  REG_ESI,
+# define REG_ESI       REG_ESI
+  REG_EBP,
+# define REG_EBP       REG_EBP
+  REG_ESP,
+# define REG_ESP       REG_ESP
+  REG_EBX,
+# define REG_EBX       REG_EBX
+  REG_EDX,
+# define REG_EDX       REG_EDX
+  REG_ECX,
+# define REG_ECX       REG_ECX
+  REG_EAX,
+# define REG_EAX       REG_EAX
+  REG_TRAPNO,
+# define REG_TRAPNO    REG_TRAPNO
+  REG_ERR,
+# define REG_ERR       REG_ERR
+  REG_EIP,
+# define REG_EIP       REG_EIP
+  REG_CS,
+# define REG_CS                REG_CS
+  REG_EFL,
+# define REG_EFL       REG_EFL
+  REG_UESP,
+# define REG_UESP      REG_UESP
+  REG_SS
+# define REG_SS        REG_SS
+};
+#endif
+
+/* Definitions taken from the kernel headers.  */
+struct _libc_fpreg
+{
+  unsigned short int significand[4];
+  unsigned short int exponent;
+};
+
+struct _libc_fpstate
+{
+  unsigned long int cw;
+  unsigned long int sw;
+  unsigned long int tag;
+  unsigned long int ipoff;
+  unsigned long int cssel;
+  unsigned long int dataoff;
+  unsigned long int datasel;
+  struct _libc_fpreg _st[8];
+  unsigned long int status;
+};
+
+/* Structure to describe FPU registers.  */
+typedef struct _libc_fpstate *fpregset_t;
+
+/* Context to describe whole processor state.  */
+typedef struct
+  {
+    gregset_t gregs;
+    /* Due to Linux's history we have to use a pointer here.  The SysV/i386
+       ABI requires a struct with the values.  */
+    fpregset_t fpregs;
+    unsigned long int oldmask;
+    unsigned long int cr2;
+  } mcontext_t;
+
+/* Userlevel context.  */
+typedef struct ucontext
+  {
+    unsigned long int uc_flags;
+    struct ucontext *uc_link;
+    stack_t uc_stack;
+    mcontext_t uc_mcontext;
+    __sigset_t uc_sigmask;
+    struct _libc_fpstate __fpregs_mem;
+  } ucontext_t;
+
+#endif /* __WORDSIZE == 32 */
+
+#endif /* sys/ucontext.h */
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/sysdep.h b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/sysdep.h
new file mode 100644 (file)
index 0000000..5b6fdd6
--- /dev/null
@@ -0,0 +1,25 @@
+/* Assembler macros for x86-64.
+   Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _ROS_X86_64_SYSDEP_H
+#define _ROS_X86_64_SYSDEP_H 1
+
+#include <sysdeps/unix/sysv/linux/x86_64/sysdep.h>
+
+#endif /* ros/x86_64/sysdep.h */
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/tcb-offsets.sym b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/tcb-offsets.sym
new file mode 100644 (file)
index 0000000..60b25f5
--- /dev/null
@@ -0,0 +1,11 @@
+#include <sysdep.h>
+#include <tls.h>
+
+MULTIPLE_THREADS_OFFSET        offsetof (tcbhead_t, multiple_threads)
+POINTER_GUARD          offsetof (tcbhead_t, pointer_guard)
+VGETCPU_CACHE_OFFSET   offsetof (tcbhead_t, vgetcpu_cache)
+#ifndef __ASSUME_PRIVATE_FUTEX
+PRIVATE_FUTEX          offsetof (tcbhead_t, private_futex)
+#endif
+RTLD_SAVESPACE_SSE     offsetof (tcbhead_t, rtld_savespace_sse)
+
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/tls.h b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/ros/x86_64/tls.h
new file mode 100644 (file)
index 0000000..dfb8e16
--- /dev/null
@@ -0,0 +1,478 @@
+/* Definition for thread-local data handling.  nptl/i386 version.
+   Copyright (C) 2002-2007, 2009 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, write to the Free
+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+   02111-1307 USA.  */
+
+#ifndef _TLS_H
+#define _TLS_H 1
+
+#ifndef __ASSEMBLER__
+# include <stdbool.h>
+# include <stddef.h>
+# include <stdint.h>
+# include <stdlib.h>
+# include <sysdep.h>
+# include <kernel-features.h>
+# include <bits/wordsize.h>
+# include <xmmintrin.h>
+#include <sys/mman.h>
+#include <sys/syscall.h>
+#include <ros/procinfo.h>
+#include <ros/procdata.h>
+#include <ros/arch/mmu.h>
+
+
+/* Type for the dtv.  */
+typedef union dtv
+{
+  size_t counter;
+  struct
+  {
+    void *val;
+    bool is_static;
+  } pointer;
+} dtv_t;
+
+
+typedef struct
+{
+  void *tcb;           /* Pointer to the TCB.  Not necessarily the
+                          thread descriptor used by libpthread.  */
+  dtv_t *dtv;
+  void *self;          /* Pointer to the thread descriptor.  */
+  int multiple_threads;
+  int gscope_flag;
+  uintptr_t sysinfo;
+  uintptr_t stack_guard;
+  uintptr_t pointer_guard;
+  unsigned long int vgetcpu_cache[2];
+#ifndef __ASSUME_PRIVATE_FUTEX
+  int private_futex;
+#else
+  int __unused1;
+#endif
+# if __WORDSIZE == 64
+  int rtld_must_xmm_save;
+# endif
+  /* Reservation of some values for the TM ABI.  */
+  void *__private_tm[5];
+# if __WORDSIZE == 64
+  long int __unused2;
+  /* Have space for the post-AVX register size.  */
+  __m128 rtld_savespace_sse[8][4];
+
+  void *__padding[8];
+# endif
+} tcbhead_t;
+
+# define TLS_MULTIPLE_THREADS_IN_TCB 1
+
+typedef struct rthread {
+    tcbhead_t header;
+} rthread_t;
+
+#else /* __ASSEMBLER__ */
+# include <tcb-offsets.h>
+#endif
+
+
+/* We require TLS support in the tools.  */
+#ifndef HAVE_TLS_SUPPORT
+# error "TLS support is required."
+#endif
+
+/* Alignment requirement for the stack.  For IA-32 this is governed by
+   the SSE memory functions.  */
+#define STACK_ALIGN    16
+
+#ifndef __ASSEMBLER__
+/* Get system call information.  */
+# include <sysdep.h>
+
+
+/* Get the thread descriptor definition.  */
+//# include <nptl/descr.h>
+
+
+
+#ifndef LOCK_PREFIX
+# ifdef UP
+#  define LOCK_PREFIX  /* nothing */
+# else
+#  define LOCK_PREFIX  "lock;"
+# endif
+#endif
+
+/* This is the size of the initial TCB.  Can't be just sizeof (tcbhead_t),
+   because NPTL getpid, __libc_alloca_cutoff etc. need (almost) the whole
+   struct rthread even when not linked with -lpthread.  */
+# define TLS_INIT_TCB_SIZE sizeof (struct rthread)
+
+/* Alignment requirements for the initial TCB.  */
+# define TLS_INIT_TCB_ALIGN __alignof__ (struct rthread)
+
+/* This is the size of the TCB.  */
+# define TLS_TCB_SIZE sizeof (struct rthread)
+
+/* Alignment requirements for the TCB.  */
+# define TLS_TCB_ALIGN __alignof__ (struct rthread)
+
+/* The TCB can have any size and the memory following the address the
+   thread pointer points to is unspecified.  Allocate the TCB there.  */
+# define TLS_TCB_AT_TP 1
+
+
+/* Install the dtv pointer.  The pointer passed is to the element with
+   index -1 which contain the length.  */
+# define INSTALL_DTV(descr, dtvp) \
+  ((tcbhead_t *) (descr))->dtv = (dtvp) + 1
+
+/* Install new dtv for current thread.  */
+# define INSTALL_NEW_DTV(dtvp) \
+  ({ struct rthread *__pd;                                                   \
+     THREAD_SETMEM (__pd, header.dtv, (dtvp)); })
+
+/* Return dtv of given thread descriptor.  */
+# define GET_DTV(descr) \
+  (((tcbhead_t *) (descr))->dtv)
+
+
+/* Macros to load from and store into segment registers.  */
+# define TLS_GET_FS() \
+  ({ int __seg; __asm ("movl %%fs, %0" : "=q" (__seg)); __seg; })
+# define TLS_SET_FS(val) \
+  __asm ("movl %0, %%fs" :: "q" (val))
+
+
+/* Code to initially initialize the thread pointer.  This might need
+   special attention since 'errno' is not yet available and if the
+   operation can cause a failure 'errno' must not be touched.  */
+# define TLS_INIT_TP(thrdescr, secondcall) tls_init_tp(thrdescr)
+
+/* Return the address of the dtv for the current thread.  */
+# define THREAD_DTV() \
+  ({ struct rthread *__pd;                                                   \
+     THREAD_GETMEM (__pd, header.dtv); })
+
+/* Return the thread descriptor for the current thread.
+
+   The contained asm must *not* be marked volatile since otherwise
+   assignments like
+       pthread_descr self = thread_self();
+   do not get optimized away.  */
+# define THREAD_SELF \
+  ({ struct rthread *__self;                                                 \
+     asm ("movq %%fs:%c1,%q0" : "=r" (__self)                                \
+         : "i" (offsetof (struct rthread, header.self)));                    \
+     __self;})
+
+/* Magic for libthread_db to know how to do THREAD_SELF.  */
+# define DB_THREAD_SELF_INCLUDE  <sys/reg.h> /* For the FS constant.  */
+# define DB_THREAD_SELF CONST_THREAD_AREA (64, FS)
+
+
+/* Read member of the thread descriptor directly.  */
+# define THREAD_GETMEM(descr, member) \
+  ({ __typeof (descr->member) __value;                                       \
+     if (sizeof (__value) == 1)                                                      \
+       asm volatile ("movb %%fs:%P2,%b0"                                     \
+                    : "=q" (__value)                                         \
+                    : "0" (0), "i" (offsetof (struct rthread, member)));     \
+     else if (sizeof (__value) == 4)                                         \
+       asm volatile ("movl %%fs:%P1,%0"                                              \
+                    : "=r" (__value)                                         \
+                    : "i" (offsetof (struct rthread, member)));              \
+     else                                                                    \
+       {                                                                     \
+        if (sizeof (__value) != 8)                                           \
+          /* There should not be any value with a size other than 1,         \
+             4 or 8.  */                                                     \
+          abort ();                                                          \
+                                                                             \
+        asm volatile ("movq %%fs:%P1,%q0"                                    \
+                      : "=r" (__value)                                       \
+                      : "i" (offsetof (struct rthread, member)));            \
+       }                                                                     \
+     __value; })
+
+
+/* Same as THREAD_GETMEM, but the member offset can be non-constant.  */
+# define THREAD_GETMEM_NC(descr, member, idx) \
+  ({ __typeof (descr->member[0]) __value;                                    \
+     if (sizeof (__value) == 1)                                                      \
+       asm volatile ("movb %%fs:%P2(%q3),%b0"                                \
+                    : "=q" (__value)                                         \
+                    : "0" (0), "i" (offsetof (struct rthread, member[0])),   \
+                      "r" (idx));                                            \
+     else if (sizeof (__value) == 4)                                         \
+       asm volatile ("movl %%fs:%P1(,%q2,4),%0"                                      \
+                    : "=r" (__value)                                         \
+                    : "i" (offsetof (struct rthread, member[0])), "r" (idx));\
+     else                                                                    \
+       {                                                                     \
+        if (sizeof (__value) != 8)                                           \
+          /* There should not be any value with a size other than 1,         \
+             4 or 8.  */                                                     \
+          abort ();                                                          \
+                                                                             \
+        asm volatile ("movq %%fs:%P1(,%q2,8),%q0"                            \
+                      : "=r" (__value)                                       \
+                      : "i" (offsetof (struct rthread, member[0])),          \
+                        "r" (idx));                                          \
+       }                                                                     \
+     __value; })
+
+
+/* Loading addresses of objects on x86-64 needs to be treated special
+   when generating PIC code.  */
+#ifdef __pic__
+# define IMM_MODE "nr"
+#else
+# define IMM_MODE "ir"
+#endif
+
+
+/* Same as THREAD_SETMEM, but the member offset can be non-constant.  */
+# define THREAD_SETMEM(descr, member, value) \
+  ({ if (sizeof (descr->member) == 1)                                        \
+       asm volatile ("movb %b0,%%fs:%P1" :                                   \
+                    : "iq" (value),                                          \
+                      "i" (offsetof (struct rthread, member)));              \
+     else if (sizeof (descr->member) == 4)                                   \
+       asm volatile ("movl %0,%%fs:%P1" :                                    \
+                    : IMM_MODE (value),                                      \
+                      "i" (offsetof (struct rthread, member)));              \
+     else                                                                    \
+       {                                                                     \
+        if (sizeof (descr->member) != 8)                                     \
+          /* There should not be any value with a size other than 1,         \
+             4 or 8.  */                                                     \
+          abort ();                                                          \
+                                                                             \
+        asm volatile ("movq %q0,%%fs:%P1" :                                  \
+                      : IMM_MODE ((unsigned long int) value),                \
+                        "i" (offsetof (struct rthread, member)));            \
+       }})
+
+
+/* Set member of the thread descriptor directly.  */
+# define THREAD_SETMEM_NC(descr, member, idx, value) \
+  ({ if (sizeof (descr->member[0]) == 1)                                     \
+       asm volatile ("movb %b0,%%fs:%P1(%q2)" :                                      \
+                    : "iq" (value),                                          \
+                      "i" (offsetof (struct rthread, member[0])),            \
+                      "r" (idx));                                            \
+     else if (sizeof (descr->member[0]) == 4)                                \
+       asm volatile ("movl %0,%%fs:%P1(,%q2,4)" :                            \
+                    : IMM_MODE (value),                                      \
+                      "i" (offsetof (struct rthread, member[0])),            \
+                      "r" (idx));                                            \
+     else                                                                    \
+       {                                                                     \
+        if (sizeof (descr->member[0]) != 8)                                  \
+          /* There should not be any value with a size other than 1,         \
+             4 or 8.  */                                                     \
+          abort ();                                                          \
+                                                                             \
+        asm volatile ("movq %q0,%%fs:%P1(,%q2,8)" :                          \
+                      : IMM_MODE ((unsigned long int) value),                \
+                        "i" (offsetof (struct rthread, member[0])),          \
+                        "r" (idx));                                          \
+       }})
+
+
+/* Atomic compare and exchange on TLS, returning old value.  */
+# define THREAD_ATOMIC_CMPXCHG_VAL(descr, member, newval, oldval) \
+  ({ __typeof (descr->member) __ret;                                         \
+     __typeof (oldval) __old = (oldval);                                     \
+     if (sizeof (descr->member) == 4)                                        \
+       asm volatile (LOCK_PREFIX "cmpxchgl %2, %%fs:%P3"                     \
+                    : "=a" (__ret)                                           \
+                    : "0" (__old), "r" (newval),                             \
+                      "i" (offsetof (struct rthread, member)));              \
+     else                                                                    \
+       /* Not necessary for other sizes in the moment.  */                   \
+       abort ();                                                             \
+     __ret; })
+
+
+/* Atomic logical and.  */
+# define THREAD_ATOMIC_AND(descr, member, val) \
+  (void) ({ if (sizeof ((descr)->member) == 4)                               \
+             asm volatile (LOCK_PREFIX "andl %1, %%fs:%P0"                   \
+                           :: "i" (offsetof (struct rthread, member)),       \
+                              "ir" (val));                                   \
+           else                                                              \
+             /* Not necessary for other sizes in the moment.  */             \
+             abort (); })
+
+
+/* Atomic set bit.  */
+# define THREAD_ATOMIC_BIT_SET(descr, member, bit) \
+  (void) ({ if (sizeof ((descr)->member) == 4)                               \
+             asm volatile (LOCK_PREFIX "orl %1, %%fs:%P0"                    \
+                           :: "i" (offsetof (struct rthread, member)),       \
+                              "ir" (1 << (bit)));                            \
+           else                                                              \
+             /* Not necessary for other sizes in the moment.  */             \
+             abort (); })
+
+
+# define CALL_THREAD_FCT(descr) \
+  ({ void *__res;                                                            \
+     asm volatile ("movq %%fs:%P2, %%rdi\n\t"                                \
+                  "callq *%%fs:%P1"                                          \
+                  : "=a" (__res)                                             \
+                  : "i" (offsetof (struct rthread, start_routine)),          \
+                    "i" (offsetof (struct rthread, arg))                     \
+                  : "di", "si", "cx", "dx", "r8", "r9", "r10", "r11",        \
+                    "memory", "cc");                                         \
+     __res; })
+
+
+/* Set the stack guard field in TCB head.  */
+#define THREAD_SET_STACK_GUARD(value) \
+  THREAD_SETMEM (THREAD_SELF, header.stack_guard, value)
+#define THREAD_COPY_STACK_GUARD(descr) \
+  ((descr)->header.stack_guard                                               \
+   = THREAD_GETMEM (THREAD_SELF, header.stack_guard))
+
+
+/* Set the pointer guard field in the TCB head.  */
+#define THREAD_SET_POINTER_GUARD(value) \
+  THREAD_SETMEM (THREAD_SELF, header.pointer_guard, value)
+#define THREAD_COPY_POINTER_GUARD(descr) \
+  ((descr)->header.pointer_guard                                             \
+   = THREAD_GETMEM (THREAD_SELF, header.pointer_guard))
+
+
+/* Get and set the global scope generation counter in the TCB head.  */
+#define THREAD_GSCOPE_FLAG_UNUSED 0
+#define THREAD_GSCOPE_FLAG_USED   1
+#define THREAD_GSCOPE_FLAG_WAIT   2
+# define THREAD_GSCOPE_RESET_FLAG() \
+  do                                                                         \
+    { int __res;                                                             \
+      asm volatile ("xchgl %0, %%fs:%P1"                                     \
+                   : "=r" (__res)                                            \
+                   : "i" (offsetof (struct rthread, header.gscope_flag)),    \
+                     "0" (THREAD_GSCOPE_FLAG_UNUSED));                       \
+      if (__res == THREAD_GSCOPE_FLAG_WAIT)                                  \
+       lll_futex_wake (&THREAD_SELF->header.gscope_flag, 1, LLL_PRIVATE);    \
+    }                                                                        \
+  while (0)
+# define THREAD_GSCOPE_SET_FLAG() \
+  THREAD_SETMEM (THREAD_SELF, header.gscope_flag, THREAD_GSCOPE_FLAG_USED)
+# define THREAD_GSCOPE_WAIT() \
+  GL(dl_wait_lookup_done) ()
+
+
+# ifdef SHARED
+/* Defined in dl-trampoline.S.  */
+extern void _dl_x86_64_save_sse (void);
+extern void _dl_x86_64_restore_sse (void);
+
+# define RTLD_CHECK_FOREIGN_CALL \
+  (THREAD_GETMEM (THREAD_SELF, header.rtld_must_xmm_save) != 0)
+
+/* NB: Don't use the xchg operation because that would imply a lock
+   prefix which is expensive and unnecessary.  The cache line is also
+   not contested at all.  */
+#  define RTLD_ENABLE_FOREIGN_CALL \
+  int old_rtld_must_xmm_save = THREAD_GETMEM (THREAD_SELF,                   \
+                                             header.rtld_must_xmm_save);     \
+  THREAD_SETMEM (THREAD_SELF, header.rtld_must_xmm_save, 1)
+
+#  define RTLD_PREPARE_FOREIGN_CALL \
+  do if (THREAD_GETMEM (THREAD_SELF, header.rtld_must_xmm_save))             \
+    {                                                                        \
+      _dl_x86_64_save_sse ();                                                \
+      THREAD_SETMEM (THREAD_SELF, header.rtld_must_xmm_save, 0);             \
+    }                                                                        \
+  while (0)
+
+#  define RTLD_FINALIZE_FOREIGN_CALL \
+  do {                                                                       \
+    if (THREAD_GETMEM (THREAD_SELF, header.rtld_must_xmm_save) == 0)         \
+      _dl_x86_64_restore_sse ();                                             \
+    THREAD_SETMEM (THREAD_SELF, header.rtld_must_xmm_save,                   \
+                  old_rtld_must_xmm_save);                                   \
+  } while (0)
+# endif
+
+/* Reading from the LDT.  Could also use %gs, but that would require including
+ * half of libc's TLS header.  Sparc will probably ignore the vcoreid, so don't
+ * rely on it too much.  The intent of it is vcoreid is the caller's vcoreid,
+ * and that vcoreid might be in the TLS of the caller (it will be for transition
+ * stacks) and we could avoid a trap on x86 to sys_getvcoreid(). */
+static inline void *__get_tls_desc(uint32_t vcoreid)
+{
+       return (void*)(uint64_t)(__procdata.ldt[vcoreid].sd_base_31_24 << 24 |
+                                __procdata.ldt[vcoreid].sd_base_23_16 << 16 |
+                                __procdata.ldt[vcoreid].sd_base_15_0);
+}
+
+/* passing in the vcoreid, since it'll be in TLS of the caller */
+static inline void __set_tls_desc(void *tls_desc, uint32_t vcoreid)
+{
+       /* Keep this technique in sync with sysdeps/ros/i386/tls.h */
+       segdesc_t tmp = SEG(STA_W, (uint64_t)tls_desc, 0xffffffff, 3);
+       __procdata.ldt[vcoreid] = tmp;
+
+       /* GS is still the same (should be!), but it needs to be reloaded to force a
+        * re-read of the LDT. */
+       uint32_t fs = (vcoreid << 3) | 0x07;
+       asm volatile("movl %0,%%fs" : : "r" (fs) : "memory");
+}
+
+static const char* tls_init_tp(void* thrdescr)
+{
+  // TCB lives at thrdescr.
+  // The TCB's head pointer points to itself :-)
+  tcbhead_t* head = (tcbhead_t*)thrdescr;
+  head->tcb = thrdescr;
+  head->self = thrdescr;
+
+  //TODO: think about how to avoid this. Probably add a field to the 
+  // rthreads struct that we manually fill in in _start(). 
+  int core_id = __ros_syscall(SYS_getvcoreid, 0, 0, 0, 0, 0, 0, NULL);
+
+  /* Bug with this whole idea (TODO: (TLSV))*/
+  if(__procdata.ldt == NULL)
+  {
+    size_t sz= (sizeof(segdesc_t)*__procinfo.max_vcores+PGSIZE-1)/PGSIZE*PGSIZE;
+    
+       /* Can't directly call mmap because it tries to set errno, and errno doesn't
+        * exist yet (it relies on tls, and we are currently in the process of
+        * setting it up...) */
+       void *ldt = (void*)__ros_syscall(SYS_mmap, 0, sz, PROT_READ | PROT_WRITE,
+                                        MAP_ANONYMOUS | MAP_POPULATE, -1, 0, NULL);
+    if (ldt == MAP_FAILED)
+      return "tls couldn't allocate memory\n";
+
+    __procdata.ldt = ldt;
+    // force kernel crossing
+       __ros_syscall(SYS_getpid, 0, 0, 0, 0, 0, 0, NULL);
+  }
+
+  __set_tls_desc(thrdescr, core_id);
+  return NULL;
+}
+
+#endif /* __ASSEMBLER__ */
+
+#endif /* tls.h */
diff --git a/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/x86_64/tlsdesc.sym b/tools/compilers/gcc-glibc/glibc-2.14.1-ros/sysdeps/x86_64/tlsdesc.sym
new file mode 100644 (file)
index 0000000..7bad6c2
--- /dev/null
@@ -0,0 +1,17 @@
+#include <stddef.h>
+#include <sysdep.h>
+#include <tls.h>
+#include <link.h>
+#include <dl-tlsdesc.h>
+
+--
+
+-- Abuse tls.h macros to derive offsets relative to the thread register.
+
+DTV_OFFSET                     offsetof(struct rthread, header.dtv)
+
+TLSDESC_ARG                    offsetof(struct tlsdesc, arg)
+
+TLSDESC_GEN_COUNT              offsetof(struct tlsdesc_dynamic_arg, gen_count)
+TLSDESC_MODID                  offsetof(struct tlsdesc_dynamic_arg, tlsinfo.ti_module)
+TLSDESC_MODOFF                 offsetof(struct tlsdesc_dynamic_arg, tlsinfo.ti_offset)