PCI cleanup and better BAR handling
authorBarret Rhoden <brho@cs.berkeley.edu>
Wed, 23 Oct 2013 04:42:22 +0000 (21:42 -0700)
committerBarret Rhoden <brho@cs.berkeley.edu>
Thu, 16 Jan 2014 19:13:41 +0000 (11:13 -0800)
Not perfect, but it gets some of the muck out of the drivers.

kern/arch/x86/pci.c
kern/arch/x86/pci.h
kern/drivers/net/e1000.c
kern/drivers/net/ne2k.c
kern/drivers/net/rl8168.c

index 36e6425..83f4207 100644 (file)
@@ -19,6 +19,67 @@ struct pci_device *irq_pci_map[NUM_IRQS] = {0};
 /* List of all discovered devices */
 struct pcidev_stailq pci_devices = STAILQ_HEAD_INITIALIZER(pci_devices);
 
+static char STD_PCI_DEV[] = "Standard PCI Device";
+static char PCI2PCI[] = "PCI-to-PCI Bridge";
+static char PCI2CARDBUS[] = "PCI-Cardbus Bridge";
+
+/* memory bars have a little dance you go through to detect what the size of the
+ * memory region is.  for 64 bit bars, i'm assuming you only need to do this to
+ * the lower part (no device will need > 4GB, right?). */
+uint32_t pci_membar_get_sz(struct pci_device *pcidev, int bar)
+{
+       /* save the old value, write all 1s, invert, add 1, restore.
+        * http://wiki.osdev.org/PCI for details. */
+       uint8_t bar_off = PCI_BAR0_STD + bar * PCI_BAR_OFF;
+       uint32_t old_val = pcidev_read32(pcidev, bar_off);
+       uint32_t retval;
+       pcidev_write32(pcidev, bar_off, 0xffffffff);
+       /* Don't forget to mask the lower 3 bits! */
+       retval = pcidev_read32(pcidev, bar_off) & PCI_BAR_MEM_MASK;
+       retval = ~retval + 1;
+       pcidev_write32(pcidev, bar_off, old_val);
+       return retval;
+}
+
+/* process the bars.  these will tell us what address space (PIO or memory) and
+ * where the base is.  fills results into pcidev.  i don't know if you can have
+ * multiple bars with conflicting/different regions (like two separate PIO
+ * ranges).  I'm assuming you don't, and will warn if we see one. */
+static void pci_handle_bars(struct pci_device *pcidev)
+{
+       /* only handling standards for now */
+       uint32_t bar_val;
+       int max_bars = pcidev->header_type == STD_PCI_DEV ? MAX_PCI_BAR : 0;
+       for (int i = 0; i < max_bars; i++) {
+               bar_val = pci_getbar(pcidev, i);
+               pcidev->bar[i].raw_bar = bar_val;
+               if (!bar_val)   /* (0 denotes no valid data) */
+                       continue;
+               if (pci_is_iobar(bar_val)) {
+                       pcidev->bar[i].pio_base = pci_getiobar32(bar_val);
+               } else {
+                       if (pci_is_membar32(bar_val)) {
+                               pcidev->bar[i].mmio_base32 = bar_val & PCI_BAR_MEM_MASK;
+                               pcidev->bar[i].mmio_sz = pci_membar_get_sz(pcidev, i);
+                       } else if (pci_is_membar64(bar_val)) {
+                               /* 64 bit, the lower 32 are in this bar, the upper
+                                * are in the next bar */
+                               pcidev->bar[i].mmio_base64 = bar_val & PCI_BAR_MEM_MASK;
+                               assert(i < max_bars - 1);
+                               bar_val = pci_getbar(pcidev, i + 1);    /* read next bar */
+                               /* note we don't check for IO or memsize.  the entire next bar
+                                * is supposed to be for the upper 32 bits. */
+                               pcidev->bar[i].mmio_base64 |= (uint64_t)bar_val << 32;
+                               pcidev->bar[i].mmio_sz = pci_membar_get_sz(pcidev, i);
+                               i++;
+                       }
+               }
+               /* this will track the maximum bar we've had.  it'll include the 64 bit
+                * uppers, as well as devices that have only higher numbered bars. */
+               pcidev->nr_bars = i + 1;
+       }
+}
+
 /* Scans the PCI bus.  Won't actually work for anything other than bus 0, til we
  * sort out how to handle bridge devices. */
 void pci_init(void) {
@@ -34,7 +95,7 @@ void pci_init(void) {
                                /* Skip invalid IDs (not a device) */
                                if (ven_id == INVALID_VENDOR_ID) 
                                        continue;
-                               pcidev = kmalloc(sizeof(struct pci_device), 0);
+                               pcidev = kzmalloc(sizeof(struct pci_device), 0);
                                pcidev->bus = i;
                                pcidev->dev = j;
                                pcidev->func = k;
@@ -51,47 +112,32 @@ void pci_init(void) {
                                pcidev->irqline = result & PCI_IRQLINE_MASK;
                                /* This is the interrupt pin the device uses (INTA# - INTD#) */
                                pcidev->irqpin = (result & PCI_IRQPIN_MASK) >> PCI_IRQPIN_SHFT;
-                               #ifdef CONFIG_PCI_VERBOSE
-                               pcidev_print_info(pcidev, 4);
-                               #else
-                               pcidev_print_info(pcidev, 0);
-                               #endif /* CONFIG_PCI_VERBOSE */
                                if (pcidev->irqpin != PCI_NOINT) {
                                        /* TODO: use a list (check for collisions for now) (massive
                                         * collisions on a desktop with bridge IRQs. */
                                        //assert(!irq_pci_map[pcidev->irqline]);
                                        irq_pci_map[pcidev->irqline] = pcidev;
                                }
-                               /* Loop over the BARs Right now we don't do anything useful with
-                                * this data.  This is legacy code in which I pulled data from
-                                * the BARS during NIC development At some point we will have to
-                                * use this, so the code is still here. */
-                               
-                               // Note: These magic numbers are from the PCI spec (according to OSDev).
-                               #if 0
-                               #ifdef CHECK_BARS
-                               for (int k = 0; k <= 5; k++) {
-                                       reg = 4 + k;
-                                       address = MK_CONFIG_ADDR(bus, dev, func, reg << 2);     
-                               outl(PCI_CONFIG_ADDR, address);
-                               result = inl(PCI_CONFIG_DATA);
-                                       
-                                       if (result == 0) // (0 denotes no valid data)
-                                               continue;
-
-                                       // Read the bottom bit of the BAR. 
-                                       if (result & PCI_BAR_IO_MASK) {
-                                               result = result & PCI_IO_MASK;
-                                               pci_debug("-->BAR%u: %s --> %x\n", k, "IO", result);
-                                       } else {
-                                               result = result & PCI_MEM_MASK;
-                                               pci_debug("-->BAR%u: %s --> %x\n", k, "MEM", result);
-                                       }                                       
+                               switch ((pcidev_read32(pcidev, PCI_HEADER_REG) >> 16) & 0xff) {
+                                       case 0x00:
+                                               pcidev->header_type = STD_PCI_DEV;
+                                               break;
+                                       case 0x01:
+                                               pcidev->header_type = PCI2PCI;
+                                               break;
+                                       case 0x02:
+                                               pcidev->header_type = PCI2CARDBUS;
+                                               break;
+                                       default:
+                                               pcidev->header_type = "Unknown Header Type";
                                }
-                               #endif
-                               #endif
-                               
+                               pci_handle_bars(pcidev);
                                STAILQ_INSERT_TAIL(&pci_devices, pcidev, all_dev);
+                               #ifdef CONFIG_PCI_VERBOSE
+                               pcidev_print_info(pcidev, 4);
+                               #else
+                               pcidev_print_info(pcidev, 0);
+                               #endif /* CONFIG_PCI_VERBOSE */
                        }
 }
 
@@ -130,11 +176,11 @@ void pcidev_write32(struct pci_device *pcidev, unsigned short offset,
        pci_write32(pcidev->bus, pcidev->dev, pcidev->func, offset, value);
 }
 
-/* Gets any old raw bar. */
+/* Gets any old raw bar, with some catches based on type. */
 uint32_t pci_getbar(struct pci_device *pcidev, unsigned int bar)
 {
        uint32_t value, type;
-       if (bar > 5)
+       if (bar >= MAX_PCI_BAR)
                panic("Nonexistant bar requested!");
        value = pcidev_read32(pcidev, PCI_HEADER_REG);
        type = (value >> 16) & 0xff;
@@ -153,6 +199,20 @@ bool pci_is_iobar(uint32_t bar)
        return bar & PCI_BAR_IO;
 }
 
+bool pci_is_membar32(uint32_t bar)
+{
+       if (pci_is_iobar(bar))
+               return FALSE;
+       return (bar & PCI_MEMBAR_TYPE) == PCI_MEMBAR_32BIT;
+}
+
+bool pci_is_membar64(uint32_t bar)
+{
+       if (pci_is_iobar(bar))
+               return FALSE;
+       return (bar & PCI_MEMBAR_TYPE) == PCI_MEMBAR_64BIT;
+}
+
 /* Helper to get the address from a membar.  Check the type beforehand */
 uint32_t pci_getmembar32(uint32_t bar)
 {
@@ -225,25 +285,45 @@ void pcidev_print_info(struct pci_device *pcidev, int verbosity)
        pcidev_get_cldesc(pcidev, &class, &subcl, &progif);
        pcidev_get_devdesc(pcidev, &ven_sht, &ven_fl, &chip, &chip_txt);
 
-       printk("%02x:%02x.%x %s: %s %s %s\n",
+       printk("%02x:%02x.%x %s: %s %s %s: %s\n",
               pcidev->bus,
               pcidev->dev,
               pcidev->func,
               subcl,
               ven_sht,
               chip,
-              chip_txt);
-       if (verbosity > 1)
-               printk("        IRQ: %02d IRQ pin: %02p\n",
-                      pcidev->irqline,
-                      pcidev->irqpin);
-       if (verbosity > 2)
-               printk("        Vendor Id: %04p Device Id: %04p\n",
-                      pcidev->ven_id,
-                      pcidev->dev_id);
-       if (verbosity > 3)
-               printk("        %s %s %s\n",
-                      class,
-                      progif,
-                      ven_fl);
+              chip_txt,
+                  pcidev->header_type);
+       if (verbosity < 1)      /* whatever */
+               return;
+       printk("\tIRQ: %02d IRQ pin: 0x%02x\n",
+              pcidev->irqline,
+              pcidev->irqpin);
+       printk("\tVendor Id: 0x%04x Device Id: 0x%04x\n",
+              pcidev->ven_id,
+              pcidev->dev_id);
+       printk("\t%s %s %s\n",
+              class,
+              progif,
+              ven_fl);
+       for (int i = 0; i < pcidev->nr_bars; i++) {
+               if (pcidev->bar[i].raw_bar == 0)
+                       continue;
+               printk("\tBAR %d: ", i);
+               if (pci_is_iobar(pcidev->bar[i].raw_bar)) {
+                       assert(pcidev->bar[i].pio_base);
+                       printk("IO port 0x%04x\n", pcidev->bar[i].pio_base);
+               } else {
+                       bool bar_is_64 = pci_is_membar64(pcidev->bar[i].raw_bar);
+                       printk("MMIO Base %p, MMIO Size %p\n",
+                              bar_is_64 ? pcidev->bar[i].mmio_base64 :
+                                          pcidev->bar[i].mmio_base32,
+                              pcidev->bar[i].mmio_sz);
+                       /* Takes up two bars */
+                       if (bar_is_64) {
+                               assert(!pcidev->bar[i].mmio_base32);    /* double-check */
+                               i++;
+                       }
+               }
+       }
 }
index 289a780..9e40487 100644 (file)
@@ -27,8 +27,6 @@
 /* TODO: gut this (when the IOAPIC is fixed) */
 #define INVALID_BUS                    0xFFFF
 
-#define PCI_IO_MASK                    0xfff8
-#define PCI_MEM_MASK           0xfffffff0
 #define PCI_IRQLINE_MASK       0x000000ff
 #define PCI_IRQPIN_MASK                0x0000ff00
 #define PCI_IRQPIN_SHFT                8
 #define PCI_ST_PAR_ERR         (1 << 15)
 
 /* BARS: Base Address Registers */
-#define PCI_BAR_IO_MASK                0x1
-#define PCI_BAR_IO PCI_BAR_IO_MASK
+#define PCI_BAR_IO                     0x1                     /* 1 == IO, 0 == Mem */
+#define PCI_BAR_IO_MASK                0xfffffffc
+#define PCI_BAR_MEM_MASK       0xfffffff0
 #define PCI_MEMBAR_TYPE        (3 << 1)
 #define PCI_MEMBAR_32BIT       0x0
 #define PCI_MEMBAR_RESV        0x2                     /* type 0x1 shifted to MEMBAR_TYPE */
 // dont check em.
 #define CHECK_BARS                     0
 
+#define MAX_PCI_BAR                    6
+
+struct pci_bar {
+       uint32_t                                        raw_bar;
+       uint32_t                                        pio_base;
+       uint32_t                                        mmio_base32;
+       uint64_t                                        mmio_base64;
+       uint32_t                                        mmio_sz;
+};
+
 /* Struct for some meager contents of a PCI device */
 struct pci_device {
        STAILQ_ENTRY(pci_device)        all_dev;        /* list of all devices */
        SLIST_ENTRY(pci_device)         irq_dev;        /* list of all devs off an irq */
+       bool                                            in_use;         /* prevent double discovery */
        uint8_t                                         bus;
        uint8_t                                         dev;
        uint8_t                                         func;
@@ -149,9 +159,12 @@ struct pci_device {
        uint16_t                                        ven_id;
        uint8_t                                         irqline;
        uint8_t                                         irqpin;
+       char                                            *header_type;
        uint8_t                                         class;
        uint8_t                                         subclass;
        uint8_t                                         progif;
+       uint8_t                                         nr_bars;
+       struct pci_bar                          bar[MAX_PCI_BAR];
 };
 
 /* List of all discovered devices */
@@ -173,8 +186,13 @@ void pci_write32(unsigned short bus, unsigned short dev, unsigned short func,
 uint32_t pcidev_read32(struct pci_device *pcidev, unsigned short offset);
 void pcidev_write32(struct pci_device *pcidev, unsigned short offset,
                     uint32_t value);
+
+/* BAR helpers, some more helpful than others. */
+uint32_t pci_membar_get_sz(struct pci_device *pcidev, int bar);
 uint32_t pci_getbar(struct pci_device *pcidev, unsigned int bar);
 bool pci_is_iobar(uint32_t bar);
+bool pci_is_membar32(uint32_t bar);
+bool pci_is_membar64(uint32_t bar);
 uint32_t pci_getmembar32(uint32_t bar);
 uint32_t pci_getiobar32(uint32_t bar);
 
index cb607f4..89a93da 100644 (file)
@@ -142,7 +142,7 @@ void e1000_init() {
  */
 void e1000_handle_bar0(uint32_t addr) {
 
-       if (addr & PCI_BAR_IO_MASK) {
+       if (addr & PCI_BAR_IO) {
                e1000_debug("-->IO PORT MODE\n");
                panic("IO PORT MODE NOT SUPPORTED\n");
        } else {
@@ -153,7 +153,7 @@ void e1000_handle_bar0(uint32_t addr) {
                 // write all 1's denotes the size
                outl(PCI_CONFIG_DATA, 0xFFFFFFFF);
                uint32_t result = inl(PCI_CONFIG_DATA);
-               result = result & PCI_MEM_MASK;
+               result = result & PCI_BAR_MEM_MASK;
                result = (result ^ 0xFFFFFFFF) + 1;
                e1000_addr_size = result;
                e1000_debug("-->MMIO Size %x\n", e1000_addr_size);
@@ -217,15 +217,15 @@ int e1000_scan_pci(void)
                        if (result == 0) // (0 denotes no valid data)
                                continue;
                        // Read the bottom bit of the BAR. 
-                       if (result & PCI_BAR_IO_MASK) {
-                               result = result & PCI_IO_MASK;
+                       if (result & PCI_BAR_IO) {
+                               result = result & PCI_BAR_IO_MASK;
                                e1000_debug("-->BAR%u: %s --> %x\n", k, "IO", result);
                        } else {
-                               result = result & PCI_MEM_MASK;
+                               result = result & PCI_BAR_MEM_MASK;
                                e1000_debug("-->BAR%u: %s --> %x\n", k, "MEM", result);
                        }
                        if (k == 0) { // BAR0 denotes the IO Addr for the device
-                               if (result & PCI_BAR_IO_MASK) {
+                               if (result & PCI_BAR_IO) {
                                        e1000_debug("-->IO PORT MODE\n");
                                        panic("IO PORT MODE NOT SUPPORTED\n");
                                } else {
index 9e7c9ad..85b1add 100644 (file)
@@ -119,11 +119,11 @@ int ne2k_scan_pci() {
                        if (result == 0) // (0 denotes no valid data)
                                continue;
                        // Read the bottom bit of the BAR. 
-                       if (result & PCI_BAR_IO_MASK) {
-                               result = result & PCI_IO_MASK;
+                       if (result & PCI_BAR_IO) {
+                               result = result & PCI_BAR_IO_MASK;
                                ne2k_debug("-->BAR%u: %s --> %x\n", k, "IO", result);
                        } else {
-                               result = result & PCI_MEM_MASK;
+                               result = result & PCI_BAR_MEM_MASK;
                                ne2k_debug("-->BAR%u: %s --> %x\n", k, "MEM", result);
                        }
                        // TODO Switch to memory mapped instead of IO?
index 924d3ce..4e6d6ac 100644 (file)
@@ -145,11 +145,11 @@ int rl8168_scan_pci() {
                        if (result == 0) // (0 denotes no valid data)
                                continue;
                        // Read the bottom bit of the BAR. 
-                       if (result & PCI_BAR_IO_MASK) {
-                               result = result & PCI_IO_MASK;
+                       if (result & PCI_BAR_IO) {
+                               result = result & PCI_BAR_IO_MASK;
                                rl8168_debug("-->BAR%u: %s --> %x\n", k, "IO", result);
                        } else {
-                               result = result & PCI_MEM_MASK;
+                               result = result & PCI_BAR_MEM_MASK;
                                rl8168_debug("-->BAR%u: %s --> %x\n", k, "MEM", result);
                        }
                        // TODO Switch to memory mapped instead of IO?