Remove unused virtualization code
authorBarret Rhoden <brho@cs.berkeley.edu>
Sat, 16 Sep 2017 14:56:13 +0000 (10:56 -0400)
committerBarret Rhoden <brho@cs.berkeley.edu>
Sat, 16 Sep 2017 14:56:13 +0000 (10:56 -0400)
I looked for any .c file that wasn't in a Kbuild, excluding the Linux
mlx4 and bnx2x drivers.  I also scanned the header files and checked any
suspcious ones to see if they were #included and used.

Signed-off-by: Barret Rhoden <brho@cs.berkeley.edu>
.gitignore
kern/arch/x86/emulate.c [deleted file]
kern/arch/x86/emulate.h [deleted file]
kern/arch/x86/paging_tmpl.h [deleted file]
kern/arch/x86/vmm/intel/cpufeature.h [deleted file]
kern/arch/x86/vmm/intel/vmx.c

index bd10255..cd0ba74 100644 (file)
@@ -21,7 +21,6 @@ kern/include/arch
 kern/src/arch
 kern/src/build_info.*
 kern/src/kconfig_info.c
-kern/src/error.c
 user/parlib/include/parlib/arch
 user/parlib/syscall_tbl.c
 Documentation/doxygen/rosdoc
diff --git a/kern/arch/x86/emulate.c b/kern/arch/x86/emulate.c
deleted file mode 100644 (file)
index 2377a12..0000000
+++ /dev/null
@@ -1,1347 +0,0 @@
-/******************************************************************************
- * x86_emulate.c
- *
- * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
- *
- * Copyright (c) 2005 Keir Fraser
- *
- * Linux coding style, mod r/m decoder, segment base fixes, real-mode
- * privieged instructions:
- *
- * Copyright (C) 2006 Qumranet
- *
- *   Avi Kivity <avi@qumranet.com>
- *   Yaniv Kamay <yaniv@qumranet.com>
- *
- * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
- */
-
-#define DEBUG
-#include <kmalloc.h>
-#include <string.h>
-#include <stdio.h>
-#include <assert.h>
-#include <error.h>
-#include <pmap.h>
-#include <sys/queue.h>
-#include <smp.h>
-#include <kref.h>
-#include <atomic.h>
-#include <alarm.h>
-#include <event.h>
-#include <umem.h>
-#include <devalarm.h>
-#include <arch/types.h>
-#include <arch/vm.h>
-#include <arch/emulate.h>
-#include <arch/vmdebug.h>
-
-/*
- * Opcode effective-address decode tables.
- * Note that we only emulate instructions that have at least one memory
- * operand (excluding implicit stack references). We assume that stack
- * references and instruction fetches will never occur in special memory
- * areas that require emulation. So, for example, 'mov <imm>,<reg>' need
- * not be handled.
- */
-
-/* Operand sizes: 8-bit operands or specified/overridden size. */
-#define ByteOp      (1<<0)     /* 8-bit operands. */
-/* Destination operand type. */
-#define ImplicitOps (1<<1)     /* Implicit in opcode. No generic decode. */
-#define DstReg      (2<<1)     /* Register operand. */
-#define DstMem      (3<<1)     /* Memory operand. */
-#define DstMask     (3<<1)
-/* Source operand type. */
-#define SrcNone     (0<<3)     /* No source operand. */
-#define SrcImplicit (0<<3)     /* Source operand is implicit in the opcode. */
-#define SrcReg      (1<<3)     /* Register operand. */
-#define SrcMem      (2<<3)     /* Memory operand. */
-#define SrcMem16    (3<<3)     /* Memory operand (16-bit). */
-#define SrcMem32    (4<<3)     /* Memory operand (32-bit). */
-#define SrcImm      (5<<3)     /* Immediate operand. */
-#define SrcImmByte  (6<<3)     /* 8-bit sign-extended immediate operand. */
-#define SrcMask     (7<<3)
-/* Generic ModRM decode. */
-#define ModRM       (1<<6)
-/* Destination is only written; never read. */
-#define Mov         (1<<7)
-
-static uint8_t opcode_table[256] = {
-       /* 0x00 - 0x07 */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-       0, 0, 0, 0,
-       /* 0x08 - 0x0F */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-       0, 0, 0, 0,
-       /* 0x10 - 0x17 */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-       0, 0, 0, 0,
-       /* 0x18 - 0x1F */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-       0, 0, 0, 0,
-       /* 0x20 - 0x27 */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-       0, 0, 0, 0,
-       /* 0x28 - 0x2F */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-       0, 0, 0, 0,
-       /* 0x30 - 0x37 */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-       0, 0, 0, 0,
-       /* 0x38 - 0x3F */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
-       0, 0, 0, 0,
-       /* 0x40 - 0x4F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x50 - 0x5F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x60 - 0x6F */
-       0, 0, 0, DstReg | SrcMem32 | ModRM | Mov /* movsxd (x86/64) */ ,
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x70 - 0x7F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x80 - 0x87 */
-       ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImm | ModRM,
-       ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM,
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
-       /* 0x88 - 0x8F */
-       ByteOp | DstMem | SrcReg | ModRM | Mov, DstMem | SrcReg | ModRM | Mov,
-       ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       0, 0, 0, DstMem | SrcNone | ModRM | Mov,
-       /* 0x90 - 0x9F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xA0 - 0xA7 */
-       ByteOp | DstReg | SrcMem | Mov, DstReg | SrcMem | Mov,
-       ByteOp | DstMem | SrcReg | Mov, DstMem | SrcReg | Mov,
-       ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
-       ByteOp | ImplicitOps, ImplicitOps,
-       /* 0xA8 - 0xAF */
-       0, 0, ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
-       ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
-       ByteOp | ImplicitOps, ImplicitOps,
-       /* 0xB0 - 0xBF */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xC0 - 0xC7 */
-       ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM, 0, 0,
-       0, 0, ByteOp | DstMem | SrcImm | ModRM | Mov,
-       DstMem | SrcImm | ModRM | Mov,
-       /* 0xC8 - 0xCF */
-       0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xD0 - 0xD7 */
-       ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
-       ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
-       0, 0, 0, 0,
-       /* 0xD8 - 0xDF */
-       0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xE0 - 0xEF */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xF0 - 0xF7 */
-       0, 0, 0, 0,
-       0, 0, ByteOp | DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM,
-       /* 0xF8 - 0xFF */
-       0, 0, 0, 0,
-       0, 0, ByteOp | DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM
-};
-
-static uint8_t twobyte_table[256] = {
-       /* 0x00 - 0x0F */
-       0, SrcMem | ModRM | DstReg | Mov, 0, 0, 0, 0, 0, 0,
-       0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0,
-       /* 0x10 - 0x1F */
-       0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x20 - 0x2F */
-       ImplicitOps, 0, ImplicitOps, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x30 - 0x3F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x40 - 0x47 */
-       DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       /* 0x48 - 0x4F */
-       DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
-       /* 0x50 - 0x5F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x60 - 0x6F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x70 - 0x7F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x80 - 0x8F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0x90 - 0x9F */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xA0 - 0xA7 */
-       0, 0, 0, DstMem | SrcReg | ModRM, 0, 0, 0, 0,
-       /* 0xA8 - 0xAF */
-       0, 0, 0, DstMem | SrcReg | ModRM, 0, 0, 0, 0,
-       /* 0xB0 - 0xB7 */
-       ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 0,
-       DstMem | SrcReg | ModRM,
-       0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
-       DstReg | SrcMem16 | ModRM | Mov,
-       /* 0xB8 - 0xBF */
-       0, 0, DstMem | SrcImmByte | ModRM, DstMem | SrcReg | ModRM,
-       0, 0, ByteOp | DstReg | SrcMem | ModRM | Mov,
-       DstReg | SrcMem16 | ModRM | Mov,
-       /* 0xC0 - 0xCF */
-       0, 0, 0, 0, 0, 0, 0, ImplicitOps | ModRM, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xD0 - 0xDF */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xE0 - 0xEF */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-       /* 0xF0 - 0xFF */
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-/* Type, address-of, and value of an instruction's operand. */
-struct operand {
-       enum { OP_REG, OP_MEM, OP_IMM } type;
-       unsigned int bytes;
-       unsigned long val, orig_val, *ptr;
-};
-
-/* EFLAGS bit definitions. */
-#define EFLG_OF (1<<11)
-#define EFLG_DF (1<<10)
-#define EFLG_SF (1<<7)
-#define EFLG_ZF (1<<6)
-#define EFLG_AF (1<<4)
-#define EFLG_PF (1<<2)
-#define EFLG_CF (1<<0)
-
-/*
- * Instruction emulation:
- * Most instructions are emulated directly via a fragment of inline assembly
- * code. This allows us to save/restore EFLAGS and thus very easily pick up
- * any modified flags.
- */
-
-#if defined(__x86_64__)
-#define _LO32 "k"      /* force 32-bit operand */
-#define _STK  "%%rsp"  /* stack pointer */
-#elif defined(__i386__)
-#define _LO32 ""       /* force 32-bit operand */
-#define _STK  "%%esp"  /* stack pointer */
-#endif
-
-/*
- * These EFLAGS bits are restored from saved value during emulation, and
- * any changes are written back to the saved value after emulation.
- */
-#define EFLAGS_MASK (EFLG_OF|EFLG_SF|EFLG_ZF|EFLG_AF|EFLG_PF|EFLG_CF)
-
-/* Before executing instruction: restore necessary bits in EFLAGS. */
-#define _PRE_EFLAGS(_sav, _msk, _tmp) \
-       /* EFLAGS = (_sav & _msk) | (EFLAGS & ~_msk); */        \
-       "push %"_sav"; "                                        \
-       "movl %"_msk",%"_LO32 _tmp"; "                          \
-       "andl %"_LO32 _tmp",("_STK"); "                         \
-       "pushf; "                                               \
-       "notl %"_LO32 _tmp"; "                                  \
-       "andl %"_LO32 _tmp",("_STK"); "                         \
-       "pop  %"_tmp"; "                                        \
-       "orl  %"_LO32 _tmp",("_STK"); "                         \
-       "popf; "                                                \
-       /* _sav &= ~msk; */                                     \
-       "movl %"_msk",%"_LO32 _tmp"; "                          \
-       "notl %"_LO32 _tmp"; "                                  \
-       "andl %"_LO32 _tmp",%"_sav"; "
-
-/* After executing instruction: write-back necessary bits in EFLAGS. */
-#define _POST_EFLAGS(_sav, _msk, _tmp) \
-       /* _sav |= EFLAGS & _msk; */            \
-       "pushf; "                               \
-       "pop  %"_tmp"; "                        \
-       "andl %"_msk",%"_LO32 _tmp"; "          \
-       "orl  %"_LO32 _tmp",%"_sav"; "
-
-/* Raw emulation: instruction has two explicit operands. */
-#define __emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy) \
-       do {                                                                \
-               unsigned long _tmp;                                         \
-                                                                           \
-               switch ((_dst).bytes) {                                     \
-               case 2:                                                     \
-                       __asm__ __volatile__ (                              \
-                               _PRE_EFLAGS("0","4","2")                    \
-                               _op"w %"_wx"3,%1; "                         \
-                               _POST_EFLAGS("0","4","2")                   \
-                               : "=m" (_eflags), "=m" ((_dst).val),        \
-                                 "=&r" (_tmp)                              \
-                               : _wy ((_src).val), "i" (EFLAGS_MASK) );    \
-                       break;                                              \
-               case 4:                                                     \
-                       __asm__ __volatile__ (                              \
-                               _PRE_EFLAGS("0","4","2")                    \
-                               _op"l %"_lx"3,%1; "                         \
-                               _POST_EFLAGS("0","4","2")                   \
-                               : "=m" (_eflags), "=m" ((_dst).val),        \
-                                 "=&r" (_tmp)                              \
-                               : _ly ((_src).val), "i" (EFLAGS_MASK) );    \
-                       break;                                              \
-               case 8:                                                     \
-                       __emulate_2op_8byte(_op, _src, _dst,                \
-                                           _eflags, _qx, _qy);             \
-                       break;                                              \
-               }                                                           \
-       } while (0)
-
-#define __emulate_2op(_op,_src,_dst,_eflags,_bx,_by,_wx,_wy,_lx,_ly,_qx,_qy) \
-       do {                                                                 \
-               unsigned long _tmp;                                          \
-               switch ( (_dst).bytes )                                      \
-               {                                                            \
-               case 1:                                                      \
-                       __asm__ __volatile__ (                               \
-                               _PRE_EFLAGS("0","4","2")                     \
-                               _op"b %"_bx"3,%1; "                          \
-                               _POST_EFLAGS("0","4","2")                    \
-                               : "=m" (_eflags), "=m" ((_dst).val),         \
-                                 "=&r" (_tmp)                               \
-                               : _by ((_src).val), "i" (EFLAGS_MASK) );     \
-                       break;                                               \
-               default:                                                     \
-                       __emulate_2op_nobyte(_op, _src, _dst, _eflags,       \
-                                            _wx, _wy, _lx, _ly, _qx, _qy);  \
-                       break;                                               \
-               }                                                            \
-       } while (0)
-
-/* Source operand is byte-sized and may be restricted to just %cl. */
-#define emulate_2op_SrcB(_op, _src, _dst, _eflags)                      \
-       __emulate_2op(_op, _src, _dst, _eflags,                         \
-                     "b", "c", "b", "c", "b", "c", "b", "c")
-
-/* Source operand is byte, word, long or quad sized. */
-#define emulate_2op_SrcV(_op, _src, _dst, _eflags)                      \
-       __emulate_2op(_op, _src, _dst, _eflags,                         \
-                     "b", "q", "w", "r", _LO32, "r", "", "r")
-
-/* Source operand is word, long or quad sized. */
-#define emulate_2op_SrcV_nobyte(_op, _src, _dst, _eflags)               \
-       __emulate_2op_nobyte(_op, _src, _dst, _eflags,                  \
-                            "w", "r", _LO32, "r", "", "r")
-
-/* Instruction has only one explicit operand (no source operand). */
-#define emulate_1op(_op, _dst, _eflags)                                    \
-       do {                                                            \
-               unsigned long _tmp;                                     \
-                                                                       \
-               switch ( (_dst).bytes )                                 \
-               {                                                       \
-               case 1:                                                 \
-                       __asm__ __volatile__ (                          \
-                               _PRE_EFLAGS("0","3","2")                \
-                               _op"b %1; "                             \
-                               _POST_EFLAGS("0","3","2")               \
-                               : "=m" (_eflags), "=m" ((_dst).val),    \
-                                 "=&r" (_tmp)                          \
-                               : "i" (EFLAGS_MASK) );                  \
-                       break;                                          \
-               case 2:                                                 \
-                       __asm__ __volatile__ (                          \
-                               _PRE_EFLAGS("0","3","2")                \
-                               _op"w %1; "                             \
-                               _POST_EFLAGS("0","3","2")               \
-                               : "=m" (_eflags), "=m" ((_dst).val),    \
-                                 "=&r" (_tmp)                          \
-                               : "i" (EFLAGS_MASK) );                  \
-                       break;                                          \
-               case 4:                                                 \
-                       __asm__ __volatile__ (                          \
-                               _PRE_EFLAGS("0","3","2")                \
-                               _op"l %1; "                             \
-                               _POST_EFLAGS("0","3","2")               \
-                               : "=m" (_eflags), "=m" ((_dst).val),    \
-                                 "=&r" (_tmp)                          \
-                               : "i" (EFLAGS_MASK) );                  \
-                       break;                                          \
-               case 8:                                                 \
-                       __emulate_1op_8byte(_op, _dst, _eflags);        \
-                       break;                                          \
-               }                                                       \
-       } while (0)
-
-/* Emulate an instruction with quadword operands (x86/64 only). */
-#if defined(__x86_64__)
-#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)           \
-       do {                                                              \
-               __asm__ __volatile__ (                                    \
-                       _PRE_EFLAGS("0","4","2")                          \
-                       _op"q %"_qx"3,%1; "                               \
-                       _POST_EFLAGS("0","4","2")                         \
-                       : "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
-                       : _qy ((_src).val), "i" (EFLAGS_MASK) );          \
-       } while (0)
-
-#define __emulate_1op_8byte(_op, _dst, _eflags)                           \
-       do {                                                              \
-               __asm__ __volatile__ (                                    \
-                       _PRE_EFLAGS("0","3","2")                          \
-                       _op"q %1; "                                       \
-                       _POST_EFLAGS("0","3","2")                         \
-                       : "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
-                       : "i" (EFLAGS_MASK) );                            \
-       } while (0)
-
-#elif defined(__i386__)
-#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)
-#define __emulate_1op_8byte(_op, _dst, _eflags)
-#endif /* __i386__ */
-
-/* Fetch next part of the instruction being emulated. */
-#define insn_fetch(_type, _size, _eip)                                  \
-({     unsigned long _x;                                               \
-       rc = ops->read_std((unsigned long)(_eip) + ctxt->cs_base, &_x,  \
-                                                  (_size), ctxt);       \
-       if ( rc != 0 )                                                  \
-               goto done;                                              \
-       (_eip) += (_size);                                              \
-       (_type)_x;                                                      \
-})
-
-/* Access/update address held in a register, based on addressing mode. */
-#define register_address(base, reg)                                     \
-       ((base) + ((ad_bytes == sizeof(unsigned long)) ? (reg) :        \
-                  ((reg) & ((1UL << (ad_bytes << 3)) - 1))))
-
-#define register_address_increment(reg, inc)                            \
-       do {                                                            \
-               /* signed type ensures sign extension to long */        \
-               int _inc = (inc);                                       \
-               if ( ad_bytes == sizeof(unsigned long) )                \
-                       (reg) += _inc;                                  \
-               else                                                    \
-                       (reg) = ((reg) & ~((1UL << (ad_bytes << 3)) - 1)) | \
-                          (((reg) + _inc) & ((1UL << (ad_bytes << 3)) - 1)); \
-       } while (0)
-
-void *decode_register(uint8_t modrm_reg, unsigned long *regs, int highbyte_regs)
-{
-       void *p;
-
-       p = &regs[modrm_reg];
-       if (highbyte_regs && modrm_reg >= 4 && modrm_reg < 8)
-               p = (unsigned char *)&regs[modrm_reg & 3] + 1;
-       return p;
-}
-
-static int read_descriptor(struct x86_emulate_ctxt *ctxt,
-                                                  struct x86_emulate_ops *ops,
-                                                  void *ptr,
-                                                  uint16_t * size, unsigned long *address,
-                                                  int op_bytes)
-{
-       int rc;
-
-       if (op_bytes == 2)
-               op_bytes = 3;
-       *address = 0;
-       rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2, ctxt);
-       if (rc)
-               return rc;
-       rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes, ctxt);
-       return rc;
-}
-
-int
-x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
-{
-       uint8_t b, d, sib, twobyte = 0, rex_prefix = 0;
-       uint8_t modrm, modrm_mod = 0, modrm_reg = 0, modrm_rm = 0;
-       unsigned long *override_base = NULL;
-       unsigned int op_bytes, ad_bytes, lock_prefix = 0, rep_prefix = 0, i;
-       int rc = 0;
-       struct operand src, dst;
-       unsigned long cr2 = ctxt->cr2;
-       int mode = ctxt->mode;
-       unsigned long modrm_ea;
-       int use_modrm_ea, index_reg = 0, base_reg = 0, scale, rip_relative = 0;
-
-       /* Shadow copy of register state. Committed on successful emulation. */
-       unsigned long _regs[NR_VCPU_REGS];
-       unsigned long _eip = ctxt->vcpu->rip, _eflags = ctxt->eflags;
-       unsigned long modrm_val = 0;
-
-       memcpy(_regs, ctxt->vcpu->regs, sizeof _regs);
-
-       switch (mode) {
-               case X86EMUL_MODE_REAL:
-               case X86EMUL_MODE_PROT16:
-                       op_bytes = ad_bytes = 2;
-                       break;
-               case X86EMUL_MODE_PROT32:
-                       op_bytes = ad_bytes = 4;
-                       break;
-#ifdef __x86_64__
-               case X86EMUL_MODE_PROT64:
-                       op_bytes = 4;
-                       ad_bytes = 8;
-                       break;
-#endif
-               default:
-                       return -1;
-       }
-
-       /* Legacy prefixes. */
-       for (i = 0; i < 8; i++) {
-               switch (b = insn_fetch(uint8_t, 1, _eip)) {
-                       case 0x66:      /* operand-size override */
-                               op_bytes ^= 6;  /* switch between 2/4 bytes */
-                               break;
-                       case 0x67:      /* address-size override */
-                               if (mode == X86EMUL_MODE_PROT64)
-                                       ad_bytes ^= 12; /* switch between 4/8 bytes */
-                               else
-                                       ad_bytes ^= 6;  /* switch between 2/4 bytes */
-                               break;
-                       case 0x2e:      /* CS override */
-                               override_base = &ctxt->cs_base;
-                               break;
-                       case 0x3e:      /* DS override */
-                               override_base = &ctxt->ds_base;
-                               break;
-                       case 0x26:      /* ES override */
-                               override_base = &ctxt->es_base;
-                               break;
-                       case 0x64:      /* FS override */
-                               override_base = &ctxt->fs_base;
-                               break;
-                       case 0x65:      /* GS override */
-                               override_base = &ctxt->gs_base;
-                               break;
-                       case 0x36:      /* SS override */
-                               override_base = &ctxt->ss_base;
-                               break;
-                       case 0xf0:      /* LOCK */
-                               lock_prefix = 1;
-                               break;
-                       case 0xf3:      /* REP/REPE/REPZ */
-                               rep_prefix = 1;
-                               break;
-                       case 0xf2:      /* REPNE/REPNZ */
-                               break;
-                       default:
-                               goto done_prefixes;
-               }
-       }
-
-done_prefixes:
-
-       /* REX prefix. */
-       if ((mode == X86EMUL_MODE_PROT64) && ((b & 0xf0) == 0x40)) {
-               rex_prefix = b;
-               if (b & 8)
-                       op_bytes = 8;   /* REX.W */
-               modrm_reg = (b & 4) << 1;       /* REX.R */
-               index_reg = (b & 2) << 2;       /* REX.X */
-               modrm_rm = base_reg = (b & 1) << 3;     /* REG.B */
-               b = insn_fetch(uint8_t, 1, _eip);
-       }
-
-       /* Opcode byte(s). */
-       d = opcode_table[b];
-       if (d == 0) {
-               /* Two-byte opcode? */
-               if (b == 0x0f) {
-                       twobyte = 1;
-                       b = insn_fetch(uint8_t, 1, _eip);
-                       d = twobyte_table[b];
-               }
-
-               /* Unrecognised? */
-               if (d == 0)
-                       goto cannot_emulate;
-       }
-
-       /* ModRM and SIB bytes. */
-       if (d & ModRM) {
-               modrm = insn_fetch(uint8_t, 1, _eip);
-               modrm_mod |= (modrm & 0xc0) >> 6;
-               modrm_reg |= (modrm & 0x38) >> 3;
-               modrm_rm |= (modrm & 0x07);
-               modrm_ea = 0;
-               use_modrm_ea = 1;
-
-               if (modrm_mod == 3) {
-                       modrm_val = *(unsigned long *)
-                               decode_register(modrm_rm, _regs, d & ByteOp);
-                       goto modrm_done;
-               }
-
-               if (ad_bytes == 2) {
-                       unsigned bx = _regs[VCPU_REGS_RBX];
-                       unsigned bp = _regs[VCPU_REGS_RBP];
-                       unsigned si = _regs[VCPU_REGS_RSI];
-                       unsigned di = _regs[VCPU_REGS_RDI];
-
-                       /* 16-bit ModR/M decode. */
-                       switch (modrm_mod) {
-                               case 0:
-                                       if (modrm_rm == 6)
-                                               modrm_ea += insn_fetch(uint16_t, 2, _eip);
-                                       break;
-                               case 1:
-                                       modrm_ea += insn_fetch(int8_t, 1, _eip);
-                                       break;
-                               case 2:
-                                       modrm_ea += insn_fetch(uint16_t, 2, _eip);
-                                       break;
-                       }
-                       switch (modrm_rm) {
-                               case 0:
-                                       modrm_ea += bx + si;
-                                       break;
-                               case 1:
-                                       modrm_ea += bx + di;
-                                       break;
-                               case 2:
-                                       modrm_ea += bp + si;
-                                       break;
-                               case 3:
-                                       modrm_ea += bp + di;
-                                       break;
-                               case 4:
-                                       modrm_ea += si;
-                                       break;
-                               case 5:
-                                       modrm_ea += di;
-                                       break;
-                               case 6:
-                                       if (modrm_mod != 0)
-                                               modrm_ea += bp;
-                                       break;
-                               case 7:
-                                       modrm_ea += bx;
-                                       break;
-                       }
-                       if (modrm_rm == 2 || modrm_rm == 3 ||
-                               (modrm_rm == 6 && modrm_mod != 0))
-                               if (!override_base)
-                                       override_base = &ctxt->ss_base;
-                       modrm_ea = (uint16_t) modrm_ea;
-               } else {
-                       /* 32/64-bit ModR/M decode. */
-                       switch (modrm_rm) {
-                               case 4:
-                               case 12:
-                                       sib = insn_fetch(uint8_t, 1, _eip);
-                                       index_reg |= (sib >> 3) & 7;
-                                       base_reg |= sib & 7;
-                                       scale = sib >> 6;
-
-                                       switch (base_reg) {
-                                               case 5:
-                                                       if (modrm_mod != 0)
-                                                               modrm_ea += _regs[base_reg];
-                                                       else
-                                                               modrm_ea += insn_fetch(int32_t, 4, _eip);
-                                                       break;
-                                               default:
-                                                       modrm_ea += _regs[base_reg];
-                                       }
-                                       switch (index_reg) {
-                                               case 4:
-                                                       break;
-                                               default:
-                                                       modrm_ea += _regs[index_reg] << scale;
-
-                                       }
-                                       break;
-                               case 5:
-                                       if (modrm_mod != 0)
-                                               modrm_ea += _regs[modrm_rm];
-                                       else if (mode == X86EMUL_MODE_PROT64)
-                                               rip_relative = 1;
-                                       break;
-                               default:
-                                       modrm_ea += _regs[modrm_rm];
-                                       break;
-                       }
-                       switch (modrm_mod) {
-                               case 0:
-                                       if (modrm_rm == 5)
-                                               modrm_ea += insn_fetch(int32_t, 4, _eip);
-                                       break;
-                               case 1:
-                                       modrm_ea += insn_fetch(int8_t, 1, _eip);
-                                       break;
-                               case 2:
-                                       modrm_ea += insn_fetch(int32_t, 4, _eip);
-                                       break;
-                       }
-               }
-               if (!override_base)
-                       override_base = &ctxt->ds_base;
-               if (mode == X86EMUL_MODE_PROT64 &&
-                       override_base != &ctxt->fs_base && override_base != &ctxt->gs_base)
-                       override_base = 0;
-
-               if (override_base)
-                       modrm_ea += *override_base;
-
-               if (rip_relative) {
-                       modrm_ea += _eip;
-                       switch (d & SrcMask) {
-                               case SrcImmByte:
-                                       modrm_ea += 1;
-                                       break;
-                               case SrcImm:
-                                       if (d & ByteOp)
-                                               modrm_ea += 1;
-                                       else if (op_bytes == 8)
-                                               modrm_ea += 4;
-                                       else
-                                               modrm_ea += op_bytes;
-                       }
-               }
-               if (ad_bytes != 8)
-                       modrm_ea = (uint32_t) modrm_ea;
-               cr2 = modrm_ea;
-modrm_done:
-               ;
-       }
-
-       /* Decode and fetch the destination operand: register or memory. */
-       switch (d & DstMask) {
-               case ImplicitOps:
-                       /* Special instructions do their own operand decoding. */
-                       goto special_insn;
-               case DstReg:
-                       dst.type = OP_REG;
-                       if ((d & ByteOp)
-                               && !(twobyte && (b == 0xb6 || b == 0xb7))) {
-                               dst.ptr = decode_register(modrm_reg, _regs, (rex_prefix == 0));
-                               dst.val = *(uint8_t *) dst.ptr;
-                               dst.bytes = 1;
-                       } else {
-                               dst.ptr = decode_register(modrm_reg, _regs, 0);
-                               switch ((dst.bytes = op_bytes)) {
-                                       case 2:
-                                               dst.val = *(uint16_t *) dst.ptr;
-                                               break;
-                                       case 4:
-                                               dst.val = *(uint32_t *) dst.ptr;
-                                               break;
-                                       case 8:
-                                               dst.val = *(uint64_t *) dst.ptr;
-                                               break;
-                               }
-                       }
-                       break;
-               case DstMem:
-                       dst.type = OP_MEM;
-                       dst.ptr = (unsigned long *)cr2;
-                       dst.bytes = (d & ByteOp) ? 1 : op_bytes;
-                       if (!(d & Mov) &&       /* optimisation - avoid slow emulated read */
-                               ((rc = ops->read_emulated((unsigned long)dst.ptr,
-                                                                                 &dst.val, dst.bytes, ctxt)) != 0))
-                               goto done;
-                       break;
-       }
-       dst.orig_val = dst.val;
-
-       /*
-        * Decode and fetch the source operand: register, memory
-        * or immediate.
-        */
-       switch (d & SrcMask) {
-               case SrcNone:
-                       break;
-               case SrcReg:
-                       src.type = OP_REG;
-                       if (d & ByteOp) {
-                               src.ptr = decode_register(modrm_reg, _regs, (rex_prefix == 0));
-                               src.val = src.orig_val = *(uint8_t *) src.ptr;
-                               src.bytes = 1;
-                       } else {
-                               src.ptr = decode_register(modrm_reg, _regs, 0);
-                               switch ((src.bytes = op_bytes)) {
-                                       case 2:
-                                               src.val = src.orig_val = *(uint16_t *) src.ptr;
-                                               break;
-                                       case 4:
-                                               src.val = src.orig_val = *(uint32_t *) src.ptr;
-                                               break;
-                                       case 8:
-                                               src.val = src.orig_val = *(uint64_t *) src.ptr;
-                                               break;
-                               }
-                       }
-                       break;
-               case SrcMem16:
-                       src.bytes = 2;
-                       goto srcmem_common;
-               case SrcMem32:
-                       src.bytes = 4;
-                       goto srcmem_common;
-               case SrcMem:
-                       src.bytes = (d & ByteOp) ? 1 : op_bytes;
-srcmem_common:
-                       src.type = OP_MEM;
-                       src.ptr = (unsigned long *)cr2;
-                       if ((rc = ops->read_emulated((unsigned long)src.ptr,
-                                                                                &src.val, src.bytes, ctxt)) != 0)
-                               goto done;
-                       src.orig_val = src.val;
-                       break;
-               case SrcImm:
-                       src.type = OP_IMM;
-                       src.ptr = (unsigned long *)_eip;
-                       src.bytes = (d & ByteOp) ? 1 : op_bytes;
-                       if (src.bytes == 8)
-                               src.bytes = 4;
-                       /* NB. Immediates are sign-extended as necessary. */
-                       switch (src.bytes) {
-                               case 1:
-                                       src.val = insn_fetch(int8_t, 1, _eip);
-                                       break;
-                               case 2:
-                                       src.val = insn_fetch(int16_t, 2, _eip);
-                                       break;
-                               case 4:
-                                       src.val = insn_fetch(int32_t, 4, _eip);
-                                       break;
-                       }
-                       break;
-               case SrcImmByte:
-                       src.type = OP_IMM;
-                       src.ptr = (unsigned long *)_eip;
-                       src.bytes = 1;
-                       src.val = insn_fetch(int8_t, 1, _eip);
-                       break;
-       }
-
-       if (twobyte)
-               goto twobyte_insn;
-
-       switch (b) {
-               case 0x00 ... 0x05:
-add:   /* add */
-                       emulate_2op_SrcV("add", src, dst, _eflags);
-                       break;
-               case 0x08 ... 0x0d:
-or:    /* or */
-                       emulate_2op_SrcV("or", src, dst, _eflags);
-                       break;
-               case 0x10 ... 0x15:
-adc:   /* adc */
-                       emulate_2op_SrcV("adc", src, dst, _eflags);
-                       break;
-               case 0x18 ... 0x1d:
-sbb:   /* sbb */
-                       emulate_2op_SrcV("sbb", src, dst, _eflags);
-                       break;
-               case 0x20 ... 0x25:
-and:   /* and */
-                       emulate_2op_SrcV("and", src, dst, _eflags);
-                       break;
-               case 0x28 ... 0x2d:
-sub:   /* sub */
-                       emulate_2op_SrcV("sub", src, dst, _eflags);
-                       break;
-               case 0x30 ... 0x35:
-xor:   /* xor */
-                       emulate_2op_SrcV("xor", src, dst, _eflags);
-                       break;
-               case 0x38 ... 0x3d:
-cmp:   /* cmp */
-                       emulate_2op_SrcV("cmp", src, dst, _eflags);
-                       break;
-               case 0x63:      /* movsxd */
-                       if (mode != X86EMUL_MODE_PROT64)
-                               goto cannot_emulate;
-                       dst.val = (int32_t) src.val;
-                       break;
-               case 0x80 ... 0x83:     /* Grp1 */
-                       switch (modrm_reg) {
-                               case 0:
-                                       goto add;
-                               case 1:
-                                       goto or;
-                               case 2:
-                                       goto adc;
-                               case 3:
-                                       goto sbb;
-                               case 4:
-                                       goto and;
-                               case 5:
-                                       goto sub;
-                               case 6:
-                                       goto xor;
-                               case 7:
-                                       goto cmp;
-                       }
-                       break;
-               case 0x84 ... 0x85:
-test:  /* test */
-                       emulate_2op_SrcV("test", src, dst, _eflags);
-                       break;
-               case 0x86 ... 0x87:     /* xchg */
-                       /* Write back the register source. */
-                       switch (dst.bytes) {
-                               case 1:
-                                       *(uint8_t *) src.ptr = (uint8_t) dst.val;
-                                       break;
-                               case 2:
-                                       *(uint16_t *) src.ptr = (uint16_t) dst.val;
-                                       break;
-                               case 4:
-                                       *src.ptr = (uint32_t) dst.val;
-                                       break;  /* 64b reg: zero-extend */
-                               case 8:
-                                       *src.ptr = dst.val;
-                                       break;
-                       }
-                       /*
-                        * Write back the memory destination with implicit LOCK
-                        * prefix.
-                        */
-                       dst.val = src.val;
-                       lock_prefix = 1;
-                       break;
-               case 0xa0 ... 0xa1:     /* mov */
-                       dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
-                       dst.val = src.val;
-                       _eip += ad_bytes;       /* skip src displacement */
-                       break;
-               case 0xa2 ... 0xa3:     /* mov */
-                       dst.val = (unsigned long)_regs[VCPU_REGS_RAX];
-                       _eip += ad_bytes;       /* skip dst displacement */
-                       break;
-               case 0x88 ... 0x8b:     /* mov */
-               case 0xc6 ... 0xc7:     /* mov (sole member of Grp11) */
-                       dst.val = src.val;
-                       break;
-               case 0x8f:      /* pop (sole member of Grp1a) */
-                       /* 64-bit mode: POP always pops a 64-bit operand. */
-                       if (mode == X86EMUL_MODE_PROT64)
-                               dst.bytes = 8;
-                       if ((rc = ops->read_std(register_address(ctxt->ss_base,
-                                                                                                        _regs[VCPU_REGS_RSP]),
-                                                                       &dst.val, dst.bytes, ctxt)) != 0)
-                               goto done;
-                       register_address_increment(_regs[VCPU_REGS_RSP], dst.bytes);
-                       break;
-               case 0xc0 ... 0xc1:
-grp2:  /* Grp2 */
-                       switch (modrm_reg) {
-                               case 0: /* rol */
-                                       emulate_2op_SrcB("rol", src, dst, _eflags);
-                                       break;
-                               case 1: /* ror */
-                                       emulate_2op_SrcB("ror", src, dst, _eflags);
-                                       break;
-                               case 2: /* rcl */
-                                       emulate_2op_SrcB("rcl", src, dst, _eflags);
-                                       break;
-                               case 3: /* rcr */
-                                       emulate_2op_SrcB("rcr", src, dst, _eflags);
-                                       break;
-                               case 4: /* sal/shl */
-                               case 6: /* sal/shl */
-                                       emulate_2op_SrcB("sal", src, dst, _eflags);
-                                       break;
-                               case 5: /* shr */
-                                       emulate_2op_SrcB("shr", src, dst, _eflags);
-                                       break;
-                               case 7: /* sar */
-                                       emulate_2op_SrcB("sar", src, dst, _eflags);
-                                       break;
-                       }
-                       break;
-               case 0xd0 ... 0xd1:     /* Grp2 */
-                       src.val = 1;
-                       goto grp2;
-               case 0xd2 ... 0xd3:     /* Grp2 */
-                       src.val = _regs[VCPU_REGS_RCX];
-                       goto grp2;
-               case 0xf6 ... 0xf7:     /* Grp3 */
-                       switch (modrm_reg) {
-                               case 0 ... 1:   /* test */
-                                       /*
-                                        * Special case in Grp3: test has an immediate
-                                        * source operand.
-                                        */
-                                       src.type = OP_IMM;
-                                       src.ptr = (unsigned long *)_eip;
-                                       src.bytes = (d & ByteOp) ? 1 : op_bytes;
-                                       if (src.bytes == 8)
-                                               src.bytes = 4;
-                                       switch (src.bytes) {
-                                               case 1:
-                                                       src.val = insn_fetch(int8_t, 1, _eip);
-                                                       break;
-                                               case 2:
-                                                       src.val = insn_fetch(int16_t, 2, _eip);
-                                                       break;
-                                               case 4:
-                                                       src.val = insn_fetch(int32_t, 4, _eip);
-                                                       break;
-                                       }
-                                       goto test;
-                               case 2: /* not */
-                                       dst.val = ~dst.val;
-                                       break;
-                               case 3: /* neg */
-                                       emulate_1op("neg", dst, _eflags);
-                                       break;
-                               default:
-                                       goto cannot_emulate;
-                       }
-                       break;
-               case 0xfe ... 0xff:     /* Grp4/Grp5 */
-                       switch (modrm_reg) {
-                               case 0: /* inc */
-                                       emulate_1op("inc", dst, _eflags);
-                                       break;
-                               case 1: /* dec */
-                                       emulate_1op("dec", dst, _eflags);
-                                       break;
-                               case 6: /* push */
-                                       /* 64-bit mode: PUSH always pushes a 64-bit operand. */
-                                       if (mode == X86EMUL_MODE_PROT64) {
-                                               dst.bytes = 8;
-                                               if ((rc = ops->read_std((unsigned long)dst.ptr,
-                                                                                               &dst.val, 8, ctxt)) != 0)
-                                                       goto done;
-                                       }
-                                       register_address_increment(_regs[VCPU_REGS_RSP],
-                                                                                          -dst.bytes);
-                                       if ((rc = ops->write_std(register_address(ctxt->ss_base,
-                                                                                                                         _regs
-                                                                                                                         [VCPU_REGS_RSP]),
-                                                                                        dst.val, dst.bytes, ctxt)) != 0)
-                                               goto done;
-                                       dst.val = dst.orig_val; /* skanky: disable writeback */
-                                       break;
-                               default:
-                                       goto cannot_emulate;
-                       }
-                       break;
-       }
-
-writeback:
-       if ((d & Mov) || (dst.orig_val != dst.val)) {
-               switch (dst.type) {
-                       case OP_REG:
-                               /* The 4-byte case *is* correct: in 64-bit mode we zero-extend. */
-                               switch (dst.bytes) {
-                                       case 1:
-                                               *(uint8_t *) dst.ptr = (uint8_t) dst.val;
-                                               break;
-                                       case 2:
-                                               *(uint16_t *) dst.ptr = (uint16_t) dst.val;
-                                               break;
-                                       case 4:
-                                               *dst.ptr = (uint32_t) dst.val;
-                                               break;  /* 64b: zero-ext */
-                                       case 8:
-                                               *dst.ptr = dst.val;
-                                               break;
-                               }
-                               break;
-                       case OP_MEM:
-                               if (lock_prefix)
-                                       rc = ops->cmpxchg_emulated((unsigned long)dst.ptr,
-                                                                                          dst.orig_val, dst.val, dst.bytes,
-                                                                                          ctxt);
-                               else
-                                       rc = ops->write_emulated((unsigned long)dst.ptr,
-                                                                                        dst.val, dst.bytes, ctxt);
-                               if (rc != 0)
-                                       goto done;
-                       default:
-                               break;
-               }
-       }
-
-       /* Commit shadow register state. */
-       memcpy(ctxt->vcpu->regs, _regs, sizeof _regs);
-       ctxt->eflags = _eflags;
-       ctxt->vcpu->rip = _eip;
-
-done:
-       return (rc == X86EMUL_UNHANDLEABLE) ? -1 : 0;
-
-special_insn:
-       if (twobyte)
-               goto twobyte_special_insn;
-       if (rep_prefix) {
-               if (_regs[VCPU_REGS_RCX] == 0) {
-                       ctxt->vcpu->rip = _eip;
-                       goto done;
-               }
-               _regs[VCPU_REGS_RCX]--;
-               _eip = ctxt->vcpu->rip;
-       }
-       switch (b) {
-               case 0xa4 ... 0xa5:     /* movs */
-                       dst.type = OP_MEM;
-                       dst.bytes = (d & ByteOp) ? 1 : op_bytes;
-                       dst.ptr = (unsigned long *)register_address(ctxt->es_base,
-                                                                                                               _regs[VCPU_REGS_RDI]);
-                       if ((rc =
-                                ops->
-                                read_emulated(register_address
-                                                          (override_base ? *override_base : ctxt->ds_base,
-                                                               _regs[VCPU_REGS_RSI]), &dst.val, dst.bytes,
-                                                          ctxt)) != 0)
-                               goto done;
-                       register_address_increment(_regs[VCPU_REGS_RSI],
-                                                                          (_eflags & EFLG_DF) ? -dst.bytes : dst.
-                                                                          bytes);
-                       register_address_increment(_regs[VCPU_REGS_RDI],
-                                                                          (_eflags & EFLG_DF) ? -dst.bytes : dst.
-                                                                          bytes);
-                       break;
-               case 0xa6 ... 0xa7:     /* cmps */
-                       DPRINTF("Urk! I don't handle CMPS.\n");
-                       goto cannot_emulate;
-               case 0xaa ... 0xab:     /* stos */
-                       dst.type = OP_MEM;
-                       dst.bytes = (d & ByteOp) ? 1 : op_bytes;
-                       dst.ptr = (unsigned long *)cr2;
-                       dst.val = _regs[VCPU_REGS_RAX];
-                       register_address_increment(_regs[VCPU_REGS_RDI],
-                                                                          (_eflags & EFLG_DF) ? -dst.bytes : dst.
-                                                                          bytes);
-                       break;
-               case 0xac ... 0xad:     /* lods */
-                       dst.type = OP_REG;
-                       dst.bytes = (d & ByteOp) ? 1 : op_bytes;
-                       dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
-                       if ((rc = ops->read_emulated(cr2, &dst.val, dst.bytes, ctxt)) != 0)
-                               goto done;
-                       register_address_increment(_regs[VCPU_REGS_RSI],
-                                                                          (_eflags & EFLG_DF) ? -dst.bytes : dst.
-                                                                          bytes);
-                       break;
-               case 0xae ... 0xaf:     /* scas */
-                       DPRINTF("Urk! I don't handle SCAS.\n");
-                       goto cannot_emulate;
-       }
-       goto writeback;
-
-twobyte_insn:
-       switch (b) {
-               case 0x01:      /* lgdt, lidt, lmsw */
-                       switch (modrm_reg) {
-                                       uint16_t size;
-                                       unsigned long address;
-
-                               case 2: /* lgdt */
-                                       rc = read_descriptor(ctxt, ops, src.ptr,
-                                                                                &size, &address, op_bytes);
-                                       if (rc)
-                                               goto done;
-#warning "implement realmode_lgdt"
-                                       //realmode_lgdt(ctxt->vcpu, size, address);
-                                       break;
-                               case 3: /* lidt */
-                                       rc = read_descriptor(ctxt, ops, src.ptr,
-                                                                                &size, &address, op_bytes);
-                                       if (rc)
-                                               goto done;
-#warning "implement realmode_lidt"
-                                       //realmode_lidt(ctxt->vcpu, size, address);
-                                       break;
-                               case 6: /* lmsw */
-#warning "implement realmod_lmsw"
-                                       //realmode_lmsw(ctxt->vcpu, (uint16_t)modrm_val, &_eflags);
-                                       break;
-                               default:
-                                       goto cannot_emulate;
-                       }
-                       break;
-               case 0x40 ... 0x4f:     /* cmov */
-                       dst.val = dst.orig_val = src.val;
-                       d &= ~Mov;      /* default to no move */
-                       /*
-                        * First, assume we're decoding an even cmov opcode
-                        * (lsb == 0).
-                        */
-                       switch ((b & 15) >> 1) {
-                               case 0: /* cmovo */
-                                       d |= (_eflags & EFLG_OF) ? Mov : 0;
-                                       break;
-                               case 1: /* cmovb/cmovc/cmovnae */
-                                       d |= (_eflags & EFLG_CF) ? Mov : 0;
-                                       break;
-                               case 2: /* cmovz/cmove */
-                                       d |= (_eflags & EFLG_ZF) ? Mov : 0;
-                                       break;
-                               case 3: /* cmovbe/cmovna */
-                                       d |= (_eflags & (EFLG_CF | EFLG_ZF)) ? Mov : 0;
-                                       break;
-                               case 4: /* cmovs */
-                                       d |= (_eflags & EFLG_SF) ? Mov : 0;
-                                       break;
-                               case 5: /* cmovp/cmovpe */
-                                       d |= (_eflags & EFLG_PF) ? Mov : 0;
-                                       break;
-                               case 7: /* cmovle/cmovng */
-                                       d |= (_eflags & EFLG_ZF) ? Mov : 0;
-                                       /* fall through */
-                               case 6: /* cmovl/cmovnge */
-                                       d |= (!(_eflags & EFLG_SF) !=
-                                                 !(_eflags & EFLG_OF)) ? Mov : 0;
-                                       break;
-                       }
-                       /* Odd cmov opcodes (lsb == 1) have inverted sense. */
-                       d ^= (b & 1) ? Mov : 0;
-                       break;
-               case 0xb0 ... 0xb1:     /* cmpxchg */
-                       /*
-                        * Save real source value, then compare EAX against
-                        * destination.
-                        */
-                       src.orig_val = src.val;
-                       src.val = _regs[VCPU_REGS_RAX];
-                       emulate_2op_SrcV("cmp", src, dst, _eflags);
-                       /* Always write back. The question is: where to? */
-                       d |= Mov;
-                       if (_eflags & EFLG_ZF) {
-                               /* Success: write back to memory. */
-                               dst.val = src.orig_val;
-                       } else {
-                               /* Failure: write the value we saw to EAX. */
-                               dst.type = OP_REG;
-                               dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
-                       }
-                       break;
-               case 0xa3:
-bt:    /* bt */
-                       src.val &= (dst.bytes << 3) - 1;        /* only subword offset */
-                       emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
-                       break;
-               case 0xb3:
-btr:   /* btr */
-                       src.val &= (dst.bytes << 3) - 1;        /* only subword offset */
-                       emulate_2op_SrcV_nobyte("btr", src, dst, _eflags);
-                       break;
-               case 0xab:
-bts:   /* bts */
-                       src.val &= (dst.bytes << 3) - 1;        /* only subword offset */
-                       emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
-                       break;
-               case 0xb6 ... 0xb7:     /* movzx */
-                       dst.bytes = op_bytes;
-                       dst.val = (d & ByteOp) ? (uint8_t) src.val : (uint16_t) src.val;
-                       break;
-               case 0xbb:
-btc:   /* btc */
-                       src.val &= (dst.bytes << 3) - 1;        /* only subword offset */
-                       emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
-                       break;
-               case 0xba:      /* Grp8 */
-                       switch (modrm_reg & 3) {
-                               case 0:
-                                       goto bt;
-                               case 1:
-                                       goto bts;
-                               case 2:
-                                       goto btr;
-                               case 3:
-                                       goto btc;
-                       }
-                       break;
-               case 0xbe ... 0xbf:     /* movsx */
-                       dst.bytes = op_bytes;
-                       dst.val = (d & ByteOp) ? (int8_t) src.val : (int16_t) src.val;
-                       break;
-       }
-       goto writeback;
-
-twobyte_special_insn:
-       /* Disable writeback. */
-       dst.orig_val = dst.val;
-       switch (b) {
-               case 0x0d:      /* GrpP (prefetch) */
-               case 0x18:      /* Grp16 (prefetch/nop) */
-                       break;
-               case 0x20:      /* mov cr, reg */
-                       b = insn_fetch(uint8_t, 1, _eip);
-                       if ((b & 0xc0) != 0xc0)
-                               goto cannot_emulate;
-#warning "implement realmode_get_cr"
-                       //_regs[(b >> 3) & 7] = realmode_get_cr(ctxt->vcpu, b & 7);
-                       break;
-               case 0x22:      /* mov reg, cr */
-                       b = insn_fetch(uint8_t, 1, _eip);
-                       if ((b & 0xc0) != 0xc0)
-                               goto cannot_emulate;
-#warning "implement realmod_set_cr"
-                       //realmode_set_cr(ctxt->vcpu, b & 7, _regs[(b >> 3) & 7] & -1u,
-                       //      &_eflags);
-                       break;
-               case 0xc7:      /* Grp9 (cmpxchg8b) */
-#if defined(__i386__)
-                       {
-                               unsigned long old_lo, old_hi;
-                               if (((rc = ops->read_emulated(cr2 + 0, &old_lo, 4, ctxt)) != 0)
-                                       || ((rc = ops->read_emulated(cr2 + 4, &old_hi, 4,
-                                                                                                ctxt)) != 0))
-                                       goto done;
-                               if ((old_lo != _regs[VCPU_REGS_RAX])
-                                       || (old_hi != _regs[VCPU_REGS_RDI])) {
-                                       _regs[VCPU_REGS_RAX] = old_lo;
-                                       _regs[VCPU_REGS_RDX] = old_hi;
-                                       _eflags &= ~EFLG_ZF;
-                               } else if (ops->cmpxchg8b_emulated == NULL) {
-                                       rc = X86EMUL_UNHANDLEABLE;
-                                       goto done;
-                               } else {
-                                       if ((rc = ops->cmpxchg8b_emulated(cr2, old_lo,
-                                                                                                         old_hi,
-                                                                                                         _regs[VCPU_REGS_RBX],
-                                                                                                         _regs[VCPU_REGS_RCX],
-                                                                                                         ctxt)) != 0)
-                                               goto done;
-                                       _eflags |= EFLG_ZF;
-                               }
-                               break;
-                       }
-#elif defined(__x86_64__)
-                       {
-                               unsigned long old, new;
-                               if ((rc = ops->read_emulated(cr2, &old, 8, ctxt)) != 0)
-                                       goto done;
-                               if (((uint32_t) (old >> 0) != (uint32_t) _regs[VCPU_REGS_RAX])
-                                       || ((uint32_t) (old >> 32) !=
-                                               (uint32_t) _regs[VCPU_REGS_RDX])) {
-                                       _regs[VCPU_REGS_RAX] = (uint32_t) (old >> 0);
-                                       _regs[VCPU_REGS_RDX] = (uint32_t) (old >> 32);
-                                       _eflags &= ~EFLG_ZF;
-                               } else {
-                                       new =
-                                               (_regs[VCPU_REGS_RCX] << 32) | (uint32_t)
-                                               _regs[VCPU_REGS_RBX];
-                                       if ((rc =
-                                                ops->cmpxchg_emulated(cr2, old, new, 8, ctxt)) != 0)
-                                               goto done;
-                                       _eflags |= EFLG_ZF;
-                               }
-                               break;
-                       }
-#endif
-       }
-       goto writeback;
-
-cannot_emulate:
-       printd("Cannot emulate %02x\n", b);
-       return -1;
-}
diff --git a/kern/arch/x86/emulate.h b/kern/arch/x86/emulate.h
deleted file mode 100644 (file)
index 04018f3..0000000
+++ /dev/null
@@ -1,180 +0,0 @@
-/******************************************************************************
- * x86_emulate.h
- *
- * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
- *
- * Copyright (c) 2005 Keir Fraser
- *
- * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
- */
-
-#pragma once
-
-struct x86_emulate_ctxt;
-
-/*
- * x86_emulate_ops:
- *
- * These operations represent the instruction emulator's interface to memory.
- * There are two categories of operation: those that act on ordinary memory
- * regions (*_std), and those that act on memory regions known to require
- * special treatment or emulation (*_emulated).
- *
- * The emulator assumes that an instruction accesses only one 'emulated memory'
- * location, that this location is the given linear faulting address (cr2), and
- * that this is one of the instruction's data operands. Instruction fetches and
- * stack operations are assumed never to access emulated memory. The emulator
- * automatically deduces which operand of a string-move operation is accessing
- * emulated memory, and assumes that the other operand accesses normal memory.
- *
- * NOTES:
- *  1. The emulator isn't very smart about emulated vs. standard memory.
- *     'Emulated memory' access addresses should be checked for sanity.
- *     'Normal memory' accesses may fault, and the caller must arrange to
- *     detect and handle reentrancy into the emulator via recursive faults.
- *     Accesses may be unaligned and may cross page boundaries.
- *  2. If the access fails (cannot emulate, or a standard access faults) then
- *     it is up to the memop to propagate the fault to the guest VM via
- *     some out-of-band mechanism, unknown to the emulator. The memop signals
- *     failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
- *     then immediately bail.
- *  3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
- *     cmpxchg8b_emulated need support 8-byte accesses.
- *  4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
- */
-/* Access completed successfully: continue emulation as normal. */
-#define X86EMUL_CONTINUE        0
-/* Access is unhandleable: bail from emulation and return error to caller. */
-#define X86EMUL_UNHANDLEABLE    1
-/* Terminate emulation but return success to the caller. */
-#define X86EMUL_PROPAGATE_FAULT 2      /* propagate a generated fault to guest */
-#define X86EMUL_RETRY_INSTR     2      /* retry the instruction for some reason */
-#define X86EMUL_CMPXCHG_FAILED  2      /* cmpxchg did not see expected value */
-struct x86_emulate_ops {
-       /*
-        * read_std: Read bytes of standard (non-emulated/special) memory.
-        *           Used for instruction fetch, stack operations, and others.
-        *  @addr:  [IN ] Linear address from which to read.
-        *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
-        *  @bytes: [IN ] Number of bytes to read from memory.
-        */
-       int (*read_std) (unsigned long addr,
-                                        unsigned long *val,
-                                        unsigned int bytes, struct x86_emulate_ctxt * ctxt);
-
-       /*
-        * write_std: Write bytes of standard (non-emulated/special) memory.
-        *            Used for stack operations, and others.
-        *  @addr:  [IN ] Linear address to which to write.
-        *  @val:   [IN ] Value to write to memory (low-order bytes used as
-        *                required).
-        *  @bytes: [IN ] Number of bytes to write to memory.
-        */
-       int (*write_std) (unsigned long addr,
-                                         unsigned long val,
-                                         unsigned int bytes, struct x86_emulate_ctxt * ctxt);
-
-       /*
-        * read_emulated: Read bytes from emulated/special memory area.
-        *  @addr:  [IN ] Linear address from which to read.
-        *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
-        *  @bytes: [IN ] Number of bytes to read from memory.
-        */
-       int (*read_emulated) (unsigned long addr,
-                                                 unsigned long *val,
-                                                 unsigned int bytes, struct x86_emulate_ctxt * ctxt);
-
-       /*
-        * write_emulated: Read bytes from emulated/special memory area.
-        *  @addr:  [IN ] Linear address to which to write.
-        *  @val:   [IN ] Value to write to memory (low-order bytes used as
-        *                required).
-        *  @bytes: [IN ] Number of bytes to write to memory.
-        */
-       int (*write_emulated) (unsigned long addr,
-                                                  unsigned long val,
-                                                  unsigned int bytes, struct x86_emulate_ctxt * ctxt);
-
-       /*
-        * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
-        *                   emulated/special memory area.
-        *  @addr:  [IN ] Linear address to access.
-        *  @old:   [IN ] Value expected to be current at @addr.
-        *  @new:   [IN ] Value to write to @addr.
-        *  @bytes: [IN ] Number of bytes to access using CMPXCHG.
-        */
-       int (*cmpxchg_emulated) (unsigned long addr,
-                                                        unsigned long old,
-                                                        unsigned long new,
-                                                        unsigned int bytes,
-                                                        struct x86_emulate_ctxt * ctxt);
-
-       /*
-        * cmpxchg8b_emulated: Emulate an atomic (LOCKed) CMPXCHG8B operation on an
-        *                     emulated/special memory area.
-        *  @addr:  [IN ] Linear address to access.
-        *  @old:   [IN ] Value expected to be current at @addr.
-        *  @new:   [IN ] Value to write to @addr.
-        * NOTES:
-        *  1. This function is only ever called when emulating a real CMPXCHG8B.
-        *  2. This function is *never* called on x86/64 systems.
-        *  2. Not defining this function (i.e., specifying NULL) is equivalent
-        *     to defining a function that always returns X86EMUL_UNHANDLEABLE.
-        */
-       int (*cmpxchg8b_emulated) (unsigned long addr,
-                                                          unsigned long old_lo,
-                                                          unsigned long old_hi,
-                                                          unsigned long new_lo,
-                                                          unsigned long new_hi,
-                                                          struct x86_emulate_ctxt * ctxt);
-};
-
-struct cpu_user_regs;
-
-struct x86_emulate_ctxt {
-       /* Register state before/after emulation. */
-       struct litevm_vcpu *vcpu;
-
-       /* Linear faulting address (if emulating a page-faulting instruction). */
-       unsigned long eflags;
-       unsigned long cr2;
-
-       /* Emulated execution mode, represented by an X86EMUL_MODE value. */
-       int mode;
-
-       unsigned long cs_base;
-       unsigned long ds_base;
-       unsigned long es_base;
-       unsigned long ss_base;
-       unsigned long gs_base;
-       unsigned long fs_base;
-};
-
-/* Execution mode, passed to the emulator. */
-#define X86EMUL_MODE_REAL     0        /* Real mode.             */
-#define X86EMUL_MODE_PROT16   2        /* 16-bit protected mode. */
-#define X86EMUL_MODE_PROT32   4        /* 32-bit protected mode. */
-#define X86EMUL_MODE_PROT64   8        /* 64-bit (long) mode.    */
-
-/* Host execution mode. */
-#if defined(__i386__)
-#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
-#elif defined(__x86_64__)
-#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
-#endif
-
-/*
- * x86_emulate_memop: Emulate an instruction that faulted attempting to
- *                    read/write a 'special' memory area.
- * Returns -1 on failure, 0 on success.
- */
-int x86_emulate_memop(struct x86_emulate_ctxt *ctxt,
-                                         struct x86_emulate_ops *ops);
-
-/*
- * Given the 'reg' portion of a ModRM byte, and a register block, return a
- * pointer into the block that addresses the relevant register.
- * @highbyte_regs specifies whether to decode AH,CH,DH,BH.
- */
-void *decode_register(uint8_t modrm_reg, unsigned long *regs,
-                                         int highbyte_regs);
diff --git a/kern/arch/x86/paging_tmpl.h b/kern/arch/x86/paging_tmpl.h
deleted file mode 100644 (file)
index 4bb1088..0000000
+++ /dev/null
@@ -1,371 +0,0 @@
-/*
- * We need the mmu code to access both 32-bit and 64-bit guest ptes,
- * so the code in this file is compiled twice, once per pte size.
- */
-
-#pragma once
-
-#if PTTYPE == 64
-#define pt_element_t uint64_t
-#define guest_walker guest_walker64
-#define FNAME(name) paging##64_##name
-#define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
-#define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
-#define PT_INDEX(addr, level) PT64_INDEX(addr, level)
-#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
-#define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
-#define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
-#define PT_NON_PTE_COPY_MASK PT64_NON_PTE_COPY_MASK
-#elif PTTYPE == 32
-#define pt_element_t uint32_t
-#define guest_walker guest_walker32
-#define FNAME(name) paging##32_##name
-#define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
-#define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
-#define PT_INDEX(addr, level) PT32_INDEX(addr, level)
-#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
-#define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
-#define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
-#define PT_NON_PTE_COPY_MASK PT32_NON_PTE_COPY_MASK
-#else
-#error Invalid PTTYPE value
-#endif
-
-/*
- * The guest_walker structure emulates the behavior of the hardware page
- * table walker.
- */
-struct guest_walker {
-       int level;
-       pt_element_t *table;
-       pt_element_t inherited_ar;
-};
-
-static void FNAME(init_walker) (struct guest_walker * walker,
-                                                               struct litevm_vcpu * vcpu) {
-       hpa_t hpa;
-       struct litevm_memory_slot *slot;
-
-       walker->level = vcpu->mmu.root_level;
-       slot = gfn_to_memslot(vcpu->litevm,
-                                                 (vcpu->cr3 & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
-       hpa = safe_gpa_to_hpa(vcpu, vcpu->cr3 & PT64_BASE_ADDR_MASK);
-       // well, it seems that stuff is always addressable in akaros. I hope.
-       //walker->table = vmap_pmem(ppn2page(hpa >> PAGE_SHIFT), PAGE_SIZE);
-       walker->table = KADDR(hpa);
-
-       ASSERT((!is_long_mode() && is_pae()) ||
-                  (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
-
-       walker->table = (pt_element_t *) ((unsigned long)walker->table |
-                                                                         (unsigned long)(vcpu->
-                                                                                                         cr3 & ~(PAGE_MASK |
-                                                                                                                         CR3_FLAGS_MASK)));
-       walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
-}
-
-static void FNAME(release_walker) (struct guest_walker * walker) {
-       //vunmap_pmem(walker->table, PAGE_SIZE);
-}
-
-static void FNAME(set_pte) (struct litevm_vcpu * vcpu, uint64_t guest_pte,
-                                                       uint64_t * shadow_pte, uint64_t access_bits) {
-       ASSERT(*shadow_pte == 0);
-       access_bits &= guest_pte;
-       *shadow_pte = (guest_pte & PT_PTE_COPY_MASK);
-       set_pte_common(vcpu, shadow_pte, guest_pte & PT_BASE_ADDR_MASK,
-                                  guest_pte & PT_DIRTY_MASK, access_bits);
-}
-
-static void FNAME(set_pde) (struct litevm_vcpu * vcpu, uint64_t guest_pde,
-                                                       uint64_t * shadow_pte, uint64_t access_bits,
-                                                       int index) {
-       gpa_t gaddr;
-
-       ASSERT(*shadow_pte == 0);
-       access_bits &= guest_pde;
-       gaddr = (guest_pde & PT_DIR_BASE_ADDR_MASK) + PAGE_SIZE * index;
-       if (PTTYPE == 32 && is_cpuid_PSE36())
-               gaddr |= (guest_pde & PT32_DIR_PSE36_MASK) <<
-                       (32 - PT32_DIR_PSE36_SHIFT);
-       *shadow_pte = (guest_pde & PT_NON_PTE_COPY_MASK) |
-               ((guest_pde & PT_DIR_PAT_MASK) >> (PT_DIR_PAT_SHIFT - PT_PAT_SHIFT));
-       set_pte_common(vcpu, shadow_pte, gaddr,
-                                  guest_pde & PT_DIRTY_MASK, access_bits);
-}
-
-/*
- * Fetch a guest pte from a specific level in the paging hierarchy.
- */
-static pt_element_t *FNAME(fetch_guest) (struct litevm_vcpu * vcpu,
-                                                                                struct guest_walker * walker,
-                                                                                int level, gva_t addr) {
-
-       ASSERT(level > 0 && level <= walker->level);
-
-       for (;;) {
-               int index = PT_INDEX(addr, walker->level);
-               hpa_t paddr;
-
-               ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
-                          ((unsigned long)&walker->table[index] & PAGE_MASK));
-               if (level == walker->level ||
-                       !is_present_pte(walker->table[index]) ||
-                       (walker->level == PT_DIRECTORY_LEVEL &&
-                        (walker->table[index] & PT_PAGE_SIZE_MASK) &&
-                        (PTTYPE == 64 || is_pse())))
-                       return &walker->table[index];
-               if (walker->level != 3 || is_long_mode())
-                       walker->inherited_ar &= walker->table[index];
-               paddr = safe_gpa_to_hpa(vcpu, walker->table[index] & PT_BASE_ADDR_MASK);
-               //kunmap_atomic(walker->table);
-               //walker->table = vmap_pmem(ppn2page(paddr >> PAGE_SHIFT), PAGE_SIZE);
-               walker->table = KADDR(paddr >> PAGE_SHIFT);
-               --walker->level;
-       }
-}
-
-/*
- * Fetch a shadow pte for a specific level in the paging hierarchy.
- */
-static uint64_t *FNAME(fetch) (struct litevm_vcpu * vcpu, gva_t addr,
-                                                          struct guest_walker * walker) {
-       hpa_t shadow_addr;
-       int level;
-       uint64_t *prev_shadow_ent = NULL;
-
-       shadow_addr = vcpu->mmu.root_hpa;
-       level = vcpu->mmu.shadow_root_level;
-
-       for (;; level--) {
-               uint32_t index = SHADOW_PT_INDEX(addr, level);
-               uint64_t *shadow_ent = ((uint64_t *) KADDR(shadow_addr)) + index;
-               pt_element_t *guest_ent;
-
-               if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
-                       if (level == PT_PAGE_TABLE_LEVEL)
-                               return shadow_ent;
-                       shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
-                       prev_shadow_ent = shadow_ent;
-                       continue;
-               }
-
-               if (PTTYPE == 32 && level > PT32_ROOT_LEVEL) {
-                       ASSERT(level == PT32E_ROOT_LEVEL);
-                       guest_ent = FNAME(fetch_guest) (vcpu, walker,
-                                                                                       PT32_ROOT_LEVEL, addr);
-               } else
-                       guest_ent = FNAME(fetch_guest) (vcpu, walker, level, addr);
-
-               if (!is_present_pte(*guest_ent))
-                       return NULL;
-
-               /* Don't set accessed bit on PAE PDPTRs */
-               if (vcpu->mmu.root_level != 3 || walker->level != 3)
-                       *guest_ent |= PT_ACCESSED_MASK;
-
-               if (level == PT_PAGE_TABLE_LEVEL) {
-
-                       if (walker->level == PT_DIRECTORY_LEVEL) {
-                               if (prev_shadow_ent)
-                                       *prev_shadow_ent |= PT_SHADOW_PS_MARK;
-                               FNAME(set_pde) (vcpu, *guest_ent, shadow_ent,
-                                                               walker->inherited_ar,
-                                                               PT_INDEX(addr, PT_PAGE_TABLE_LEVEL));
-                       } else {
-                               ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
-                               FNAME(set_pte) (vcpu, *guest_ent, shadow_ent,
-                                                               walker->inherited_ar);
-                       }
-                       return shadow_ent;
-               }
-
-               shadow_addr = litevm_mmu_alloc_page(vcpu, shadow_ent);
-               if (!VALID_PAGE(shadow_addr))
-                       return ERR_PTR(-ENOMEM);
-               if (!is_long_mode() && level == 3)
-                       *shadow_ent = shadow_addr |
-                               (*guest_ent & (PT_PRESENT_MASK | PT_PWT_MASK | PT_PCD_MASK));
-               else {
-                       *shadow_ent = shadow_addr | (*guest_ent & PT_NON_PTE_COPY_MASK);
-                       *shadow_ent |= (PT_WRITABLE_MASK | PT_USER_MASK);
-               }
-               prev_shadow_ent = shadow_ent;
-       }
-}
-
-/*
- * The guest faulted for write.  We need to
- *
- * - check write permissions
- * - update the guest pte dirty bit
- * - update our own dirty page tracking structures
- */
-static int FNAME(fix_write_pf) (struct litevm_vcpu * vcpu,
-                                                               uint64_t * shadow_ent,
-                                                               struct guest_walker * walker,
-                                                               gva_t addr, int user) {
-       pt_element_t *guest_ent;
-       int writable_shadow;
-       gfn_t gfn;
-
-       if (is_writeble_pte(*shadow_ent))
-               return 0;
-
-       writable_shadow = *shadow_ent & PT_SHADOW_WRITABLE_MASK;
-       if (user) {
-               /*
-                * User mode access.  Fail if it's a kernel page or a read-only
-                * page.
-                */
-               if (!(*shadow_ent & PT_SHADOW_USER_MASK) || !writable_shadow)
-                       return 0;
-               ASSERT(*shadow_ent & PT_USER_MASK);
-       } else
-               /*
-                * Kernel mode access.  Fail if it's a read-only page and
-                * supervisor write protection is enabled.
-                */
-       if (!writable_shadow) {
-               if (is_write_protection())
-                       return 0;
-               *shadow_ent &= ~PT_USER_MASK;
-       }
-
-       guest_ent = FNAME(fetch_guest) (vcpu, walker, PT_PAGE_TABLE_LEVEL, addr);
-
-       if (!is_present_pte(*guest_ent)) {
-               *shadow_ent = 0;
-               return 0;
-       }
-
-       gfn = (*guest_ent & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
-       mark_page_dirty(vcpu->litevm, gfn);
-       *shadow_ent |= PT_WRITABLE_MASK;
-       *guest_ent |= PT_DIRTY_MASK;
-
-       return 1;
-}
-
-/*
- * Page fault handler.  There are several causes for a page fault:
- *   - there is no shadow pte for the guest pte
- *   - write access through a shadow pte marked read only so that we can set
- *     the dirty bit
- *   - write access to a shadow pte marked read only so we can update the page
- *     dirty bitmap, when userspace requests it
- *   - mmio access; in this case we will never install a present shadow pte
- *   - normal guest page fault due to the guest pte marked not present, not
- *     writable, or not executable
- *
- *  Returns: 1 if we need to emulate the instruction, 0 otherwise
- */
-static int FNAME(page_fault) (struct litevm_vcpu * vcpu, gva_t addr,
-                                                         uint32_t error_code) {
-       int write_fault = error_code & PFERR_WRITE_MASK;
-       int pte_present = error_code & PFERR_PRESENT_MASK;
-       int user_fault = error_code & PFERR_USER_MASK;
-       struct guest_walker walker;
-       uint64_t *shadow_pte;
-       int fixed;
-
-       /*
-        * Look up the shadow pte for the faulting address.
-        */
-       for (;;) {
-               FNAME(init_walker) (&walker, vcpu);
-               shadow_pte = FNAME(fetch) (vcpu, addr, &walker);
-               if (IS_ERR(shadow_pte)) {       /* must be -ENOMEM */
-                       nonpaging_flush(vcpu);
-                       FNAME(release_walker) (&walker);
-                       continue;
-               }
-               break;
-       }
-
-       /*
-        * The page is not mapped by the guest.  Let the guest handle it.
-        */
-       if (!shadow_pte) {
-               inject_page_fault(vcpu, addr, error_code);
-               FNAME(release_walker) (&walker);
-               return 0;
-       }
-
-       /*
-        * Update the shadow pte.
-        */
-       if (write_fault)
-               fixed = FNAME(fix_write_pf) (vcpu, shadow_pte, &walker, addr,
-                                                                        user_fault);
-       else
-               fixed = fix_read_pf(shadow_pte);
-
-       FNAME(release_walker) (&walker);
-
-       /*
-        * mmio: emulate if accessible, otherwise its a guest fault.
-        */
-       if (is_io_pte(*shadow_pte)) {
-               if (may_access(*shadow_pte, write_fault, user_fault))
-                       return 1;
-               pgprintk("%s: io work, no access\n", __FUNCTION__);
-               inject_page_fault(vcpu, addr, error_code | PFERR_PRESENT_MASK);
-               return 0;
-       }
-
-       /*
-        * pte not present, guest page fault.
-        */
-       if (pte_present && !fixed) {
-               inject_page_fault(vcpu, addr, error_code);
-               return 0;
-       }
-
-       ++litevm_stat.pf_fixed;
-
-       return 0;
-}
-
-static gpa_t FNAME(gva_to_gpa) (struct litevm_vcpu * vcpu, gva_t vaddr) {
-       struct guest_walker walker;
-       pt_element_t guest_pte;
-       gpa_t gpa;
-
-       FNAME(init_walker) (&walker, vcpu);
-       guest_pte = *FNAME(fetch_guest) (vcpu, &walker, PT_PAGE_TABLE_LEVEL, vaddr);
-       FNAME(release_walker) (&walker);
-
-       if (!is_present_pte(guest_pte))
-               return UNMAPPED_GVA;
-
-       if (walker.level == PT_DIRECTORY_LEVEL) {
-               ASSERT((guest_pte & PT_PAGE_SIZE_MASK));
-               ASSERT(PTTYPE == 64 || is_pse());
-
-               gpa = (guest_pte & PT_DIR_BASE_ADDR_MASK) | (vaddr &
-                                                                                                        (PT_LEVEL_MASK
-                                                                                                         (PT_PAGE_TABLE_LEVEL) |
-                                                                                                         ~PAGE_MASK));
-
-               if (PTTYPE == 32 && is_cpuid_PSE36())
-                       gpa |= (guest_pte & PT32_DIR_PSE36_MASK) <<
-                               (32 - PT32_DIR_PSE36_SHIFT);
-       } else {
-               gpa = (guest_pte & PT_BASE_ADDR_MASK);
-               gpa |= (vaddr & ~PAGE_MASK);
-       }
-
-       return gpa;
-}
-
-#undef pt_element_t
-#undef guest_walker
-#undef FNAME
-#undef PT_BASE_ADDR_MASK
-#undef PT_INDEX
-#undef SHADOW_PT_INDEX
-#undef PT_LEVEL_MASK
-#undef PT_PTE_COPY_MASK
-#undef PT_NON_PTE_COPY_MASK
-#undef PT_DIR_BASE_ADDR_MASK
diff --git a/kern/arch/x86/vmm/intel/cpufeature.h b/kern/arch/x86/vmm/intel/cpufeature.h
deleted file mode 100644 (file)
index bc2a7e0..0000000
+++ /dev/null
@@ -1,362 +0,0 @@
-/*
- * Defines x86 CPU feature bits
- */
-#pragma once
-
-#define NCAPINTS       10      /* N 32-bit words worth of info */
-
-/*
- * Note: If the comment begins with a quoted string, that string is used
- * in /proc/cpuinfo instead of the macro name.  If the string is "",
- * this feature bit is not displayed in /proc/cpuinfo at all.
- */
-
-/* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
-#define X86_FEATURE_FPU                (0*32+ 0) /* Onboard FPU */
-#define X86_FEATURE_VME                (0*32+ 1) /* Virtual Mode Extensions */
-#define X86_FEATURE_DE         (0*32+ 2) /* Debugging Extensions */
-#define X86_FEATURE_PSE                (0*32+ 3) /* Page Size Extensions */
-#define X86_FEATURE_TSC                (0*32+ 4) /* Time Stamp Counter */
-#define X86_FEATURE_MSR                (0*32+ 5) /* Model-Specific Registers */
-#define X86_FEATURE_PAE                (0*32+ 6) /* Physical Address Extensions */
-#define X86_FEATURE_MCE                (0*32+ 7) /* Machine Check Exception */
-#define X86_FEATURE_CX8                (0*32+ 8) /* CMPXCHG8 instruction */
-#define X86_FEATURE_APIC       (0*32+ 9) /* Onboard APIC */
-#define X86_FEATURE_SEP                (0*32+11) /* SYSENTER/SYSEXIT */
-#define X86_FEATURE_MTRR       (0*32+12) /* Memory Type Range Registers */
-#define X86_FEATURE_PGE                (0*32+13) /* Page Global Enable */
-#define X86_FEATURE_MCA                (0*32+14) /* Machine Check Architecture */
-#define X86_FEATURE_CMOV       (0*32+15) /* CMOV instructions */
-                                         /* (plus FCMOVcc, FCOMI with FPU) */
-#define X86_FEATURE_PAT                (0*32+16) /* Page Attribute Table */
-#define X86_FEATURE_PSE36      (0*32+17) /* 36-bit PSEs */
-#define X86_FEATURE_PN         (0*32+18) /* Processor serial number */
-#define X86_FEATURE_CLFLSH     (0*32+19) /* "clflush" CLFLUSH instruction */
-#define X86_FEATURE_DS         (0*32+21) /* "dts" Debug Store */
-#define X86_FEATURE_ACPI       (0*32+22) /* ACPI via MSR */
-#define X86_FEATURE_MMX                (0*32+23) /* Multimedia Extensions */
-#define X86_FEATURE_FXSR       (0*32+24) /* FXSAVE/FXRSTOR, CR4.OSFXSR */
-#define X86_FEATURE_XMM                (0*32+25) /* "sse" */
-#define X86_FEATURE_XMM2       (0*32+26) /* "sse2" */
-#define X86_FEATURE_SELFSNOOP  (0*32+27) /* "ss" CPU self snoop */
-#define X86_FEATURE_HT         (0*32+28) /* Hyper-Threading */
-#define X86_FEATURE_ACC                (0*32+29) /* "tm" Automatic clock control */
-#define X86_FEATURE_IA64       (0*32+30) /* IA-64 processor */
-#define X86_FEATURE_PBE                (0*32+31) /* Pending Break Enable */
-
-/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
-/* Don't duplicate feature flags which are redundant with Intel! */
-#define X86_FEATURE_SYSCALL    (1*32+11) /* SYSCALL/SYSRET */
-#define X86_FEATURE_MP         (1*32+19) /* MP Capable. */
-#define X86_FEATURE_NX         (1*32+20) /* Execute Disable */
-#define X86_FEATURE_MMXEXT     (1*32+22) /* AMD MMX extensions */
-#define X86_FEATURE_FXSR_OPT   (1*32+25) /* FXSAVE/FXRSTOR optimizations */
-#define X86_FEATURE_GBPAGES    (1*32+26) /* "pdpe1gb" GB pages */
-#define X86_FEATURE_RDTSCP     (1*32+27) /* RDTSCP */
-#define X86_FEATURE_LM         (1*32+29) /* Long Mode (x86-64) */
-#define X86_FEATURE_3DNOWEXT   (1*32+30) /* AMD 3DNow! extensions */
-#define X86_FEATURE_3DNOW      (1*32+31) /* 3DNow! */
-
-/* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */
-#define X86_FEATURE_RECOVERY   (2*32+ 0) /* CPU in recovery mode */
-#define X86_FEATURE_LONGRUN    (2*32+ 1) /* Longrun power control */
-#define X86_FEATURE_LRTI       (2*32+ 3) /* LongRun table interface */
-
-/* Other features, Linux-defined mapping, word 3 */
-/* This range is used for feature bits which conflict or are synthesized */
-#define X86_FEATURE_CXMMX      (3*32+ 0) /* Cyrix MMX extensions */
-#define X86_FEATURE_K6_MTRR    (3*32+ 1) /* AMD K6 nonstandard MTRRs */
-#define X86_FEATURE_CYRIX_ARR  (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
-#define X86_FEATURE_CENTAUR_MCR        (3*32+ 3) /* Centaur MCRs (= MTRRs) */
-/* cpu types for specific tunings: */
-#define X86_FEATURE_K8         (3*32+ 4) /* "" Opteron, Athlon64 */
-#define X86_FEATURE_K7         (3*32+ 5) /* "" Athlon */
-#define X86_FEATURE_P3         (3*32+ 6) /* "" P3 */
-#define X86_FEATURE_P4         (3*32+ 7) /* "" P4 */
-#define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */
-#define X86_FEATURE_UP         (3*32+ 9) /* smp kernel running on up */
-#define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* "" FXSAVE leaks FOP/FIP/FOP */
-#define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */
-#define X86_FEATURE_PEBS       (3*32+12) /* Precise-Event Based Sampling */
-#define X86_FEATURE_BTS                (3*32+13) /* Branch Trace Store */
-#define X86_FEATURE_SYSCALL32  (3*32+14) /* "" syscall in ia32 userspace */
-#define X86_FEATURE_SYSENTER32 (3*32+15) /* "" sysenter in ia32 userspace */
-#define X86_FEATURE_REP_GOOD   (3*32+16) /* rep microcode works well */
-#define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* "" Mfence synchronizes RDTSC */
-#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* "" Lfence synchronizes RDTSC */
-#define X86_FEATURE_11AP       (3*32+19) /* "" Bad local APIC aka 11AP */
-#define X86_FEATURE_NOPL       (3*32+20) /* The NOPL (0F 1F) instructions */
-                                         /* 21 available, was AMD_C1E */
-#define X86_FEATURE_XTOPOLOGY  (3*32+22) /* cpu topology enum extensions */
-#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */
-#define X86_FEATURE_NONSTOP_TSC        (3*32+24) /* TSC does not stop in C states */
-#define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */
-#define X86_FEATURE_EXTD_APICID        (3*32+26) /* has extended APICID (8 bits) */
-#define X86_FEATURE_AMD_DCM     (3*32+27) /* multi-node processor */
-#define X86_FEATURE_APERFMPERF (3*32+28) /* APERFMPERF */
-#define X86_FEATURE_EAGER_FPU  (3*32+29) /* "eagerfpu" Non lazy FPU restore */
-
-/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_XMM3       (4*32+ 0) /* "pni" SSE-3 */
-#define X86_FEATURE_PCLMULQDQ  (4*32+ 1) /* PCLMULQDQ instruction */
-#define X86_FEATURE_DTES64     (4*32+ 2) /* 64-bit Debug Store */
-#define X86_FEATURE_MWAIT      (4*32+ 3) /* "monitor" Monitor/Mwait support */
-#define X86_FEATURE_DSCPL      (4*32+ 4) /* "ds_cpl" CPL Qual. Debug Store */
-#define X86_FEATURE_VMX                (4*32+ 5) /* Hardware virtualization */
-#define X86_FEATURE_SMX                (4*32+ 6) /* Safer mode */
-#define X86_FEATURE_EST                (4*32+ 7) /* Enhanced SpeedStep */
-#define X86_FEATURE_TM2                (4*32+ 8) /* Thermal Monitor 2 */
-#define X86_FEATURE_SSSE3      (4*32+ 9) /* Supplemental SSE-3 */
-#define X86_FEATURE_CID                (4*32+10) /* Context ID */
-#define X86_FEATURE_FMA                (4*32+12) /* Fused multiply-add */
-#define X86_FEATURE_CX16       (4*32+13) /* CMPXCHG16B */
-#define X86_FEATURE_XTPR       (4*32+14) /* Send Task Priority Messages */
-#define X86_FEATURE_PDCM       (4*32+15) /* Performance Capabilities */
-#define X86_FEATURE_PCID       (4*32+17) /* Process Context Identifiers */
-#define X86_FEATURE_DCA                (4*32+18) /* Direct Cache Access */
-#define X86_FEATURE_XMM4_1     (4*32+19) /* "sse4_1" SSE-4.1 */
-#define X86_FEATURE_XMM4_2     (4*32+20) /* "sse4_2" SSE-4.2 */
-#define X86_FEATURE_X2APIC     (4*32+21) /* x2APIC */
-#define X86_FEATURE_MOVBE      (4*32+22) /* MOVBE instruction */
-#define X86_FEATURE_POPCNT      (4*32+23) /* POPCNT instruction */
-#define X86_FEATURE_TSC_DEADLINE_TIMER (4*32+24) /* Tsc deadline timer */
-#define X86_FEATURE_AES                (4*32+25) /* AES instructions */
-#define X86_FEATURE_XSAVE      (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
-#define X86_FEATURE_OSXSAVE    (4*32+27) /* "" XSAVE enabled in the OS */
-#define X86_FEATURE_AVX                (4*32+28) /* Advanced Vector Extensions */
-#define X86_FEATURE_F16C       (4*32+29) /* 16-bit fp conversions */
-#define X86_FEATURE_RDRAND     (4*32+30) /* The RDRAND instruction */
-#define X86_FEATURE_HYPERVISOR (4*32+31) /* Running on a hypervisor */
-
-/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
-#define X86_FEATURE_XSTORE     (5*32+ 2) /* "rng" RNG present (xstore) */
-#define X86_FEATURE_XSTORE_EN  (5*32+ 3) /* "rng_en" RNG enabled */
-#define X86_FEATURE_XCRYPT     (5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */
-#define X86_FEATURE_XCRYPT_EN  (5*32+ 7) /* "ace_en" on-CPU crypto enabled */
-#define X86_FEATURE_ACE2       (5*32+ 8) /* Advanced Cryptography Engine v2 */
-#define X86_FEATURE_ACE2_EN    (5*32+ 9) /* ACE v2 enabled */
-#define X86_FEATURE_PHE                (5*32+10) /* PadLock Hash Engine */
-#define X86_FEATURE_PHE_EN     (5*32+11) /* PHE enabled */
-#define X86_FEATURE_PMM                (5*32+12) /* PadLock Montgomery Multiplier */
-#define X86_FEATURE_PMM_EN     (5*32+13) /* PMM enabled */
-
-/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
-#define X86_FEATURE_LAHF_LM    (6*32+ 0) /* LAHF/SAHF in long mode */
-#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */
-#define X86_FEATURE_SVM                (6*32+ 2) /* Secure virtual machine */
-#define X86_FEATURE_EXTAPIC    (6*32+ 3) /* Extended APIC space */
-#define X86_FEATURE_CR8_LEGACY (6*32+ 4) /* CR8 in 32-bit mode */
-#define X86_FEATURE_ABM                (6*32+ 5) /* Advanced bit manipulation */
-#define X86_FEATURE_SSE4A      (6*32+ 6) /* SSE-4A */
-#define X86_FEATURE_MISALIGNSSE (6*32+ 7) /* Misaligned SSE mode */
-#define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */
-#define X86_FEATURE_OSVW       (6*32+ 9) /* OS Visible Workaround */
-#define X86_FEATURE_IBS                (6*32+10) /* Instruction Based Sampling */
-#define X86_FEATURE_XOP                (6*32+11) /* extended AVX instructions */
-#define X86_FEATURE_SKINIT     (6*32+12) /* SKINIT/STGI instructions */
-#define X86_FEATURE_WDT                (6*32+13) /* Watchdog timer */
-#define X86_FEATURE_LWP                (6*32+15) /* Light Weight Profiling */
-#define X86_FEATURE_FMA4       (6*32+16) /* 4 operands MAC instructions */
-#define X86_FEATURE_TCE                (6*32+17) /* translation cache extension */
-#define X86_FEATURE_NODEID_MSR (6*32+19) /* NodeId MSR */
-#define X86_FEATURE_TBM                (6*32+21) /* trailing bit manipulations */
-#define X86_FEATURE_TOPOEXT    (6*32+22) /* topology extensions CPUID leafs */
-#define X86_FEATURE_PERFCTR_CORE (6*32+23) /* core performance counter extensions */
-
-/*
- * Auxiliary flags: Linux defined - For features scattered in various
- * CPUID levels like 0x6, 0xA etc, word 7
- */
-#define X86_FEATURE_IDA                (7*32+ 0) /* Intel Dynamic Acceleration */
-#define X86_FEATURE_ARAT       (7*32+ 1) /* Always Running APIC Timer */
-#define X86_FEATURE_CPB                (7*32+ 2) /* AMD Core Performance Boost */
-#define X86_FEATURE_EPB                (7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */
-#define X86_FEATURE_XSAVEOPT   (7*32+ 4) /* Optimized Xsave */
-#define X86_FEATURE_PLN                (7*32+ 5) /* Intel Power Limit Notification */
-#define X86_FEATURE_PTS                (7*32+ 6) /* Intel Package Thermal Status */
-#define X86_FEATURE_DTHERM     (7*32+ 7) /* Digital Thermal Sensor */
-#define X86_FEATURE_HW_PSTATE  (7*32+ 8) /* AMD HW-PState */
-
-/* Virtualization flags: Linux defined, word 8 */
-#define X86_FEATURE_TPR_SHADOW  (8*32+ 0) /* Intel TPR Shadow */
-#define X86_FEATURE_VNMI        (8*32+ 1) /* Intel Virtual NMI */
-#define X86_FEATURE_FLEXPRIORITY (8*32+ 2) /* Intel FlexPriority */
-#define X86_FEATURE_EPT         (8*32+ 3) /* Intel Extended Page Table */
-#define X86_FEATURE_VPID        (8*32+ 4) /* Intel Virtual Processor ID */
-#define X86_FEATURE_NPT                (8*32+ 5) /* AMD Nested Page Table support */
-#define X86_FEATURE_LBRV       (8*32+ 6) /* AMD LBR Virtualization support */
-#define X86_FEATURE_SVML       (8*32+ 7) /* "svm_lock" AMD SVM locking MSR */
-#define X86_FEATURE_NRIPS      (8*32+ 8) /* "nrip_save" AMD SVM next_rip save */
-#define X86_FEATURE_TSCRATEMSR  (8*32+ 9) /* "tsc_scale" AMD TSC scaling support */
-#define X86_FEATURE_VMCBCLEAN   (8*32+10) /* "vmcb_clean" AMD VMCB clean bits support */
-#define X86_FEATURE_FLUSHBYASID (8*32+11) /* AMD flush-by-ASID support */
-#define X86_FEATURE_DECODEASSISTS (8*32+12) /* AMD Decode Assists support */
-#define X86_FEATURE_PAUSEFILTER (8*32+13) /* AMD filtered pause intercept */
-#define X86_FEATURE_PFTHRESHOLD (8*32+14) /* AMD pause filter threshold */
-
-
-/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
-#define X86_FEATURE_FSGSBASE   (9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
-#define X86_FEATURE_TSC_ADJUST (9*32+ 1) /* TSC adjustment MSR 0x3b */
-#define X86_FEATURE_BMI1       (9*32+ 3) /* 1st group bit manipulation extensions */
-#define X86_FEATURE_HLE                (9*32+ 4) /* Hardware Lock Elision */
-#define X86_FEATURE_AVX2       (9*32+ 5) /* AVX2 instructions */
-#define X86_FEATURE_SMEP       (9*32+ 7) /* Supervisor Mode Execution Protection */
-#define X86_FEATURE_BMI2       (9*32+ 8) /* 2nd group bit manipulation extensions */
-#define X86_FEATURE_ERMS       (9*32+ 9) /* Enhanced REP MOVSB/STOSB */
-#define X86_FEATURE_INVPCID    (9*32+10) /* Invalidate Processor Context ID */
-#define X86_FEATURE_RTM                (9*32+11) /* Restricted Transactional Memory */
-#define X86_FEATURE_RDSEED     (9*32+18) /* The RDSEED instruction */
-#define X86_FEATURE_ADX                (9*32+19) /* The ADCX and ADOX instructions */
-#define X86_FEATURE_SMAP       (9*32+20) /* Supervisor Mode Access Prevention */
-
-#include <bitops.h>
-
-extern const char * const x86_cap_flags[NCAPINTS*32];
-extern const char * const x86_power_flags[32];
-
-#define test_cpu_cap(c, bit)                                           \
-        test_bit(bit, (unsigned long *)((c)->x86_capability))
-
-#define REQUIRED_MASK_BIT_SET(bit)                                     \
-        ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) ||     \
-          (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1)) ||     \
-          (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2)) ||     \
-          (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) ||     \
-          (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) ||     \
-          (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) ||     \
-          (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) ||     \
-          (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) ||     \
-          (((bit)>>5)==8 && (1UL<<((bit)&31) & REQUIRED_MASK8)) ||     \
-          (((bit)>>5)==9 && (1UL<<((bit)&31) & REQUIRED_MASK9)) )
-
-#define cpu_has(c, bit)                                                        \
-       (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :  \
-        test_cpu_cap(c, bit))
-
-#define this_cpu_has(bit)                                              \
-       (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :  \
-        x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
-
-#define boot_cpu_has(bit)      cpu_has(&boot_cpu_data, bit)
-
-#define set_cpu_cap(c, bit)    set_bit(bit, (unsigned long *)((c)->x86_capability))
-#define clear_cpu_cap(c, bit)  clear_bit(bit, (unsigned long *)((c)->x86_capability))
-#define setup_clear_cpu_cap(bit) do { \
-       clear_cpu_cap(&boot_cpu_data, bit);     \
-       set_bit(bit, (unsigned long *)cpu_caps_cleared); \
-} while (0)
-#define setup_force_cpu_cap(bit) do { \
-       set_cpu_cap(&boot_cpu_data, bit);       \
-       set_bit(bit, (unsigned long *)cpu_caps_set);    \
-} while (0)
-
-#define cpu_has_fpu            boot_cpu_has(X86_FEATURE_FPU)
-#define cpu_has_vme            boot_cpu_has(X86_FEATURE_VME)
-#define cpu_has_de             boot_cpu_has(X86_FEATURE_DE)
-#define cpu_has_pse            boot_cpu_has(X86_FEATURE_PSE)
-#define cpu_has_tsc            boot_cpu_has(X86_FEATURE_TSC)
-#define cpu_has_pae            boot_cpu_has(X86_FEATURE_PAE)
-#define cpu_has_pge            boot_cpu_has(X86_FEATURE_PGE)
-#define cpu_has_apic           boot_cpu_has(X86_FEATURE_APIC)
-#define cpu_has_sep            boot_cpu_has(X86_FEATURE_SEP)
-#define cpu_has_mtrr           boot_cpu_has(X86_FEATURE_MTRR)
-#define cpu_has_mmx            boot_cpu_has(X86_FEATURE_MMX)
-#define cpu_has_fxsr           boot_cpu_has(X86_FEATURE_FXSR)
-#define cpu_has_xmm            boot_cpu_has(X86_FEATURE_XMM)
-#define cpu_has_xmm2           boot_cpu_has(X86_FEATURE_XMM2)
-#define cpu_has_xmm3           boot_cpu_has(X86_FEATURE_XMM3)
-#define cpu_has_ssse3          boot_cpu_has(X86_FEATURE_SSSE3)
-#define cpu_has_aes            boot_cpu_has(X86_FEATURE_AES)
-#define cpu_has_avx            boot_cpu_has(X86_FEATURE_AVX)
-#define cpu_has_ht             boot_cpu_has(X86_FEATURE_HT)
-#define cpu_has_mp             boot_cpu_has(X86_FEATURE_MP)
-#define cpu_has_nx             boot_cpu_has(X86_FEATURE_NX)
-#define cpu_has_k6_mtrr                boot_cpu_has(X86_FEATURE_K6_MTRR)
-#define cpu_has_cyrix_arr      boot_cpu_has(X86_FEATURE_CYRIX_ARR)
-#define cpu_has_centaur_mcr    boot_cpu_has(X86_FEATURE_CENTAUR_MCR)
-#define cpu_has_xstore         boot_cpu_has(X86_FEATURE_XSTORE)
-#define cpu_has_xstore_enabled boot_cpu_has(X86_FEATURE_XSTORE_EN)
-#define cpu_has_xcrypt         boot_cpu_has(X86_FEATURE_XCRYPT)
-#define cpu_has_xcrypt_enabled boot_cpu_has(X86_FEATURE_XCRYPT_EN)
-#define cpu_has_ace2           boot_cpu_has(X86_FEATURE_ACE2)
-#define cpu_has_ace2_enabled   boot_cpu_has(X86_FEATURE_ACE2_EN)
-#define cpu_has_phe            boot_cpu_has(X86_FEATURE_PHE)
-#define cpu_has_phe_enabled    boot_cpu_has(X86_FEATURE_PHE_EN)
-#define cpu_has_pmm            boot_cpu_has(X86_FEATURE_PMM)
-#define cpu_has_pmm_enabled    boot_cpu_has(X86_FEATURE_PMM_EN)
-#define cpu_has_ds             boot_cpu_has(X86_FEATURE_DS)
-#define cpu_has_pebs           boot_cpu_has(X86_FEATURE_PEBS)
-#define cpu_has_clflush                boot_cpu_has(X86_FEATURE_CLFLSH)
-#define cpu_has_bts            boot_cpu_has(X86_FEATURE_BTS)
-#define cpu_has_gbpages                boot_cpu_has(X86_FEATURE_GBPAGES)
-#define cpu_has_arch_perfmon   boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
-#define cpu_has_pat            boot_cpu_has(X86_FEATURE_PAT)
-#define cpu_has_xmm4_1         boot_cpu_has(X86_FEATURE_XMM4_1)
-#define cpu_has_xmm4_2         boot_cpu_has(X86_FEATURE_XMM4_2)
-#define cpu_has_x2apic         boot_cpu_has(X86_FEATURE_X2APIC)
-#define cpu_has_xsave          boot_cpu_has(X86_FEATURE_XSAVE)
-#define cpu_has_xsaveopt       boot_cpu_has(X86_FEATURE_XSAVEOPT)
-#define cpu_has_osxsave                boot_cpu_has(X86_FEATURE_OSXSAVE)
-#define cpu_has_hypervisor     boot_cpu_has(X86_FEATURE_HYPERVISOR)
-#define cpu_has_pclmulqdq      boot_cpu_has(X86_FEATURE_PCLMULQDQ)
-#define cpu_has_perfctr_core   boot_cpu_has(X86_FEATURE_PERFCTR_CORE)
-#define cpu_has_cx8            boot_cpu_has(X86_FEATURE_CX8)
-#define cpu_has_cx16           boot_cpu_has(X86_FEATURE_CX16)
-#define cpu_has_eager_fpu      boot_cpu_has(X86_FEATURE_EAGER_FPU)
-#define cpu_has_topoext                boot_cpu_has(X86_FEATURE_TOPOEXT)
-
-#undef  cpu_has_vme
-#define cpu_has_vme            0
-
-#undef  cpu_has_pae
-#define cpu_has_pae            ___BUG___
-
-#undef  cpu_has_mp
-#define cpu_has_mp             1
-
-#undef  cpu_has_k6_mtrr
-#define cpu_has_k6_mtrr                0
-
-#undef  cpu_has_cyrix_arr
-#define cpu_has_cyrix_arr      0
-
-#undef  cpu_has_centaur_mcr
-#define cpu_has_centaur_mcr    0
-
-/*
- * Static testing of CPU features.  Used the same as boot_cpu_has().
- * These are only valid after alternatives have run, but will statically
- * patch the target code for additional performance.
- *
- */
-static inline bool __static_cpu_has(uint16_t bit)
-{
-#if __GNUC__ > 4 || __GNUC_MINOR__ >= 5
-               asm goto("1: jmp %l[t_no]\n"
-                        "2:\n"
-                        ".section .altinstructions,\"a\"\n"
-                        " .long 1b - .\n"
-                        " .long 0\n"           /* no replacement */
-                        " .word %P0\n"         /* feature bit */
-                        " .byte 2b - 1b\n"     /* source len */
-                        " .byte 0\n"           /* replacement len */
-                        ".previous\n"
-                        /* skipping size check since replacement size = 0 */
-                        : : "i" (bit) : : t_no);
-               return true;
-       t_no:
-               return false;
-#else
-#error "Here's a nickel, kid. Go get yourself a real compiler"
-#endif
-}
-
-#define static_cpu_has(bit)                                    \
-(                                                              \
-       __builtin_constant_p(boot_cpu_has(bit)) ?               \
-               boot_cpu_has(bit) :                             \
-       __builtin_constant_p(bit) ?                             \
-               __static_cpu_has(bit) :                         \
-               boot_cpu_has(bit)                               \
-)
index c065f60..98c4404 100644 (file)
 #include "vmx.h"
 #include "../vmm.h"
 
-#include "cpufeature.h"
-
 #include <trap.h>
 
 #include <smp.h>