mmu64: for completeness sake, define PML4_REACH (XCC)
authorRonald G. Minnich <rminnich@gmail.com>
Fri, 6 Jan 2017 21:03:59 +0000 (13:03 -0800)
committerBarret Rhoden <brho@cs.berkeley.edu>
Mon, 9 Jan 2017 17:07:15 +0000 (12:07 -0500)
Reinstall your kernel headers

Change-Id: I7f00acb4572a2560af15e70935a556ae3778601f
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
[xcc warning]
Signed-off-by: Barret Rhoden <brho@cs.berkeley.edu>
kern/arch/x86/ros/mmu64.h

index a18c7f2..28649ad 100644 (file)
@@ -244,6 +244,7 @@ typedef struct x86_pgdir {
 
 /* Reach is the amount of VM a table can map, counting all of its entries.
  * Note that a PML(n)_PTE is a PML(n-1) table. */
+#define PML4_REACH             (512ULL * PML4_PTE_REACH)
 #define PML3_REACH             (PML4_PTE_REACH)
 #define PML2_REACH             (PML3_PTE_REACH)
 #define PML1_REACH             (PML2_PTE_REACH)