x86: Fixes PCI 8 and 16 byte accesses
authorBarret Rhoden <brho@cs.berkeley.edu>
Sat, 29 Mar 2014 00:05:41 +0000 (17:05 -0700)
committerBarret Rhoden <brho@cs.berkeley.edu>
Sat, 29 Mar 2014 01:17:06 +0000 (18:17 -0700)
commitea5b0d00b27b6731fc274ec70d7e33e81908c82e
treeea8580e634e697885201c69b9b71c16ae29449fe
parent991dcef64961834ab3efea923bbe58ab23b41ce1
x86: Fixes PCI 8 and 16 byte accesses

Instead of reading and writing on 32 byte boundaries, you are supposed
to access on the 32 byte boundary, but then do the data read/write from
an offsetted *IO port*.  There are a few of them, which sort of read
from the space directly.  Ugh.

Also, the offset into the config space will need to be up to 4KB, not
256, for PCI-E.  Ugh.
kern/arch/x86/pci.c
kern/arch/x86/pci.h