VMM: Clear upper 32 bits on MSR reads [2/4]
authorBarret Rhoden <brho@cs.berkeley.edu>
Mon, 1 Feb 2016 16:19:31 +0000 (11:19 -0500)
committerBarret Rhoden <brho@cs.berkeley.edu>
Tue, 2 Feb 2016 22:43:52 +0000 (17:43 -0500)
commit586efd477846e9d62c422820e0c6f5fe139d0663
treeb19977fe85777c5e5de44328b2c5d3d8bbf5581f
parent37f19890c81f5ca3c30677cf308fb1af05bbd971
VMM: Clear upper 32 bits on MSR reads [2/4]

MSR reads in hardware should clear the upper 32 bits of rax and rdx.  Our
emulation code was going out of its way to keep the upper 32 bits as they
were on the trap, instead of clearing them.

Signed-off-by: Barret Rhoden <brho@cs.berkeley.edu>
kern/arch/x86/vmm/intel/vmx.c