PIC helper functions to read the ISR, IRR, and IMR
authorBarret Rhoden <brho@cs.berkeley.edu>
Wed, 4 Apr 2012 23:40:39 +0000 (16:40 -0700)
committerBarret Rhoden <brho@cs.berkeley.edu>
Wed, 4 Apr 2012 23:40:39 +0000 (16:40 -0700)
commit3a019ad7a3c79469cc0fdf9dae672c86a0dfb6c4
treea50313cdf152a0ccc5e9710e053a7c59acb28bfd
parentf48ec6e27faa9c6be4eb1c545d7a083e736b9a6d
PIC helper functions to read the ISR, IRR, and IMR

Remember, bit 2 (0x4) will be high on the ISR/IRR when any of the high 8
IRQs are high, due to the chaining of the PICs.  Likewise, the IRR will
show an IRQ when it is masked - the chip will simply never send it.

Also note that these only apply for interrupts coming in via the PIC,
and not the IOAPIC/LAPIC.  You'll need to check the LAPIC for its
ISR/IRR.
kern/arch/i686/apic.c
kern/arch/i686/apic.h