Changes to RISC-V supervisor mode
authorAndrew Waterman <waterman@s144.Millennium.Berkeley.EDU>
Fri, 11 Nov 2011 08:32:22 +0000 (00:32 -0800)
committerAndrew Waterman <waterman@s144.Millennium.Berkeley.EDU>
Fri, 11 Nov 2011 08:32:22 +0000 (00:32 -0800)
commit006db3814e70b3bf2c1e02caaa8b931a8210ac18
tree5495520e40d990a4f433907215301a289b37894e
parent02ddfb889115c8cc5985a5060e5de116d663d475
Changes to RISC-V supervisor mode

See commit comments in ISA simulator for details
kern/arch/riscv/boot.S
kern/arch/riscv/cboot.c
kern/arch/riscv/entry.S
kern/arch/riscv/kernel.ld
kern/arch/riscv/pcr.h
kern/arch/riscv/riscv.h
kern/arch/riscv/smp.c
kern/arch/riscv/time.c
kern/arch/riscv/trap.c