Add RISC-V CAS via load-reserved/store conditional
[akaros.git] / user / parlib / timing.c
index b0a84bc..0efc5f7 100644 (file)
@@ -16,3 +16,15 @@ void udelay(uint64_t usec)
        } while (now < end || (now > start && end < start));
        return;
 }
+
+/* Difference between the ticks in microseconds */
+uint64_t udiff(uint64_t begin, uint64_t end)
+{
+       return (end - begin) * 1000000 /  __procinfo.tsc_freq;
+}
+
+/* Difference between the ticks in nanoseconds */
+uint64_t ndiff(uint64_t begin, uint64_t end)
+{
+       return (end - begin) * 1000000000 /  __procinfo.tsc_freq;
+}