Remove kernel-specific parts of ros/common.h (XCC)

[akaros.git] / kern / include / smp.h

diff --git a/kern/include/smp.h b/kern/include/smp.h
index 40886be..ddb4f7c 100644 (file)
--- a/kern/include/smp.h
+++ b/kern/include/smp.h
@@ -4,8 +4,7 @@
  * See LICENSE for details.
  */
 
-#ifndef ROS_INC_SMP_H
-#define ROS_INC_SMP_H
+#pragma once
 
 /* SMP related functions */
 
@@ -18,10 +17,7 @@
 #include <syscall.h>
 #include <alarm.h>
 #include <trace.h>
-
-#ifdef __SHARC__
-typedef sharC_env_t;
-#endif
+#include <core_set.h>
 
 #define CPU_STATE_IRQ                  0
 #define CPU_STATE_KERNEL               1
@@ -41,10 +37,10 @@ struct per_cpu_info {
 #ifdef CONFIG_X86
        uintptr_t stacktop;                     /* must be first */
        int coreid;                                     /* must be second */
-       struct vmcs *vmxarea;
-       pseudodesc_t host_gdt;
+       int nmi_status;
+       uintptr_t nmi_worker_stacktop;
        int vmx_enabled;
-       void *local_vcpu;
+       int guest_pcoreid;
 #endif
        spinlock_t lock;
        /* Process management */
@@ -64,12 +60,6 @@ struct per_cpu_info {
        int cpu_state;
        uint64_t last_tick_cnt;
        uint64_t state_ticks[NR_CPU_STATES];
-#ifdef __SHARC__
-       // held spin-locks. this will have to go elsewhere if multiple kernel
-       // threads can share a CPU.
-       // zra: Used by Ivy. Let me know if this should go elsewhere.
-       sharC_env_t sharC_env;
-#endif
        /* TODO: 64b (not sure if we'll need these at all */
 #ifdef CONFIG_X86
        taskstate_t *tss;
@@ -77,9 +67,9 @@ struct per_cpu_info {
 #endif
        /* KMSGs */
        spinlock_t immed_amsg_lock;
-       struct kernel_msg_list NTPTV(a0t) NTPTV(a1t) NTPTV(a2t) immed_amsgs;
+       struct kernel_msg_list immed_amsgs;
        spinlock_t routine_amsg_lock;
-       struct kernel_msg_list NTPTV(a0t) NTPTV(a1t) NTPTV(a2t) routine_amsgs;
+       struct kernel_msg_list routine_amsgs;
        /* profiling -- opaque to all but the profiling code. */
        void *profiling;
 }__attribute__((aligned(ARCH_CL_SIZE)));
@@ -93,10 +83,8 @@ struct per_cpu_info {
  * interrupted contexts via iret/etc.  We never do that for user contexts. */
 #define current_ctx per_cpu_info[core_id()].cur_ctx
 
-typedef struct per_cpu_info NTPTV(t) NTPTV(a0t) NTPTV(a1t) NTPTV(a2t) per_cpu_info_t;
-
-extern per_cpu_info_t (RO per_cpu_info)[MAX_NUM_CPUS];
-extern volatile uint32_t RO num_cpus;
+typedef struct per_cpu_info  per_cpu_info_t;
+extern per_cpu_info_t per_cpu_info[MAX_NUM_CORES];
 
 /* SMP bootup functions */
 void smp_boot(void);
@@ -167,11 +155,12 @@ struct pcpu_trace_event {
 
 #endif /* CONFIG_TRACE_LOCKS */
 
+void smp_do_in_cores(const struct core_set *cset, void (*func)(void *),
+                                        void *opaque);
+
 /* Run the handlers for all events in a pcpui ring.  Can run on all cores, or
  * just one core.  'type' selects which event type is handled (0 for all). */
 void pcpui_tr_foreach(int coreid, int type);
 void pcpui_tr_foreach_all(int type);
 void pcpui_tr_reset_all(void);
 void pcpui_tr_reset_and_clear_all(void);
-
-#endif /* ROS_INC_SMP_H */