Lindent on the new APIC/ACPI files
[akaros.git] / kern / arch / x86 / apic9.c
index c444b93..e5282a0 100644 (file)
 #include <ip.h>
 #include <arch/io.h>
 
-enum {                                         /* Local APIC registers */
-       Id              = 0x0020,               /* Identification */
-       Ver             = 0x0030,               /* Version */
-       Tp              = 0x0080,               /* Task Priority */
-       Ap              = 0x0090,               /* Arbitration Priority */
-       Pp              = 0x00a0,               /* Processor Priority */
-       Eoi             = 0x00b0,               /* EOI */
-       Ld              = 0x00d0,               /* Logical Destination */
-       Df              = 0x00e0,               /* Destination Format */
-       Siv             = 0x00f0,               /* Spurious Interrupt Vector */
-       Is              = 0x0100,               /* Interrupt Status (8) */
-       Tm              = 0x0180,               /* Trigger Mode (8) */
-       Ir              = 0x0200,               /* Interrupt Request (8) */
-       Es              = 0x0280,               /* Error Status */
-       Iclo            = 0x0300,               /* Interrupt Command */
-       Ichi            = 0x0310,               /* Interrupt Command [63:32] */
-       Lvt0            = 0x0320,               /* Local Vector Table 0 */
-       Lvt5            = 0x0330,               /* Local Vector Table 5 */
-       Lvt4            = 0x0340,               /* Local Vector Table 4 */
-       Lvt1            = 0x0350,               /* Local Vector Table 1 */
-       Lvt2            = 0x0360,               /* Local Vector Table 2 */
-       Lvt3            = 0x0370,               /* Local Vector Table 3 */
-       Tic             = 0x0380,               /* Timer Initial Count */
-       Tcc             = 0x0390,               /* Timer Current Count */
-       Tdc             = 0x03e0,               /* Timer Divide Configuration */
-
-       Tlvt            = Lvt0,                 /* Timer */
-       Lint0           = Lvt1,                 /* Local Interrupt 0 */
-       Lint1           = Lvt2,                 /* Local Interrupt 1 */
-       Elvt            = Lvt3,                 /* Error */
-       Pclvt           = Lvt4,                 /* Performance Counter */
-       Tslvt           = Lvt5,                 /* Thermal Sensor */
+enum {                                                 /* Local APIC registers */
+       Id = 0x0020,                            /* Identification */
+       Ver = 0x0030,   /* Version */
+       Tp = 0x0080,    /* Task Priority */
+       Ap = 0x0090,    /* Arbitration Priority */
+       Pp = 0x00a0,    /* Processor Priority */
+       Eoi = 0x00b0,   /* EOI */
+       Ld = 0x00d0,    /* Logical Destination */
+       Df = 0x00e0,    /* Destination Format */
+       Siv = 0x00f0,   /* Spurious Interrupt Vector */
+       Is = 0x0100,    /* Interrupt Status (8) */
+       Tm = 0x0180,    /* Trigger Mode (8) */
+       Ir = 0x0200,    /* Interrupt Request (8) */
+       Es = 0x0280,    /* Error Status */
+       Iclo = 0x0300,  /* Interrupt Command */
+       Ichi = 0x0310,  /* Interrupt Command [63:32] */
+       Lvt0 = 0x0320,  /* Local Vector Table 0 */
+       Lvt5 = 0x0330,  /* Local Vector Table 5 */
+       Lvt4 = 0x0340,  /* Local Vector Table 4 */
+       Lvt1 = 0x0350,  /* Local Vector Table 1 */
+       Lvt2 = 0x0360,  /* Local Vector Table 2 */
+       Lvt3 = 0x0370,  /* Local Vector Table 3 */
+       Tic = 0x0380,   /* Timer Initial Count */
+       Tcc = 0x0390,   /* Timer Current Count */
+       Tdc = 0x03e0,   /* Timer Divide Configuration */
+
+       Tlvt = Lvt0,    /* Timer */
+       Lint0 = Lvt1,   /* Local Interrupt 0 */
+       Lint1 = Lvt2,   /* Local Interrupt 1 */
+       Elvt = Lvt3,    /* Error */
+       Pclvt = Lvt4,   /* Performance Counter */
+       Tslvt = Lvt5,   /* Thermal Sensor */
 };
 
-enum {                                         /* Siv */
-       Swen            = 0x00000100,           /* Software Enable */
-       Fdis            = 0x00000200,           /* Focus Disable */
+static char *apicregnames[] = {
+       [Id] "Identification",
+       [Ver] "Version",
+       [Tp] "Task Priority",
+       [Ap] "Arbitration Priority",
+       [Pp] "Processor Priority",
+       [Eoi] "EOI",
+       [Ld] "Logical Destination",
+       [Df] "Destination Format",
+       [Siv] "Spurious Interrupt Vector",
+       [Is] "Interrupt Status (8)",
+       [Tm] "Trigger Mode (8)",
+       [Ir] "Interrupt Request (8)",
+       [Es] "Error Status",
+       [Iclo] "Interrupt Command",
+       [Ichi] "Interrupt Command [63:32]",
+       [Lvt0] "Local Vector Table 0",
+       [Lvt5] "Local Vector Table 5",
+       [Lvt4] "Local Vector Table 4",
+       [Lvt1] "Local Vector Table 1",
+       [Lvt2] "Local Vector Table 2",
+       [Lvt3] "Local Vector Table 3",
+       [Tic] "Timer Initial Count",
+       [Tcc] "Timer Current Count",
+       [Tdc] "Timer Divide Configuration",
+
+       [Tlvt] "Timer",
+       [Lint0] "Local Interrupt 0",
+       [Lint1] "Local Interrupt 1",
+       [Elvt] "Error",
+       [Pclvt] "Performance Counter",
+       [Tslvt] "Thermal Sensor",
 };
 
-enum {                                         /* Iclo */
-       Lassert         = 0x00004000,           /* Assert level */
+enum {                                                 /* Siv */
+       Swen = 0x00000100,                      /* Software Enable */
+       Fdis = 0x00000200,      /* Focus Disable */
+};
+
+enum {                                                 /* Iclo */
+       Lassert = 0x00004000,           /* Assert level */
 
-       DSnone          = 0x00000000,           /* Use Destination Field */
-       DSself          = 0x00040000,           /* Self is only destination */
-       DSallinc        = 0x00080000,           /* All including self */
-       DSallexc        = 0x000c0000,           /* All Excluding self */
+       DSnone = 0x00000000,    /* Use Destination Field */
+       DSself = 0x00040000,    /* Self is only destination */
+       DSallinc = 0x00080000,  /* All including self */
+       DSallexc = 0x000c0000,  /* All Excluding self */
 };
 
-enum {                                         /* Tlvt */
-       Periodic        = 0x00020000,           /* Periodic Timer Mode */
+enum {                                                 /* Tlvt */
+       Periodic = 0x00020000,          /* Periodic Timer Mode */
 };
 
-enum {                                         /* Tdc */
-       DivX2           = 0x00000000,           /* Divide by 2 */
-       DivX4           = 0x00000001,           /* Divide by 4 */
-       DivX8           = 0x00000002,           /* Divide by 8 */
-       DivX16          = 0x00000003,           /* Divide by 16 */
-       DivX32          = 0x00000008,           /* Divide by 32 */
-       DivX64          = 0x00000009,           /* Divide by 64 */
-       DivX128         = 0x0000000a,           /* Divide by 128 */
-       DivX1           = 0x0000000b,           /* Divide by 1 */
+enum {                                                 /* Tdc */
+       DivX2 = 0x00000000,                     /* Divide by 2 */
+       DivX4 = 0x00000001,     /* Divide by 4 */
+       DivX8 = 0x00000002,     /* Divide by 8 */
+       DivX16 = 0x00000003,    /* Divide by 16 */
+       DivX32 = 0x00000008,    /* Divide by 32 */
+       DivX64 = 0x00000009,    /* Divide by 64 */
+       DivX128 = 0x0000000a,   /* Divide by 128 */
+       DivX1 = 0x0000000b,     /* Divide by 1 */
 };
 
-static uint8_tapicbase;
+static uint8_t *apicbase;
 static int apmachno = 1;
 
-struct apic    xlapic[Napic];
+struct apic xlapic[Napic];
 
-static uint32_t
-apicrget(int r)
+static uint32_t apicrget(int r)
 {
-       if (! apicbase)
+       uint32_t val;
+       if (!apicbase)
                panic("apicrget: no apic");
-       return *((uint32_t*)(apicbase+r));
+       val = *((uint32_t *) (apicbase + r));
+       printk("apicrget: %s returns %p\n", apicregnames[r], val);
+       return *((uint32_t *) (apicbase + r));
+       return val;
 }
 
-static void
-apicrput(int r, uint32_t data)
+static void apicrput(int r, uint32_t data)
 {
-       if (! apicbase)
+       if (!apicbase)
                panic("apicrput: no apic");
-       *((uint32_t*)(apicbase+r)) = data;
+       printk("apicrput: %s = %p\n", apicregnames[r], data);
+       *((uint32_t *) (apicbase + r)) = data;
 }
 
-int
-apiceoi(int vecno)
+int apiceoi(int vecno)
 {
        apicrput(Eoi, 0);
 
        return vecno;
 }
 
-int
-apicisr(int vecno)
+int apicisr(int vecno)
 {
        int isr;
 
-       isr = apicrget(Is + (vecno/32)*16);
+       isr = apicrget(Is + (vecno / 32) * 16);
 
-       return isr & (1<<(vecno%32));
+       return isr & (1 << (vecno % 32));
 }
 
-void
-apicinit(int apicno, uintptr_t pa, int isbp)
+void apicinit(int apicno, uintptr_t pa, int isbp)
 {
        struct apic *apic;
 
@@ -129,21 +163,16 @@ apicinit(int apicno, uintptr_t pa, int isbp)
         * to be dealt with sometime.
         */
        printk("apicinit: apicno %d pa %#p isbp %d\n", apicno, pa, isbp);
-       if(apicno >= Napic){
+       if (apicno >= Napic) {
                printd("apicinit%d: out of range\n", apicno);
                return;
        }
-       if((apic = &xlapic[apicno])->useable){
+       if ((apic = &xlapic[apicno])->useable) {
                printd("apicinit%d: already initialised\n", apicno);
                return;
        }
-       if(apicbase == NULL){
-               if((apicbase = vmap_pmem(pa, 1024)) == NULL){
-                       printd("apicinit%d: can't map apicbase\n", apicno);
-                       return;
-               }
-               printk("apicinit%d: apicbase %#p -> %#p\n", apicno, pa, apicbase);
-       }
+       apicbase = LAPIC_BASE;
+       printk("apicinit%d: apicbase %#p -> %#p\n", apicno, pa, apicbase);
        apic->useable = 1;
        printk("apicinit%d: it's useable\n", apicno);
 
@@ -153,69 +182,70 @@ apicinit(int apicno, uintptr_t pa, int isbp)
         * Machno 0 is always the bootstrap processor.
         */
 
-       if(isbp){
+       if (isbp) {
                apic->machno = 0;
 #warning "where in pcpui do we put the apicno?"
                //m->apicno = apicno;
-       }
-       else
+       } else
                apic->machno = apmachno++;
 }
 
-static char *
-apicdump0(char *start, char *end, struct apic *apic, int i)
+static char *apicdump0(char *start, char *end, struct apic *apic, int i)
 {
-       if(!apic->useable || apic->addr != 0)
+       if (!apic->useable || apic->addr != 0)
                return start;
-       start = seprintf(start, end, "apic%d: machno %d lint0 %#8.8p lint1 %#8.8p\n",
-               i, apic->machno, apic->lvt[0], apic->lvt[1]);
-       start = seprintf(start, end, " tslvt %#8.8p pclvt %#8.8p elvt %#8.8p\n",
-               apicrget(Tslvt), apicrget(Pclvt), apicrget(Elvt));
-       start = seprintf(start, end, " tlvt %#8.8p lint0 %#8.8p lint1 %#8.8p siv %#8.8p\n",
-               apicrget(Tlvt), apicrget(Lint0),
-               apicrget(Lint1), apicrget(Siv));
+       start =
+               seprintf(start, end, "apic%d: machno %d lint0 %#8.8p lint1 %#8.8p\n", i,
+                                apic->machno, apic->lvt[0], apic->lvt[1]);
+       start =
+               seprintf(start, end, " tslvt %#8.8p pclvt %#8.8p elvt %#8.8p\n",
+                                apicrget(Tslvt), apicrget(Pclvt), apicrget(Elvt));
+       start =
+               seprintf(start, end,
+                                " tlvt %#8.8p lint0 %#8.8p lint1 %#8.8p siv %#8.8p\n",
+                                apicrget(Tlvt), apicrget(Lint0), apicrget(Lint1),
+                                apicrget(Siv));
        return start;
 }
 
-char *
-apicdump(char *start, char *end)
+char *apicdump(char *start, char *end)
 {
        int i;
 
-       if(!2)
+       if (!2)
                return start;
 
-       start = seprintf(start, end, "apicbase %#p apmachno %d\n", apicbase, apmachno);
-       for(i = 0; i < Napic; i++)
+       start =
+               seprintf(start, end, "apicbase %#p apmachno %d\n", apicbase, apmachno);
+       for (i = 0; i < Napic; i++)
                start = apicdump0(start, end, xlapic + i, i);
        /* endxioapic?
-       for(i = 0; i < Napic; i++)
-               start = apicdump0(start, endxioapic + i, i);
-       */
+          for(i = 0; i < Napic; i++)
+          start = apicdump0(start, endxioapic + i, i);
+        */
        return start;
 }
+
 #if 0
-static void
-apictimer(Ureg* ureg, void*)
+static void apictimer(Ureg * ureg, void *)
 {
        timerintr(ureg, 0);
 }
 
 #endif
-int
-apiconline(void)
+int apiconline(void)
 {
        struct apic *apic;
        uint64_t tsc;
        uint32_t dfr, ver;
        int apicno, nlvt;
 
-       if(apicbase == NULL)
+       if (apicbase == NULL)
                return 0;
-       if((apicno = ((apicrget(Id)>>24) & 0xff)) >= Napic)
+       if ((apicno = ((apicrget(Id) >> 24) & 0xff)) >= Napic)
                return 0;
        apic = &xlapic[apicno];
-       if(!apic->useable || apic->addr != NULL)
+       if (!apic->useable || apic->addr != NULL)
                return 0;
 
        /*
@@ -224,10 +254,10 @@ apiconline(void)
         * processor.
         */
        ver = apicrget(Ver);
-       nlvt = ((ver>>16) & 0xff) + 1;
-       if(nlvt > ARRAY_SIZE(apic->lvt)){
-               printk("apicinit%d: nlvt %d > max (%d)\n",
-                       apicno, nlvt, ARRAY_SIZE(apic->lvt));
+       nlvt = ((ver >> 16) & 0xff) + 1;
+       if (nlvt > ARRAY_SIZE(apic->lvt)) {
+               printk("apiconline%d: nlvt %d > max (%d)\n",
+                          apicno, nlvt, ARRAY_SIZE(apic->lvt));
                nlvt = ARRAY_SIZE(apic->lvt);
        }
        apic->nlvt = nlvt;
@@ -236,11 +266,11 @@ apiconline(void)
        /*
         * These don't really matter in Physical mode;
         * set the defaults anyway.
-       if(memcmp(m->cpuinfo, "AuthenticAMD", 12) == 0)
-               dfr = 0xf0000000;
-       else
+        if(memcmp(m->cpuinfo, "AuthenticAMD", 12) == 0)
+        dfr = 0xf0000000;
+        else
         */
-               dfr = 0xffffffff;
+       dfr = 0xffffffff;
        apicrput(Df, dfr);
        apicrput(Ld, 0x00000000);
 
@@ -256,7 +286,7 @@ apiconline(void)
         * bits 3-0 0x0f unless the Extended Spurious Vector Enable bit
         * is set in the HyperTransport Transaction Control register.
         */
-       apicrput(Siv, Swen|IdtSPURIOUS);
+       apicrput(Siv, Swen | IdtSPURIOUS);
 
        /*
         * Acknowledge any outstanding interrupts.
@@ -271,20 +301,20 @@ apiconline(void)
        apicrput(Tdc, DivX1);
        apicrput(Tlvt, Im);
        // system_timing.tsc_freq? is that valid yet?
-       tsc = read_tsc() + 2*1024*(1048576/10) /*m->cpuhz/10*/ ;
+       tsc = read_tsc() + 2 * 1024 * (1048576 / 10) /*m->cpuhz/10 */ ;
        apicrput(Tic, 0xffffffff);
 
-       while(read_tsc() < tsc)
-               ;
+       while (read_tsc() < tsc) ;
 #define HZ 60
-       apic->hz = (0xffffffff-apicrget(Tcc))*10;
-       apic->max = apic->hz/HZ;
-       apic->min = apic->hz/(100*HZ);
-       apic->div = ((2ULL*1024*1048576 /*m->cpuhz*/ /apic->max)+HZ/2)/HZ;
+       apic->hz = (0xffffffff - apicrget(Tcc)) * 10;
+       apic->max = apic->hz / HZ;
+       apic->min = apic->hz / (100 * HZ);
+       apic->div =
+               ((2ULL * 1024 * 1048576 /*m->cpuhz */  / apic->max) + HZ / 2) / HZ;
 
-       if(/*m->machno == 0 ||*/ 2){
+       if ( /*m->machno == 0 || */ 2) {
                printk("apic%d: hz %lld max %lld min %lld div %lld\n", apicno,
-                       apic->hz, apic->max, apic->min, apic->div);
+                          apic->hz, apic->max, apic->min, apic->div);
        }
 
        /*
@@ -294,18 +324,16 @@ apiconline(void)
         * Clear any Error Status (write followed by read) and enable
         * the Error interrupt.
         */
-       switch(apic->nlvt){
-       case 6:
-               apicrput(Tslvt, Im);
-               /*FALLTHROUGH*/
-       case 5:
-               apicrput(Pclvt, Im);
-               /*FALLTHROUGH*/
-       default:
-               break;
+       switch (apic->nlvt) {
+               case 6:
+                       apicrput(Tslvt, Im);
+                /*FALLTHROUGH*/ case 5:
+                       apicrput(Pclvt, Im);
+                /*FALLTHROUGH*/ default:
+                       break;
        }
-       apicrput(Lint1, apic->lvt[1]|Im|IdtLINT1);
-       apicrput(Lint0, apic->lvt[0]|Im|IdtLINT0);
+       apicrput(Lint1, apic->lvt[1] | Im | IdtLINT1);
+       apicrput(Lint0, apic->lvt[0] | Im | IdtLINT0);
 
        apicrput(Es, 0);
        apicrget(Es);
@@ -315,10 +343,10 @@ apiconline(void)
         * Issue an INIT Level De-Assert to synchronise arbitration ID's.
         * (Necessary in this implementation? - not if Pentium 4 or Xeon
         * (APIC Version >= 0x14), or AMD).
-       apicrput(Ichi, 0);
-       apicrput(Iclo, DSallinc|Lassert|MTir);
-       while(apicrget(Iclo) & Ds)
-               ;
+        apicrput(Ichi, 0);
+        apicrput(Iclo, DSallinc|Lassert|MTir);
+        while(apicrget(Iclo) & Ds)
+        ;
         */
 
 #warning "not reloading the timer"
@@ -326,18 +354,17 @@ apiconline(void)
         * Reload the timer to de-synchronise the processors,
         * then lower the task priority to allow interrupts to be
         * accepted by the APIC.
-       microdelay((TK2MS(1)*1000/apmachno) * m->machno);
+        microdelay((TK2MS(1)*1000/apmachno) * m->machno);
         */
 
 #if 0
-       if(apic->machno == 0){
+       if (apic->machno == 0) {
                apicrput(Tic, apic->max);
                intrenable(IdtTIMER, apictimer, 0, -1, "APIC timer");
-               apicrput(Tlvt, Periodic|IrqTIMER);
+               apicrput(Tlvt, Periodic | IrqTIMER);
        }
-
 #endif
-       if(node_id() /*m->machno*/ == 0)
+       if (node_id() /*m->machno */  == 0)
                apicrput(Tp, 0);
 
 #warning "map from apicno to cpu info not installed"
@@ -351,39 +378,37 @@ apiconline(void)
 
 #if 0
 /* To start timers on TCs as part of the boot process. */
-void
-apictimerenab(void)
+void apictimerenab(void)
 {
        struct apic *apic;
 
-       apic = &xlapic[(apicrget(Id)>>24) & 0xff];
+       apic = &xlapic[(apicrget(Id) >> 24) & 0xff];
 
        apiceoi(IdtTIMER);
        apicrput(Tic, apic->max);
-       apicrput(Tlvt, Periodic|IrqTIMER);
+       apicrput(Tlvt, Periodic | IrqTIMER);
 
 }
 
-void
-apictimerset(uint64_t next)
+void apictimerset(uint64_t next)
 {
        Mpl pl;
        struct apic *apic;
        int64_t period;
 
-       apic = &xlapic[(apicrget(Id)>>24) & 0xff];
+       apic = &xlapic[(apicrget(Id) >> 24) & 0xff];
 
        pl = splhi();
        spin_lock(&(&m->apictimerlock)->lock);
 
        period = apic->max;
-       if(next != 0){
+       if (next != 0) {
                period = next - fastticks(NULL);        /* fastticks is just rdtsc() */
                period /= apic->div;
 
-               if(period < apic->min)
+               if (period < apic->min)
                        period = apic->min;
-               else if(period > apic->max - apic->min)
+               else if (period > apic->max - apic->min)
                        period = apic->max;
        }
        apicrput(Tic, period);
@@ -392,8 +417,7 @@ apictimerset(uint64_t next)
        splx(pl);
 }
 
-void
-apicsipi(int apicno, uintptr_t pa)
+void apicsipi(int apicno, uintptr_t pa)
 {
        int i;
        uint32_t crhi, crlo;
@@ -402,32 +426,29 @@ apicsipi(int apicno, uintptr_t pa)
         * SIPI - Start-up IPI.
         * To do: checks on apic validity.
         */
-       crhi = apicno<<24;
+       crhi = apicno << 24;
        apicrput(Ichi, crhi);
-       apicrput(Iclo, DSnone|TMlevel|Lassert|MTir);
+       apicrput(Iclo, DSnone | TMlevel | Lassert | MTir);
        microdelay(200);
-       apicrput(Iclo, DSnone|TMlevel|MTir);
+       apicrput(Iclo, DSnone | TMlevel | MTir);
        millidelay(10);
 
-       crlo = DSnone|TMedge|MTsipi|((uint32_t)pa/(4*KiB));
-       for(i = 0; i < 2; i++){
+       crlo = DSnone | TMedge | MTsipi | ((uint32_t) pa / (4 * KiB));
+       for (i = 0; i < 2; i++) {
                apicrput(Ichi, crhi);
                apicrput(Iclo, crlo);
                microdelay(200);
        }
 }
 
-void
-apicipi(int apicno)
+void apicipi(int apicno)
 {
-       apicrput(Ichi, apicno<<24);
-       apicrput(Iclo, DSnone|TMedge|Lassert|MTf|IdtIPI);
-       while(apicrget(Iclo) & Ds)
-               ;
+       apicrput(Ichi, apicno << 24);
+       apicrput(Iclo, DSnone | TMedge | Lassert | MTf | IdtIPI);
+       while (apicrget(Iclo) & Ds) ;
 }
 
-void
-apicpri(int pri)
+void apicpri(int pri)
 {
        apicrput(Tp, pri);
 }