Limit the headers pulled in by parlib/arch.h (XCC)
[akaros.git] / user / parlib / include / x86 / arch.h
1 #ifndef PARLIB_ARCH_H
2 #define PARLIB_ARCH_H
3
4 #include <ros/trapframe.h>
5 #include <ros/arch/mmu.h>
6
7 __BEGIN_DECLS
8
9 #define ARCH_CL_SIZE 64
10 #ifdef __x86_64__
11
12 #define internal_function 
13 #define X86_REG_BP                                      "rbp"
14 #define X86_REG_SP                                      "rsp"
15 #define X86_REG_IP                                      "rip"
16 #define X86_REG_AX                                      "rax"
17 #define X86_REG_BX                                      "rbx"
18 #define X86_REG_CX                                      "rcx"
19 #define X86_REG_DX                                      "rdx"
20
21 #else /* 32 bit */
22
23 #define internal_function   __attribute ((regparm (3), stdcall))
24 #define X86_REG_BP                                      "ebp"
25 #define X86_REG_SP                                      "esp"
26 #define X86_REG_IP                                      "eip"
27 #define X86_REG_AX                                      "eax"
28 #define X86_REG_BX                                      "ebx"
29 #define X86_REG_CX                                      "ecx"
30 #define X86_REG_DX                                      "edx"
31
32 #endif /* 64bit / 32bit */
33
34 /* Make sure you subtract off/save enough space at the top of the stack for
35  * whatever you compiler might want to use when calling a noreturn function or
36  * to handle a HW spill or whatever. */
37 static inline void __attribute__((always_inline))
38 set_stack_pointer(void *sp)
39 {
40         asm volatile("mov %0,%%"X86_REG_SP"" : : "r"(sp) : "memory", X86_REG_SP);
41 }
42
43 static inline void breakpoint(void)
44 {
45         asm volatile("int3");
46 }
47
48 static inline uint64_t read_tsc(void)
49 {
50         uint32_t edx, eax;
51         asm volatile("rdtsc" : "=d"(edx), "=a"(eax));
52         return (uint64_t)edx << 32 | eax;
53 }
54
55 /* Check out k/a/x86/rdtsc_test.c for more info */
56 static inline uint64_t read_tsc_serialized(void)
57 {
58         asm volatile("lfence"); /* mfence on amd */
59         return read_tsc();
60 }
61
62 static inline void cpu_relax(void)
63 {
64         asm volatile("pause" : : : "memory");
65 }
66
67 static inline void save_fp_state(struct ancillary_state *silly)
68 {
69         asm volatile("fxsave %0" : : "m"(*silly));
70 }
71
72 static inline void restore_fp_state(struct ancillary_state *silly)
73 {
74         asm volatile("fxrstor %0" : : "m"(*silly));
75 }
76
77 __END_DECLS
78
79 #endif /* PARLIB_ARCH_H */