Merge branch 'master' into proc-work
[akaros.git] / kern / src / testing.c
1 #ifdef __DEPUTY__
2 #pragma nodeputy
3 #endif
4
5 #include <arch/mmu.h>
6 #include <arch/arch.h>
7 #include <smp.h>
8
9 #include <ros/memlayout.h>
10
11 #include <atomic.h>
12 #include <stdio.h>
13 #include <assert.h>
14 #include <string.h>
15 #include <testing.h>
16 #include <trap.h>
17 #include <process.h>
18 #include <syscall.h>
19
20 #define test_vector 0xeb
21
22 #ifdef __i386__
23
24 void test_ipi_sending(void)
25 {
26         extern handler_t interrupt_handlers[];
27         int8_t state = 0;
28
29         register_interrupt_handler(interrupt_handlers, test_vector,
30                                    test_hello_world_handler, 0);
31         enable_irqsave(&state);
32         cprintf("\nCORE 0 sending broadcast\n");
33         send_broadcast_ipi(test_vector);
34         udelay(3000000);
35         cprintf("\nCORE 0 sending all others\n");
36         send_all_others_ipi(test_vector);
37         udelay(3000000);
38         cprintf("\nCORE 0 sending self\n");
39         send_self_ipi(test_vector);
40         udelay(3000000);
41         cprintf("\nCORE 0 sending ipi to physical 1\n");
42         send_ipi(0x01, 0, test_vector);
43         udelay(3000000);
44         cprintf("\nCORE 0 sending ipi to physical 2\n");
45         send_ipi(0x02, 0, test_vector);
46         udelay(3000000);
47         cprintf("\nCORE 0 sending ipi to physical 3\n");
48         send_ipi(0x03, 0, test_vector);
49         udelay(3000000);
50         cprintf("\nCORE 0 sending ipi to physical 15\n");
51         send_ipi(0x0f, 0, test_vector);
52         udelay(3000000);
53         cprintf("\nCORE 0 sending ipi to logical 2\n");
54         send_ipi(0x02, 1, test_vector);
55         udelay(3000000);
56         cprintf("\nCORE 0 sending ipi to logical 1\n");
57         send_ipi(0x01, 1, test_vector);
58         udelay(3000000);
59         cprintf("\nDone!\n");
60         disable_irqsave(&state);
61 }
62
63 // Note this never returns and will muck with any other timer work
64 void test_pic_reception(void)
65 {
66         register_interrupt_handler(interrupt_handlers, 0x20, test_hello_world_handler, 0);
67         pit_set_timer(100,TIMER_RATEGEN); // totally arbitrary time
68         pic_unmask_irq(0);
69         cprintf("PIC1 Mask = 0x%04x\n", inb(PIC1_DATA));
70         cprintf("PIC2 Mask = 0x%04x\n", inb(PIC2_DATA));
71         unmask_lapic_lvt(LAPIC_LVT_LINT0);
72         cprintf("Core %d's LINT0: 0x%08x\n", core_id(), read_mmreg32(LAPIC_LVT_LINT0));
73         enable_irq();
74         while(1);
75 }
76
77 #endif
78
79 void test_print_info(void)
80 {
81         cprintf("\nCORE 0 asking all cores to print info:\n");
82         smp_call_function_all(test_print_info_handler, 0, 0);
83         cprintf("\nDone!\n");
84 }
85
86
87 extern uint8_t num_cpus;
88 barrier_t test_cpu_array;
89
90 void test_barrier(void)
91 {
92         cprintf("Core 0 initializing barrier\n");
93         init_barrier(&test_cpu_array, num_cpus);
94         cprintf("Core 0 asking all cores to print ids, barrier, rinse, repeat\n");
95         smp_call_function_all(test_barrier_handler, 0, 0);
96 }
97
98 void test_interrupts_irqsave(void)
99 {
100         int8_t state = 0;
101         printd("Testing Nesting Enabling first, turning ints off:\n");
102         disable_irq();
103         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
104         assert(!irq_is_enabled());
105         printd("Enabling IRQSave\n");
106         enable_irqsave(&state);
107         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
108         assert(irq_is_enabled());
109         printd("Enabling IRQSave Again\n");
110         enable_irqsave(&state);
111         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
112         assert(irq_is_enabled());
113         printd("Disabling IRQSave Once\n");
114         disable_irqsave(&state);
115         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
116         assert(irq_is_enabled());
117         printd("Disabling IRQSave Again\n");
118         disable_irqsave(&state);
119         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
120         assert(!irq_is_enabled());
121         printd("Done.  Should have been 0, 200, 200, 200, 0\n");
122
123         printd("Testing Nesting Disabling first, turning ints on:\n");
124         state = 0;
125         enable_irq();
126         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
127         assert(irq_is_enabled());
128         printd("Disabling IRQSave Once\n");
129         disable_irqsave(&state);
130         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
131         assert(!irq_is_enabled());
132         printd("Disabling IRQSave Again\n");
133         disable_irqsave(&state);
134         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
135         assert(!irq_is_enabled());
136         printd("Enabling IRQSave Once\n");
137         enable_irqsave(&state);
138         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
139         assert(!irq_is_enabled());
140         printd("Enabling IRQSave Again\n");
141         enable_irqsave(&state);
142         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
143         assert(irq_is_enabled());
144         printd("Done.  Should have been 200, 0, 0, 0, 200 \n");
145
146         state = 0;
147         disable_irq();
148         printd("Ints are off, enabling then disabling.\n");
149         enable_irqsave(&state);
150         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
151         assert(irq_is_enabled());
152         disable_irqsave(&state);
153         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
154         assert(!irq_is_enabled());
155         printd("Done.  Should have been 200, 0\n");
156
157         state = 0;
158         enable_irq();
159         printd("Ints are on, enabling then disabling.\n");
160         enable_irqsave(&state);
161         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
162         assert(irq_is_enabled());
163         disable_irqsave(&state);
164         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
165         assert(irq_is_enabled());
166         printd("Done.  Should have been 200, 200\n");
167
168         state = 0;
169         disable_irq();
170         printd("Ints are off, disabling then enabling.\n");
171         disable_irqsave(&state);
172         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
173         assert(!irq_is_enabled());
174         enable_irqsave(&state);
175         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
176         assert(!irq_is_enabled());
177         printd("Done.  Should have been 0, 0\n");
178
179         state = 0;
180         enable_irq();
181         printd("Ints are on, disabling then enabling.\n");
182         disable_irqsave(&state);
183         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
184         assert(!irq_is_enabled());
185         enable_irqsave(&state);
186         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
187         assert(irq_is_enabled());
188         printd("Done.  Should have been 0, 200\n");
189
190         disable_irq();
191         cprintf("Passed enable_irqsave tests\n");
192 }
193
194 void test_bitmasks(void)
195 {
196 #define masksize 67
197         DECL_BITMASK(mask, masksize);
198         printk("size of mask %d\n", sizeof(mask));
199         CLR_BITMASK(mask, masksize);
200         PRINT_BITMASK(mask, masksize);
201         printk("cleared\n");
202         SET_BITMASK_BIT(mask, 0);
203         SET_BITMASK_BIT(mask, 11);
204         SET_BITMASK_BIT(mask, 17);
205         SET_BITMASK_BIT(mask, masksize-1);
206         printk("bits set\n");
207         PRINT_BITMASK(mask, masksize);
208         DECL_BITMASK(mask2, masksize);
209         COPY_BITMASK(mask2, mask, masksize);
210         printk("copy of original mask, should be the same as the prev\n");
211         PRINT_BITMASK(mask2, masksize);
212         CLR_BITMASK_BIT(mask, 11);
213         printk("11 cleared\n");
214         PRINT_BITMASK(mask, masksize);
215         printk("bit 17 is %d (should be 1)\n", GET_BITMASK_BIT(mask, 17));
216         printk("bit 11 is %d (should be 0)\n", GET_BITMASK_BIT(mask, 11));
217         FILL_BITMASK(mask, masksize);
218         PRINT_BITMASK(mask, masksize);
219         printk("should be all 1's, except for a few at the end\n");
220         printk("Is Clear?: %d (should be 0)\n", BITMASK_IS_CLEAR(mask,masksize));
221         CLR_BITMASK(mask, masksize);
222         PRINT_BITMASK(mask, masksize);
223         printk("Is Clear?: %d (should be 1)\n", BITMASK_IS_CLEAR(mask,masksize));
224         printk("should be cleared\n");
225 }
226
227 checklist_t* the_global_list;
228
229 void test_checklist_handler(trapframe_t *tf, void* data)
230 {
231         udelay(1000000);
232         cprintf("down_checklist(%x,%d)\n", the_global_list, core_id());
233         down_checklist(the_global_list);
234 }
235
236 extern uint8_t num_cpus;
237
238 void test_checklists(void)
239 {
240         INIT_CHECKLIST(a_list, MAX_NUM_CPUS);
241         the_global_list = &a_list;
242         printk("Checklist Build, mask size: %d\n", sizeof(a_list.mask.bits));
243         printk("mask\n");
244         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
245         SET_BITMASK_BIT(a_list.mask.bits, 11);
246         printk("Set bit 11\n");
247         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
248
249         CLR_BITMASK(a_list.mask.bits, a_list.mask.size);
250         INIT_CHECKLIST_MASK(a_mask, MAX_NUM_CPUS);
251         FILL_BITMASK(a_mask.bits, num_cpus);
252         //CLR_BITMASK_BIT(a_mask.bits, core_id());
253         //SET_BITMASK_BIT(a_mask.bits, 1);
254         //printk("New mask (1, 17, 25):\n");
255         printk("Created new mask, filled up to num_cpus\n");
256         PRINT_BITMASK(a_mask.bits, a_mask.size);
257         printk("committing new mask\n");
258         commit_checklist_wait(&a_list, &a_mask);
259         printk("Old mask (copied onto):\n");
260         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
261         //smp_call_function_single(1, test_checklist_handler, 0, 0);
262
263         smp_call_function_all(test_checklist_handler, 0, 0);
264
265         printk("Waiting on checklist\n");
266         waiton_checklist(&a_list);
267         printk("Done Waiting!\n");
268
269 }
270
271 atomic_t a = atomic_init(0), b = atomic_init(0), c = atomic_init(0);
272
273 void test_incrementer_handler(trapframe_t *tf, void* data)
274 {
275         assert(data);
276         atomic_inc((atomic_t*)data);
277 }
278
279 void test_null_handler(trapframe_t *tf, void* data)
280 {
281         asm volatile("nop");
282 }
283
284 void test_smp_call_functions(void)
285 {
286         int i;
287         handler_wrapper_t *waiter0 = 0, *waiter1 = 0, *waiter2 = 0, *waiter3 = 0,
288                           *waiter4 = 0, *waiter5 = 0;
289         uint8_t me = core_id();
290         printk("\nCore %d: SMP Call Self (nowait):\n", me);
291         printk("---------------------\n");
292         smp_call_function_self(test_hello_world_handler, 0, 0);
293         printk("\nCore %d: SMP Call Self (wait):\n", me);
294         printk("---------------------\n");
295         smp_call_function_self(test_hello_world_handler, 0, &waiter0);
296         smp_call_wait(waiter0);
297         printk("\nCore %d: SMP Call All (nowait):\n", me);
298         printk("---------------------\n");
299         smp_call_function_all(test_hello_world_handler, 0, 0);
300         printk("\nCore %d: SMP Call All (wait):\n", me);
301         printk("---------------------\n");
302         smp_call_function_all(test_hello_world_handler, 0, &waiter0);
303         smp_call_wait(waiter0);
304         printk("\nCore %d: SMP Call All-Else Individually, in order (nowait):\n", me);
305         printk("---------------------\n");
306         for(i = 1; i < num_cpus; i++)
307                 smp_call_function_single(i, test_hello_world_handler, 0, 0);
308         printk("\nCore %d: SMP Call Self (wait):\n", me);
309         printk("---------------------\n");
310         smp_call_function_self(test_hello_world_handler, 0, &waiter0);
311         smp_call_wait(waiter0);
312         printk("\nCore %d: SMP Call All-Else Individually, in order (wait):\n", me);
313         printk("---------------------\n");
314         for(i = 1; i < num_cpus; i++)
315         {
316                 smp_call_function_single(i, test_hello_world_handler, 0, &waiter0);
317                 smp_call_wait(waiter0);
318         }
319         printk("\nTesting to see if any IPI-functions are dropped when not waiting:\n");
320         printk("A: %d, B: %d, C: %d (should be 0,0,0)\n", atomic_read(&a), atomic_read(&b), atomic_read(&c));
321         smp_call_function_all(test_incrementer_handler, &a, 0);
322         smp_call_function_all(test_incrementer_handler, &b, 0);
323         smp_call_function_all(test_incrementer_handler, &c, 0);
324         // if i can clobber a previous IPI, the interleaving might do it
325         smp_call_function_single(1 % num_cpus, test_incrementer_handler, &a, 0);
326         smp_call_function_single(2 % num_cpus, test_incrementer_handler, &b, 0);
327         smp_call_function_single(3 % num_cpus, test_incrementer_handler, &c, 0);
328         smp_call_function_single(4 % num_cpus, test_incrementer_handler, &a, 0);
329         smp_call_function_single(5 % num_cpus, test_incrementer_handler, &b, 0);
330         smp_call_function_single(6 % num_cpus, test_incrementer_handler, &c, 0);
331         smp_call_function_all(test_incrementer_handler, &a, 0);
332         smp_call_function_single(3 % num_cpus, test_incrementer_handler, &c, 0);
333         smp_call_function_all(test_incrementer_handler, &b, 0);
334         smp_call_function_single(1 % num_cpus, test_incrementer_handler, &a, 0);
335         smp_call_function_all(test_incrementer_handler, &c, 0);
336         smp_call_function_single(2 % num_cpus, test_incrementer_handler, &b, 0);
337         // wait, so we're sure the others finish before printing.
338         // without this, we could (and did) get 19,18,19, since the B_inc
339         // handler didn't finish yet
340         smp_call_function_self(test_null_handler, 0, &waiter0);
341         // need to grab all 5 handlers (max), since the code moves to the next free.
342         smp_call_function_self(test_null_handler, 0, &waiter1);
343         smp_call_function_self(test_null_handler, 0, &waiter2);
344         smp_call_function_self(test_null_handler, 0, &waiter3);
345         smp_call_function_self(test_null_handler, 0, &waiter4);
346         smp_call_wait(waiter0);
347         smp_call_wait(waiter1);
348         smp_call_wait(waiter2);
349         smp_call_wait(waiter3);
350         smp_call_wait(waiter4);
351         printk("A: %d, B: %d, C: %d (should be 19,19,19)\n", atomic_read(&a), atomic_read(&b), atomic_read(&c));
352         printk("Attempting to deadlock by smp_calling with an outstanding wait:\n");
353         smp_call_function_self(test_null_handler, 0, &waiter0);
354         printk("Sent one\n");
355         smp_call_function_self(test_null_handler, 0, &waiter1);
356         printk("Sent two\n");
357         smp_call_wait(waiter0);
358         printk("Wait one\n");
359         smp_call_wait(waiter1);
360         printk("Wait two\n");
361         printk("\tMade it through!\n");
362         printk("Attempting to deadlock by smp_calling more than are available:\n");
363         printk("\tShould see an Insufficient message and a kernel warning.\n");
364         if (smp_call_function_self(test_null_handler, 0, &waiter0))
365                 printk("\tInsufficient handlers to call function (0)\n");
366         if (smp_call_function_self(test_null_handler, 0, &waiter1))
367                 printk("\tInsufficient handlers to call function (1)\n");
368         if (smp_call_function_self(test_null_handler, 0, &waiter2))
369                 printk("\tInsufficient handlers to call function (2)\n");
370         if (smp_call_function_self(test_null_handler, 0, &waiter3))
371                 printk("\tInsufficient handlers to call function (3)\n");
372         if (smp_call_function_self(test_null_handler, 0, &waiter4))
373                 printk("\tInsufficient handlers to call function (4)\n");
374         if (smp_call_function_self(test_null_handler, 0, &waiter5))
375                 printk("\tInsufficient handlers to call function (5)\n");
376         smp_call_wait(waiter0);
377         smp_call_wait(waiter1);
378         smp_call_wait(waiter2);
379         smp_call_wait(waiter3);
380         smp_call_wait(waiter4);
381         smp_call_wait(waiter5);
382         printk("\tMade it through!\n");
383
384         printk("Done\n");
385 }
386
387 #ifdef __i386__
388 void test_lapic_status_bit(void)
389 {
390         register_interrupt_handler(interrupt_handlers, test_vector,
391                                    test_incrementer_handler, &a);
392         #define NUM_IPI 100000
393         atomic_set(&a,0);
394         printk("IPIs received (should be 0): %d\n", a);
395         for(int i = 0; i < NUM_IPI; i++) {
396                 send_ipi(7, 0, test_vector);
397                 lapic_wait_to_send();
398         }
399         // need to wait a bit to let those IPIs get there
400         udelay(5000000);
401         printk("IPIs received (should be %d): %d\n", a, NUM_IPI);
402         // hopefully that handler never fires again.  leaving it registered for now.
403 }
404 #endif
405
406 /******************************************************************************/
407 /*            Test Measurements: Couples with measurement.c                   */
408 // All user processes can R/W the UGDATA page
409 barrier_t* bar = (barrier_t*)UGDATA;
410 uint32_t* job_to_run = (uint32_t*)(UGDATA + sizeof(barrier_t));
411 env_t* env_batch[64]; // Fairly arbitrary, just the max I plan to use.
412
413 /* Helpers for test_run_measurements */
414 static void wait_for_all_envs_to_die(void)
415 {
416         while (atomic_read(&num_envs))
417                 cpu_relax();
418 }
419
420 // this never returns.
421 static void sync_tests(int start_core, int num_threads, int job_num)
422 {
423         assert(start_core + num_threads <= num_cpus);
424         wait_for_all_envs_to_die();
425         for (int i = start_core; i < start_core + num_threads; i++)
426                 env_batch[i] = ENV_CREATE(roslib_measurements);
427         init_barrier(bar, num_threads);
428         *job_to_run = job_num;
429         for (int i = start_core; i < start_core + num_threads; i++)
430                 smp_call_function_single(i, run_env_handler, env_batch[i], 0);
431         process_workqueue();
432         // we want to fake a run, to reenter manager for the next case
433         env_t *env = ENV_CREATE(roslib_null);
434         smp_call_function_single(0, run_env_handler, env, 0);
435         process_workqueue();
436         panic("whoops!\n");
437 }
438
439 static void async_tests(int start_core, int num_threads, int job_num)
440 {
441         int count;
442
443         assert(start_core + num_threads <= num_cpus);
444         wait_for_all_envs_to_die();
445         for (int i = start_core; i < start_core + num_threads; i++)
446                 env_batch[i] = ENV_CREATE(roslib_measurements);
447         init_barrier(bar, num_threads);
448         *job_to_run = job_num;
449         for (int i = start_core; i < start_core + num_threads; i++)
450                 smp_call_function_single(i, run_env_handler, env_batch[i], 0);
451         count = 0;
452         while (count > -num_threads) {
453                 count = 0;
454                 for (int i = start_core; i < start_core + num_threads; i++) {
455                         count += process_generic_syscalls(env_batch[i], 1);
456                 }
457                 cpu_relax();
458         }
459         // we want to fake a run, to reenter manager for the next case
460         env_t *env = ENV_CREATE(roslib_null);
461         smp_call_function_single(0, run_env_handler, env, 0);
462         process_workqueue();
463         // this all never returns
464         panic("whoops!\n");
465 }
466
467 void test_run_measurements(uint32_t job_num)
468 {
469         switch (job_num) {
470                 case 0: // Nulls
471                         printk("Case 0:\n");
472                         async_tests(2, 1, job_num);  // start core 2, 1 core total
473                         break;
474                 case 1: // Sync
475                         printk("Case 1:\n");
476                         sync_tests(2, 1, job_num);
477                         break;
478                 case 2:
479                         printk("Case 2:\n");
480                         sync_tests(2, 2, job_num);
481                         break;
482                 case 3:
483                         printk("Case 3:\n");
484                         sync_tests(0, 3, job_num);
485                         break;
486                 case 4:
487                         printk("Case 4:\n");
488                         sync_tests(0, 4, job_num);
489                         break;
490                 case 5:
491                         printk("Case 5:\n");
492                         sync_tests(0, 5, job_num);
493                         break;
494                 case 6:
495                         printk("Case 6:\n");
496                         sync_tests(0, 6, job_num);
497                         break;
498                 case 7:
499                         printk("Case 7:\n");
500                         sync_tests(0, 7, job_num);
501                         break;
502                 case 8:
503                         printk("Case 8:\n");
504                         sync_tests(0, 8, job_num);
505                         break;
506                 case 9:
507                         printk("Case 9:\n");
508                         async_tests(2, 1, job_num);
509                         break;
510                 case 10:
511                         printk("Case 10:\n");
512                         async_tests(2, 2, job_num);
513                         break;
514                 case 11:
515                         printk("Case 11:\n");
516                         async_tests(2, 3, job_num);
517                         break;
518                 case 12:
519                         printk("Case 12:\n");
520                         async_tests(2, 4, job_num);
521                         break;
522                 case 13:
523                         printk("Case 13:\n");
524                         async_tests(2, 5, job_num);
525                         break;
526                 case 14:
527                         printk("Case 14:\n");
528                         async_tests(2, 6, job_num);
529                         break;
530                 default:
531                         warn("Invalid test number!!");
532         }
533         panic("Error in test setup!!");
534 }
535
536 /************************************************************/
537 /* ISR Handler Functions */
538
539 void test_hello_world_handler(trapframe_t *tf, void* data)
540 {
541         int trapno;
542         #if defined(__i386__)
543         trapno = tf->tf_trapno;
544         #elif defined(__sparc_v8__)
545         trapno = (tf->tbr >> 4) & 0xFF;
546         #else
547         trapno = 0;
548         #endif
549
550         cprintf("Incoming IRQ, ISR: %d on core %d with tf at 0x%08x\n",
551                 trapno, core_id(), tf);
552 }
553
554 uint32_t print_info_lock = 0;
555
556 void test_print_info_handler(trapframe_t *tf, void* data)
557 {
558         spin_lock_irqsave(&print_info_lock);
559         cprintf("----------------------------\n");
560         cprintf("This is Core %d\n", core_id());
561 #ifdef __i386__
562         cprintf("MTRR_DEF_TYPE = 0x%08x\n", read_msr(IA32_MTRR_DEF_TYPE));
563         cprintf("MTRR Phys0 Base = 0x%016llx, Mask = 0x%016llx\n",
564                 read_msr(0x200), read_msr(0x201));
565         cprintf("MTRR Phys1 Base = 0x%016llx, Mask = 0x%016llx\n",
566                 read_msr(0x202), read_msr(0x203));
567         cprintf("MTRR Phys2 Base = 0x%016llx, Mask = 0x%016llx\n",
568                 read_msr(0x204), read_msr(0x205));
569         cprintf("MTRR Phys3 Base = 0x%016llx, Mask = 0x%016llx\n",
570                 read_msr(0x206), read_msr(0x207));
571         cprintf("MTRR Phys4 Base = 0x%016llx, Mask = 0x%016llx\n",
572                 read_msr(0x208), read_msr(0x209));
573         cprintf("MTRR Phys5 Base = 0x%016llx, Mask = 0x%016llx\n",
574                 read_msr(0x20a), read_msr(0x20b));
575         cprintf("MTRR Phys6 Base = 0x%016llx, Mask = 0x%016llx\n",
576                 read_msr(0x20c), read_msr(0x20d));
577         cprintf("MTRR Phys7 Base = 0x%016llx, Mask = 0x%016llx\n",
578                 read_msr(0x20e), read_msr(0x20f));
579 #endif
580         cprintf("----------------------------\n");
581         spin_unlock_irqsave(&print_info_lock);
582 }
583
584 void test_barrier_handler(trapframe_t *tf, void* data)
585 {
586         cprintf("Round 1: Core %d\n", core_id());
587         waiton_barrier(&test_cpu_array);
588         waiton_barrier(&test_cpu_array);
589         waiton_barrier(&test_cpu_array);
590         waiton_barrier(&test_cpu_array);
591         waiton_barrier(&test_cpu_array);
592         waiton_barrier(&test_cpu_array);
593         cprintf("Round 2: Core %d\n", core_id());
594         waiton_barrier(&test_cpu_array);
595         cprintf("Round 3: Core %d\n", core_id());
596         // uncomment to see it fucked up
597         //cprintf("Round 4: Core %d\n", core_id());
598 }
599
600 static void test_waiting_handler(trapframe_t *tf, void* data)
601 {
602         {HANDLER_ATOMIC atomic_dec((atomic_t*)data);}
603 }
604
605 #ifdef __i386__
606 void test_pit(void)
607 {
608         cprintf("Starting test for PIT now (10s)\n");
609         udelay_pit(10000000);
610         cprintf("End now\n");
611         cprintf("Starting test for TSC (if stable) now (10s)\n");
612         udelay(10000000);
613         cprintf("End now\n");
614
615         cprintf("Starting test for LAPIC (if stable) now (10s)\n");
616         enable_irq();
617         lapic_set_timer(10000000, FALSE);
618
619         atomic_t waiting = atomic_init(1);
620         register_interrupt_handler(interrupt_handlers, test_vector,
621                                    test_waiting_handler, &waiting);
622         while(atomic_read(&waiting))
623                 cpu_relax();
624         cprintf("End now\n");
625 }
626 #endif