Workqueue interface and coreid()
[akaros.git] / kern / src / testing.c
1 #ifdef __DEPUTY__
2 #pragma nodeputy
3 #endif
4
5 #include <arch/mmu.h>
6 #include <arch/x86.h>
7 #include <arch/smp.h>
8 #include <arch/apic.h>
9
10 #include <ros/memlayout.h>
11
12 #include <atomic.h>
13 #include <stdio.h>
14 #include <assert.h>
15 #include <string.h>
16 #include <testing.h>
17 #include <trap.h>
18 #include <process.h>
19 #include <syscall.h>
20
21 #define test_vector 0xeb
22
23 void test_ipi_sending(void)
24 {
25         extern handler_t interrupt_handlers[];
26         int8_t state = 0;
27
28         register_interrupt_handler(interrupt_handlers, test_vector,
29                                    test_hello_world_handler, 0);
30         enable_irqsave(&state);
31         cprintf("\nCORE 0 sending broadcast\n");
32         send_broadcast_ipi(test_vector);
33         udelay(3000000);
34         cprintf("\nCORE 0 sending all others\n");
35         send_all_others_ipi(test_vector);
36         udelay(3000000);
37         cprintf("\nCORE 0 sending self\n");
38         send_self_ipi(test_vector);
39         udelay(3000000);
40         cprintf("\nCORE 0 sending ipi to physical 1\n");
41         send_ipi(0x01, 0, test_vector);
42         udelay(3000000);
43         cprintf("\nCORE 0 sending ipi to physical 2\n");
44         send_ipi(0x02, 0, test_vector);
45         udelay(3000000);
46         cprintf("\nCORE 0 sending ipi to physical 3\n");
47         send_ipi(0x03, 0, test_vector);
48         udelay(3000000);
49         cprintf("\nCORE 0 sending ipi to physical 15\n");
50         send_ipi(0x0f, 0, test_vector);
51         udelay(3000000);
52         cprintf("\nCORE 0 sending ipi to logical 2\n");
53         send_ipi(0x02, 1, test_vector);
54         udelay(3000000);
55         cprintf("\nCORE 0 sending ipi to logical 1\n");
56         send_ipi(0x01, 1, test_vector);
57         udelay(3000000);
58         cprintf("\nDone!\n");
59         disable_irqsave(&state);
60 }
61
62 // Note this never returns and will muck with any other timer work
63 void test_pic_reception(void)
64 {
65         register_interrupt_handler(interrupt_handlers, 0x20, test_hello_world_handler, 0);
66         pit_set_timer(100,TIMER_RATEGEN); // totally arbitrary time
67         pic_unmask_irq(0);
68         cprintf("PIC1 Mask = 0x%04x\n", inb(PIC1_DATA));
69         cprintf("PIC2 Mask = 0x%04x\n", inb(PIC2_DATA));
70         unmask_lapic_lvt(LAPIC_LVT_LINT0);
71         cprintf("Core %d's LINT0: 0x%08x\n", coreid(), read_mmreg32(LAPIC_LVT_LINT0));
72         enable_irq();
73         while(1);
74 }
75
76 void test_print_info(void)
77 {
78         cprintf("\nCORE 0 asking all cores to print info:\n");
79         smp_call_function_all(test_print_info_handler, 0, 0);
80         cprintf("\nDone!\n");
81 }
82
83
84 extern uint8_t num_cpus;
85 barrier_t test_cpu_array;
86
87 void test_barrier(void)
88 {
89         cprintf("Core 0 initializing barrier\n");
90         init_barrier(&test_cpu_array, num_cpus);
91         cprintf("Core 0 asking all cores to print ids, barrier, rinse, repeat\n");
92         smp_call_function_all(test_barrier_handler, 0, 0);
93 }
94
95 void test_interrupts_irqsave(void)
96 {
97         int8_t state = 0;
98         printd("Testing Nesting Enabling first, turning ints off:\n");
99         disable_irq();
100         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
101         assert((read_eflags() & FL_IF) == 0);
102         printd("Enabling IRQSave\n");
103         enable_irqsave(&state);
104         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
105         assert((read_eflags() & FL_IF) == 0x200);
106         printd("Enabling IRQSave Again\n");
107         enable_irqsave(&state);
108         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
109         assert((read_eflags() & FL_IF) == 0x200);
110         printd("Disabling IRQSave Once\n");
111         disable_irqsave(&state);
112         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
113         assert((read_eflags() & FL_IF) == 0x200);
114         printd("Disabling IRQSave Again\n");
115         disable_irqsave(&state);
116         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
117         assert((read_eflags() & FL_IF) == 0);
118         printd("Done.  Should have been 0, 200, 200, 200, 0\n");
119
120         printd("Testing Nesting Disabling first, turning ints on:\n");
121         state = 0;
122         enable_irq();
123         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
124         assert((read_eflags() & FL_IF) == 0x200);
125         printd("Disabling IRQSave Once\n");
126         disable_irqsave(&state);
127         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
128         assert((read_eflags() & FL_IF) == 0);
129         printd("Disabling IRQSave Again\n");
130         disable_irqsave(&state);
131         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
132         assert((read_eflags() & FL_IF) == 0);
133         printd("Enabling IRQSave Once\n");
134         enable_irqsave(&state);
135         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
136         assert((read_eflags() & FL_IF) == 0);
137         printd("Enabling IRQSave Again\n");
138         enable_irqsave(&state);
139         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
140         assert((read_eflags() & FL_IF) == 0x200);
141         printd("Done.  Should have been 200, 0, 0, 0, 200 \n");
142
143         state = 0;
144         disable_irq();
145         printd("Ints are off, enabling then disabling.\n");
146         enable_irqsave(&state);
147         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
148         assert((read_eflags() & FL_IF) == 0x200);
149         disable_irqsave(&state);
150         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
151         assert((read_eflags() & FL_IF) == 0);
152         printd("Done.  Should have been 200, 0\n");
153
154         state = 0;
155         enable_irq();
156         printd("Ints are on, enabling then disabling.\n");
157         enable_irqsave(&state);
158         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
159         assert((read_eflags() & FL_IF) == 0x200);
160         disable_irqsave(&state);
161         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
162         assert((read_eflags() & FL_IF) == 0x200);
163         printd("Done.  Should have been 200, 200\n");
164
165         state = 0;
166         disable_irq();
167         printd("Ints are off, disabling then enabling.\n");
168         disable_irqsave(&state);
169         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
170         assert((read_eflags() & FL_IF) == 0);
171         enable_irqsave(&state);
172         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
173         assert((read_eflags() & FL_IF) == 0);
174         printd("Done.  Should have been 0, 0\n");
175
176         state = 0;
177         enable_irq();
178         printd("Ints are on, disabling then enabling.\n");
179         disable_irqsave(&state);
180         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
181         assert((read_eflags() & FL_IF) == 0);
182         enable_irqsave(&state);
183         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
184         assert((read_eflags() & FL_IF) == 0x200);
185         printd("Done.  Should have been 0, 200\n");
186
187         disable_irq();
188         cprintf("Passed enable_irqsave tests\n");
189 }
190
191 void test_bitmasks(void)
192 {
193 #define masksize 67
194         DECL_BITMASK(mask, masksize);
195         printk("size of mask %d\n", sizeof(mask));
196         CLR_BITMASK(mask, masksize);
197         PRINT_BITMASK(mask, masksize);
198         printk("cleared\n");
199         SET_BITMASK_BIT(mask, 0);
200         SET_BITMASK_BIT(mask, 11);
201         SET_BITMASK_BIT(mask, 17);
202         SET_BITMASK_BIT(mask, masksize-1);
203         printk("bits set\n");
204         PRINT_BITMASK(mask, masksize);
205         DECL_BITMASK(mask2, masksize);
206         COPY_BITMASK(mask2, mask, masksize);
207         printk("copy of original mask, should be the same as the prev\n");
208         PRINT_BITMASK(mask2, masksize);
209         CLR_BITMASK_BIT(mask, 11);
210         printk("11 cleared\n");
211         PRINT_BITMASK(mask, masksize);
212         printk("bit 17 is %d (should be 1)\n", GET_BITMASK_BIT(mask, 17));
213         printk("bit 11 is %d (should be 0)\n", GET_BITMASK_BIT(mask, 11));
214         FILL_BITMASK(mask, masksize);
215         PRINT_BITMASK(mask, masksize);
216         printk("should be all 1's, except for a few at the end\n");
217         printk("Is Clear?: %d (should be 0)\n", BITMASK_IS_CLEAR(mask,masksize));
218         CLR_BITMASK(mask, masksize);
219         PRINT_BITMASK(mask, masksize);
220         printk("Is Clear?: %d (should be 1)\n", BITMASK_IS_CLEAR(mask,masksize));
221         printk("should be cleared\n");
222 }
223
224 checklist_t* the_global_list;
225
226 void test_checklist_handler(trapframe_t *tf, void* data)
227 {
228         udelay(1000000);
229         down_checklist(the_global_list);
230 }
231
232 extern uint8_t num_cpus;
233
234 void test_checklists(void)
235 {
236         INIT_CHECKLIST(a_list, MAX_NUM_CPUS);
237         the_global_list = &a_list;
238         printk("Checklist Build, mask size: %d\n", sizeof(a_list.mask.bits));
239         printk("mask\n");
240         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
241         SET_BITMASK_BIT(a_list.mask.bits, 11);
242         printk("Set bit 11\n");
243         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
244
245         CLR_BITMASK(a_list.mask.bits, a_list.mask.size);
246         INIT_CHECKLIST_MASK(a_mask, MAX_NUM_CPUS);
247         FILL_BITMASK(a_mask.bits, num_cpus);
248         //CLR_BITMASK_BIT(a_mask.bits, coreid());
249         //SET_BITMASK_BIT(a_mask.bits, 1);
250         //printk("New mask (1, 17, 25):\n");
251         printk("Created new mask, filled up to num_cpus\n");
252         PRINT_BITMASK(a_mask.bits, a_mask.size);
253         printk("committing new mask\n");
254         commit_checklist_wait(&a_list, &a_mask);
255         printk("Old mask (copied onto):\n");
256         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
257         //smp_call_function_single(1, test_checklist_handler, 0, 0);
258         smp_call_function_all(test_checklist_handler, 0, 0);
259
260         printk("Waiting on checklist\n");
261         waiton_checklist(&a_list);
262         printk("Done Waiting!\n");
263
264 }
265
266 uint32_t a = 0, b = 0, c = 0;
267
268 void test_incrementer_handler(struct Trapframe *tf, void* data)
269 {
270         assert(data);
271         atomic_inc((uint32_t*)data);
272 }
273
274 void test_null_handler(struct Trapframe *tf, void* data)
275 {
276         asm volatile("nop");
277 }
278
279 void test_smp_call_functions(void)
280 {
281         handler_wrapper_t *waiter0 = 0, *waiter1 = 0, *waiter2 = 0, *waiter3 = 0,
282                           *waiter4 = 0, *waiter5 = 0;
283         uint8_t me = coreid();
284         printk("\nCore %d: SMP Call Self (nowait):\n", me);
285         printk("---------------------\n");
286         smp_call_function_self(test_hello_world_handler, 0, 0);
287         printk("\nCore %d: SMP Call Self (wait):\n", me);
288         printk("---------------------\n");
289         smp_call_function_self(test_hello_world_handler, 0, &waiter0);
290         smp_call_wait(waiter0);
291         printk("\nCore %d: SMP Call All (nowait):\n", me);
292         printk("---------------------\n");
293         smp_call_function_all(test_hello_world_handler, 0, 0);
294         printk("\nCore %d: SMP Call All (wait):\n", me);
295         printk("---------------------\n");
296         smp_call_function_all(test_hello_world_handler, 0, &waiter0);
297         smp_call_wait(waiter0);
298         printk("\nCore %d: SMP Call All-Else Individually, in order (nowait):\n", me);
299         printk("---------------------\n");
300         smp_call_function_single(1, test_hello_world_handler, 0, 0);
301         smp_call_function_single(2, test_hello_world_handler, 0, 0);
302         smp_call_function_single(3, test_hello_world_handler, 0, 0);
303         smp_call_function_single(4, test_hello_world_handler, 0, 0);
304         smp_call_function_single(5, test_hello_world_handler, 0, 0);
305         smp_call_function_single(6, test_hello_world_handler, 0, 0);
306         smp_call_function_single(7, test_hello_world_handler, 0, 0);
307         printk("\nCore %d: SMP Call Self (wait):\n", me);
308         printk("---------------------\n");
309         smp_call_function_self(test_hello_world_handler, 0, &waiter0);
310         smp_call_wait(waiter0);
311         printk("\nCore %d: SMP Call All-Else Individually, in order (wait):\n", me);
312         printk("---------------------\n");
313         smp_call_function_single(1, test_hello_world_handler, 0, &waiter0);
314         smp_call_wait(waiter0);
315         smp_call_function_single(2, test_hello_world_handler, 0, &waiter0);
316         smp_call_wait(waiter0);
317         smp_call_function_single(3, test_hello_world_handler, 0, &waiter0);
318         smp_call_wait(waiter0);
319         smp_call_function_single(4, test_hello_world_handler, 0, &waiter0);
320         smp_call_wait(waiter0);
321         smp_call_function_single(5, test_hello_world_handler, 0, &waiter0);
322         smp_call_wait(waiter0);
323         smp_call_function_single(6, test_hello_world_handler, 0, &waiter0);
324         smp_call_wait(waiter0);
325         smp_call_function_single(7, test_hello_world_handler, 0, &waiter0);
326         smp_call_wait(waiter0);
327         printk("\nTesting to see if any IPI-functions are dropped when not waiting:\n");
328         printk("A: %d, B: %d, C: %d (should be 0,0,0)\n", a, b, c);
329         smp_call_function_all(test_incrementer_handler, &a, 0);
330         smp_call_function_all(test_incrementer_handler, &b, 0);
331         smp_call_function_all(test_incrementer_handler, &c, 0);
332         // if i can clobber a previous IPI, the interleaving might do it
333         smp_call_function_single(1, test_incrementer_handler, &a, 0);
334         smp_call_function_single(2, test_incrementer_handler, &b, 0);
335         smp_call_function_single(3, test_incrementer_handler, &c, 0);
336         smp_call_function_single(4, test_incrementer_handler, &a, 0);
337         smp_call_function_single(5, test_incrementer_handler, &b, 0);
338         smp_call_function_single(6, test_incrementer_handler, &c, 0);
339         smp_call_function_all(test_incrementer_handler, &a, 0);
340         smp_call_function_single(3, test_incrementer_handler, &c, 0);
341         smp_call_function_all(test_incrementer_handler, &b, 0);
342         smp_call_function_single(1, test_incrementer_handler, &a, 0);
343         smp_call_function_all(test_incrementer_handler, &c, 0);
344         smp_call_function_single(2, test_incrementer_handler, &b, 0);
345         // wait, so we're sure the others finish before printing.
346         // without this, we could (and did) get 19,18,19, since the B_inc
347         // handler didn't finish yet
348         smp_call_function_self(test_null_handler, 0, &waiter0);
349         // need to grab all 5 handlers (max), since the code moves to the next free.
350         smp_call_function_self(test_null_handler, 0, &waiter1);
351         smp_call_function_self(test_null_handler, 0, &waiter2);
352         smp_call_function_self(test_null_handler, 0, &waiter3);
353         smp_call_function_self(test_null_handler, 0, &waiter4);
354         smp_call_wait(waiter0);
355         smp_call_wait(waiter1);
356         smp_call_wait(waiter2);
357         smp_call_wait(waiter3);
358         smp_call_wait(waiter4);
359         printk("A: %d, B: %d, C: %d (should be 19,19,19)\n", a, b, c);
360         printk("Attempting to deadlock by smp_calling with an outstanding wait:\n");
361         smp_call_function_self(test_null_handler, 0, &waiter0);
362         smp_call_function_self(test_null_handler, 0, &waiter1);
363         smp_call_wait(waiter0);
364         smp_call_wait(waiter1);
365         printk("\tMade it through!\n");
366         printk("Attempting to deadlock by smp_calling more than are available:\n");
367         printk("\tShould see an Insufficient message and a kernel warning.\n");
368         if (smp_call_function_self(test_null_handler, 0, &waiter0))
369                 printk("\tInsufficient handlers to call function (0)\n");
370         if (smp_call_function_self(test_null_handler, 0, &waiter1))
371                 printk("\tInsufficient handlers to call function (1)\n");
372         if (smp_call_function_self(test_null_handler, 0, &waiter2))
373                 printk("\tInsufficient handlers to call function (2)\n");
374         if (smp_call_function_self(test_null_handler, 0, &waiter3))
375                 printk("\tInsufficient handlers to call function (3)\n");
376         if (smp_call_function_self(test_null_handler, 0, &waiter4))
377                 printk("\tInsufficient handlers to call function (4)\n");
378         if (smp_call_function_self(test_null_handler, 0, &waiter5))
379                 printk("\tInsufficient handlers to call function (5)\n");
380         smp_call_wait(waiter0);
381         smp_call_wait(waiter1);
382         smp_call_wait(waiter2);
383         smp_call_wait(waiter3);
384         smp_call_wait(waiter4);
385         smp_call_wait(waiter5);
386         printk("\tMade it through!\n");
387
388         printk("Done\n");
389 }
390
391 void test_lapic_status_bit(void)
392 {
393         register_interrupt_handler(interrupt_handlers, test_vector,
394                                    test_incrementer_handler, &a);
395         #define NUM_IPI 100000
396         a = 0;
397         printk("IPIs received (should be 0): %d\n", a);
398         for(int i = 0; i < NUM_IPI; i++) {
399                 send_ipi(7, 0, test_vector);
400                 lapic_wait_to_send();
401         }
402         // need to wait a bit to let those IPIs get there
403         udelay(5000000);
404         printk("IPIs received (should be %d): %d\n", a, NUM_IPI);
405         // hopefully that handler never fires again.  leaving it registered for now.
406 }
407
408 /******************************************************************************/
409 /*            Test Measurements: Couples with measurement.c                   */
410 // All user processes can R/W the UGDATA page
411 barrier_t* bar = (barrier_t*)UGDATA;
412 uint32_t* job_to_run = (uint32_t*)(UGDATA + sizeof(barrier_t));
413 env_t* env_batch[64]; // Fairly arbitrary, just the max I plan to use.
414
415 /* Helpers for test_run_measurements */
416 static void wait_for_all_envs_to_die(void)
417 {
418         while (num_envs)
419                 cpu_relax();
420 }
421
422 // this never returns.
423 static void sync_tests(int start_core, int num_threads, int job_num)
424 {
425         assert(start_core + num_threads <= num_cpus);
426         wait_for_all_envs_to_die();
427         for (int i = start_core; i < start_core + num_threads; i++)
428                 env_batch[i] = ENV_CREATE(roslib_measurements);
429         init_barrier(bar, num_threads);
430         *job_to_run = job_num;
431         for (int i = start_core; i < start_core + num_threads; i++)
432                 smp_call_function_single(i, run_env_handler, env_batch[i], 0);
433         process_workqueue();
434         // we want to fake a run, to reenter manager for the next case
435         env_t *env = ENV_CREATE(roslib_null);
436         smp_call_function_single(0, run_env_handler, env, 0);
437         process_workqueue();
438         panic("whoops!\n");
439 }
440
441 static void async_tests(int start_core, int num_threads, int job_num)
442 {
443         int count;
444
445         assert(start_core + num_threads <= num_cpus);
446         wait_for_all_envs_to_die();
447         for (int i = start_core; i < start_core + num_threads; i++)
448                 env_batch[i] = ENV_CREATE(roslib_measurements);
449         init_barrier(bar, num_threads);
450         *job_to_run = job_num;
451         for (int i = start_core; i < start_core + num_threads; i++)
452                 smp_call_function_single(i, run_env_handler, env_batch[i], 0);
453         count = 0;
454         while (count > -num_threads) {
455                 count = 0;
456                 for (int i = start_core; i < start_core + num_threads; i++) {
457                         count += process_generic_syscalls(env_batch[i], 1);
458                 }
459                 cpu_relax();
460         }
461         // we want to fake a run, to reenter manager for the next case
462         env_t *env = ENV_CREATE(roslib_null);
463         smp_call_function_single(0, run_env_handler, env, 0);
464         process_workqueue();
465         // this all never returns
466         panic("whoops!\n");
467 }
468
469 void test_run_measurements(uint32_t job_num)
470 {
471         switch (job_num) {
472                 case 0: // Nulls
473                         printk("Case 0:\n");
474                         async_tests(2, 1, job_num);  // start core 2, 1 core total
475                         break;
476                 case 1: // Sync
477                         printk("Case 1:\n");
478                         sync_tests(2, 1, job_num);
479                         break;
480                 case 2:
481                         printk("Case 2:\n");
482                         sync_tests(2, 2, job_num);
483                         break;
484                 case 3:
485                         printk("Case 3:\n");
486                         sync_tests(0, 3, job_num);
487                         break;
488                 case 4:
489                         printk("Case 4:\n");
490                         sync_tests(0, 4, job_num);
491                         break;
492                 case 5:
493                         printk("Case 5:\n");
494                         sync_tests(0, 5, job_num);
495                         break;
496                 case 6:
497                         printk("Case 6:\n");
498                         sync_tests(0, 6, job_num);
499                         break;
500                 case 7:
501                         printk("Case 7:\n");
502                         sync_tests(0, 7, job_num);
503                         break;
504                 case 8:
505                         printk("Case 8:\n");
506                         sync_tests(0, 8, job_num);
507                         break;
508                 case 9:
509                         printk("Case 9:\n");
510                         async_tests(2, 1, job_num);
511                         break;
512                 case 10:
513                         printk("Case 10:\n");
514                         async_tests(2, 2, job_num);
515                         break;
516                 case 11:
517                         printk("Case 11:\n");
518                         async_tests(2, 3, job_num);
519                         break;
520                 case 12:
521                         printk("Case 12:\n");
522                         async_tests(2, 4, job_num);
523                         break;
524                 case 13:
525                         printk("Case 13:\n");
526                         async_tests(2, 5, job_num);
527                         break;
528                 case 14:
529                         printk("Case 14:\n");
530                         async_tests(2, 6, job_num);
531                         break;
532                 default:
533                         warn("Invalid test number!!");
534         }
535         panic("Error in test setup!!");
536 }
537
538 /************************************************************/
539 /* ISR Handler Functions */
540
541 void test_hello_world_handler(trapframe_t *tf, void* data)
542 {
543         cprintf("Incoming IRQ, ISR: %d on core %d with tf at 0x%08x\n",
544                 tf->tf_trapno, coreid(), tf);
545 }
546
547 uint32_t print_info_lock = 0;
548
549 void test_print_info_handler(trapframe_t *tf, void* data)
550 {
551         spin_lock_irqsave(&print_info_lock);
552         cprintf("----------------------------\n");
553         cprintf("This is Core %d\n", coreid());
554         cprintf("MTRR_DEF_TYPE = 0x%08x\n", read_msr(IA32_MTRR_DEF_TYPE));
555         cprintf("MTRR Phys0 Base = 0x%016llx, Mask = 0x%016llx\n",
556                 read_msr(0x200), read_msr(0x201));
557         cprintf("MTRR Phys1 Base = 0x%016llx, Mask = 0x%016llx\n",
558                 read_msr(0x202), read_msr(0x203));
559         cprintf("MTRR Phys2 Base = 0x%016llx, Mask = 0x%016llx\n",
560                 read_msr(0x204), read_msr(0x205));
561         cprintf("MTRR Phys3 Base = 0x%016llx, Mask = 0x%016llx\n",
562                 read_msr(0x206), read_msr(0x207));
563         cprintf("MTRR Phys4 Base = 0x%016llx, Mask = 0x%016llx\n",
564                 read_msr(0x208), read_msr(0x209));
565         cprintf("MTRR Phys5 Base = 0x%016llx, Mask = 0x%016llx\n",
566                 read_msr(0x20a), read_msr(0x20b));
567         cprintf("MTRR Phys6 Base = 0x%016llx, Mask = 0x%016llx\n",
568                 read_msr(0x20c), read_msr(0x20d));
569         cprintf("MTRR Phys7 Base = 0x%016llx, Mask = 0x%016llx\n",
570                 read_msr(0x20e), read_msr(0x20f));
571         cprintf("----------------------------\n");
572         spin_unlock_irqsave(&print_info_lock);
573 }
574
575 void test_barrier_handler(trapframe_t *tf, void* data)
576 {
577         cprintf("Round 1: Core %d\n", coreid());
578         waiton_barrier(&test_cpu_array);
579         waiton_barrier(&test_cpu_array);
580         waiton_barrier(&test_cpu_array);
581         waiton_barrier(&test_cpu_array);
582         waiton_barrier(&test_cpu_array);
583         waiton_barrier(&test_cpu_array);
584         cprintf("Round 2: Core %d\n", coreid());
585         waiton_barrier(&test_cpu_array);
586         cprintf("Round 3: Core %d\n", coreid());
587         // uncomment to see it fucked up
588         //cprintf("Round 4: Core %d\n", coreid());
589 }
590
591 static void test_waiting_handler(trapframe_t *tf, void* data)
592 {
593         {HANDLER_ATOMIC atomic_dec((uint32_t*)data);}
594 }
595
596 void test_pit(void)
597 {
598         cprintf("Starting test for PIT now (10s)\n");
599         udelay_pit(10000000);
600         cprintf("End now\n");
601         cprintf("Starting test for TSC (if stable) now (10s)\n");
602         udelay(10000000);
603         cprintf("End now\n");
604
605         cprintf("Starting test for LAPIC (if stable) now (10s)\n");
606         enable_irq();
607         lapic_set_timer(10000000, FALSE);
608
609         uint32_t waiting = 1;
610         register_interrupt_handler(interrupt_handlers, test_vector,
611                                    test_waiting_handler, &waiting);
612         while(waiting)
613                 cpu_relax();
614         cprintf("End now\n");
615 }