Moved all NIC related stuff into rl8168.c/h from testing. Cleaned up nic code
[akaros.git] / kern / src / testing.c
1 #ifdef __DEPUTY__
2 #pragma nodeputy
3 #endif
4
5 #include <arch/mmu.h>
6 #include <arch/x86.h>
7 #include <arch/smp.h>
8 #include <arch/apic.h>
9
10 #include <ros/memlayout.h>
11
12 #include <atomic.h>
13 #include <stdio.h>
14 #include <assert.h>
15 #include <string.h>
16 #include <testing.h>
17 #include <trap.h>
18 #include <env.h>
19 #include <syscall.h>
20
21 #include <pmap.h>
22
23 #define test_vector 0xeb
24
25 void test_ipi_sending(void)
26 {
27         extern handler_t interrupt_handlers[];
28         int8_t state = 0;
29
30         register_interrupt_handler(interrupt_handlers, test_vector,
31                                    test_hello_world_handler, 0);
32         enable_irqsave(&state);
33         cprintf("\nCORE 0 sending broadcast\n");
34         send_broadcast_ipi(test_vector);
35         udelay(3000000);
36         cprintf("\nCORE 0 sending all others\n");
37         send_all_others_ipi(test_vector);
38         udelay(3000000);
39         cprintf("\nCORE 0 sending self\n");
40         send_self_ipi(test_vector);
41         udelay(3000000);
42         cprintf("\nCORE 0 sending ipi to physical 1\n");
43         send_ipi(0x01, 0, test_vector);
44         udelay(3000000);
45         cprintf("\nCORE 0 sending ipi to physical 2\n");
46         send_ipi(0x02, 0, test_vector);
47         udelay(3000000);
48         cprintf("\nCORE 0 sending ipi to physical 3\n");
49         send_ipi(0x03, 0, test_vector);
50         udelay(3000000);
51         cprintf("\nCORE 0 sending ipi to physical 15\n");
52         send_ipi(0x0f, 0, test_vector);
53         udelay(3000000);
54         cprintf("\nCORE 0 sending ipi to logical 2\n");
55         send_ipi(0x02, 1, test_vector);
56         udelay(3000000);
57         cprintf("\nCORE 0 sending ipi to logical 1\n");
58         send_ipi(0x01, 1, test_vector);
59         udelay(3000000);
60         cprintf("\nDone!\n");
61         disable_irqsave(&state);
62 }
63
64 // Note this never returns and will muck with any other timer work
65 void test_pic_reception(void)
66 {
67         register_interrupt_handler(interrupt_handlers, 0x20, test_hello_world_handler, 0);
68         pit_set_timer(100,TIMER_RATEGEN); // totally arbitrary time
69         pic_unmask_irq(0);
70         cprintf("PIC1 Mask = 0x%04x\n", inb(PIC1_DATA));
71         cprintf("PIC2 Mask = 0x%04x\n", inb(PIC2_DATA));
72         unmask_lapic_lvt(LAPIC_LVT_LINT0);
73         cprintf("Core %d's LINT0: 0x%08x\n", lapic_get_id(), read_mmreg32(LAPIC_LVT_LINT0));
74         enable_irq();
75         while(1);
76 }
77
78 void test_print_info(void)
79 {
80         cprintf("\nCORE 0 asking all cores to print info:\n");
81         smp_call_function_all(test_print_info_handler, 0, 0);
82         cprintf("\nDone!\n");
83 }
84
85
86 extern uint8_t num_cpus;
87 barrier_t test_cpu_array;
88
89 void test_barrier(void)
90 {
91         cprintf("Core 0 initializing barrier\n");
92         init_barrier(&test_cpu_array, num_cpus);
93         cprintf("Core 0 asking all cores to print ids, barrier, rinse, repeat\n");
94         smp_call_function_all(test_barrier_handler, 0, 0);
95 }
96
97 void test_interrupts_irqsave(void)
98 {
99         int8_t state = 0;
100         printd("Testing Nesting Enabling first, turning ints off:\n");
101         disable_irq();
102         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
103         assert((read_eflags() & FL_IF) == 0);
104         printd("Enabling IRQSave\n");
105         enable_irqsave(&state);
106         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
107         assert((read_eflags() & FL_IF) == 0x200);
108         printd("Enabling IRQSave Again\n");
109         enable_irqsave(&state);
110         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
111         assert((read_eflags() & FL_IF) == 0x200);
112         printd("Disabling IRQSave Once\n");
113         disable_irqsave(&state);
114         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
115         assert((read_eflags() & FL_IF) == 0x200);
116         printd("Disabling IRQSave Again\n");
117         disable_irqsave(&state);
118         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
119         assert((read_eflags() & FL_IF) == 0);
120         printd("Done.  Should have been 0, 200, 200, 200, 0\n");
121
122         printd("Testing Nesting Disabling first, turning ints on:\n");
123         state = 0;
124         enable_irq();
125         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
126         assert((read_eflags() & FL_IF) == 0x200);
127         printd("Disabling IRQSave Once\n");
128         disable_irqsave(&state);
129         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
130         assert((read_eflags() & FL_IF) == 0);
131         printd("Disabling IRQSave Again\n");
132         disable_irqsave(&state);
133         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
134         assert((read_eflags() & FL_IF) == 0);
135         printd("Enabling IRQSave Once\n");
136         enable_irqsave(&state);
137         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
138         assert((read_eflags() & FL_IF) == 0);
139         printd("Enabling IRQSave Again\n");
140         enable_irqsave(&state);
141         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
142         assert((read_eflags() & FL_IF) == 0x200);
143         printd("Done.  Should have been 200, 0, 0, 0, 200 \n");
144
145         state = 0;
146         disable_irq();
147         printd("Ints are off, enabling then disabling.\n");
148         enable_irqsave(&state);
149         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
150         assert((read_eflags() & FL_IF) == 0x200);
151         disable_irqsave(&state);
152         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
153         assert((read_eflags() & FL_IF) == 0);
154         printd("Done.  Should have been 200, 0\n");
155
156         state = 0;
157         enable_irq();
158         printd("Ints are on, enabling then disabling.\n");
159         enable_irqsave(&state);
160         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
161         assert((read_eflags() & FL_IF) == 0x200);
162         disable_irqsave(&state);
163         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
164         assert((read_eflags() & FL_IF) == 0x200);
165         printd("Done.  Should have been 200, 200\n");
166
167         state = 0;
168         disable_irq();
169         printd("Ints are off, disabling then enabling.\n");
170         disable_irqsave(&state);
171         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
172         assert((read_eflags() & FL_IF) == 0);
173         enable_irqsave(&state);
174         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
175         assert((read_eflags() & FL_IF) == 0);
176         printd("Done.  Should have been 0, 0\n");
177
178         state = 0;
179         enable_irq();
180         printd("Ints are on, disabling then enabling.\n");
181         disable_irqsave(&state);
182         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
183         assert((read_eflags() & FL_IF) == 0);
184         enable_irqsave(&state);
185         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
186         assert((read_eflags() & FL_IF) == 0x200);
187         printd("Done.  Should have been 0, 200\n");
188
189         disable_irq();
190         cprintf("Passed enable_irqsave tests\n");
191 }
192
193 void test_bitmasks(void)
194 {
195 #define masksize 67
196         DECL_BITMASK(mask, masksize);
197         printk("size of mask %d\n", sizeof(mask));
198         CLR_BITMASK(mask, masksize);
199         PRINT_BITMASK(mask, masksize);
200         printk("cleared\n");
201         SET_BITMASK_BIT(mask, 0);
202         SET_BITMASK_BIT(mask, 11);
203         SET_BITMASK_BIT(mask, 17);
204         SET_BITMASK_BIT(mask, masksize-1);
205         printk("bits set\n");
206         PRINT_BITMASK(mask, masksize);
207         DECL_BITMASK(mask2, masksize);
208         COPY_BITMASK(mask2, mask, masksize);
209         printk("copy of original mask, should be the same as the prev\n");
210         PRINT_BITMASK(mask2, masksize);
211         CLR_BITMASK_BIT(mask, 11);
212         printk("11 cleared\n");
213         PRINT_BITMASK(mask, masksize);
214         printk("bit 17 is %d (should be 1)\n", GET_BITMASK_BIT(mask, 17));
215         printk("bit 11 is %d (should be 0)\n", GET_BITMASK_BIT(mask, 11));
216         FILL_BITMASK(mask, masksize);
217         PRINT_BITMASK(mask, masksize);
218         printk("should be all 1's, except for a few at the end\n");
219         printk("Is Clear?: %d (should be 0)\n", BITMASK_IS_CLEAR(mask,masksize));
220         CLR_BITMASK(mask, masksize);
221         PRINT_BITMASK(mask, masksize);
222         printk("Is Clear?: %d (should be 1)\n", BITMASK_IS_CLEAR(mask,masksize));
223         printk("should be cleared\n");
224 }
225
226 checklist_t* the_global_list;
227
228 void test_checklist_handler(trapframe_t *tf, void* data)
229 {
230         for (int i = 0; i < SMP_BOOT_TIMEOUT; i++);
231         for (int i = 0; i < SMP_BOOT_TIMEOUT; i++);
232         down_checklist(the_global_list);
233 }
234
235 extern uint8_t num_cpus;
236
237 void test_checklists(void)
238 {
239         INIT_CHECKLIST(a_list, MAX_NUM_CPUS);
240         the_global_list = &a_list;
241         printk("Checklist Build, mask size: %d\n", sizeof(a_list.mask.bits));
242         printk("mask\n");
243         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
244         SET_BITMASK_BIT(a_list.mask.bits, 11);
245         printk("Set bit 11\n");
246         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
247
248         CLR_BITMASK(a_list.mask.bits, a_list.mask.size);
249         INIT_CHECKLIST_MASK(a_mask, MAX_NUM_CPUS);
250         FILL_BITMASK(a_mask.bits, num_cpus);
251         //CLR_BITMASK_BIT(a_mask.bits, lapic_get_id());
252         //SET_BITMASK_BIT(a_mask.bits, 1);
253         //printk("New mask (1, 17, 25):\n");
254         printk("Created new mask, filled up to num_cpus\n");
255         PRINT_BITMASK(a_mask.bits, a_mask.size);
256         printk("committing new mask\n");
257         commit_checklist_wait(&a_list, &a_mask);
258         printk("Old mask (copied onto):\n");
259         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
260         //smp_call_function_single(1, test_checklist_handler, 0, 0);
261         smp_call_function_all(test_checklist_handler, 0, 0);
262
263         printk("Waiting on checklist\n");
264         waiton_checklist(&a_list);
265         printk("Done Waiting!\n");
266
267 }
268
269 uint32_t a = 0, b = 0, c = 0;
270
271 void test_incrementer_handler(struct Trapframe *tf, void* data)
272 {
273         assert(data);
274         atomic_inc((uint32_t*)data);
275 }
276
277 void test_null_handler(struct Trapframe *tf, void* data)
278 {
279         asm volatile("nop");
280 }
281
282 void test_smp_call_functions(void)
283 {
284         handler_wrapper_t *waiter0 = 0, *waiter1 = 0, *waiter2 = 0, *waiter3 = 0,
285                           *waiter4 = 0, *waiter5 = 0;
286         uint8_t me = lapic_get_id();
287         printk("\nCore %d: SMP Call Self (nowait):\n", me);
288         printk("---------------------\n");
289         smp_call_function_self(test_hello_world_handler, 0, 0);
290         printk("\nCore %d: SMP Call Self (wait):\n", me);
291         printk("---------------------\n");
292         smp_call_function_self(test_hello_world_handler, 0, &waiter0);
293         smp_call_wait(waiter0);
294         printk("\nCore %d: SMP Call All (nowait):\n", me);
295         printk("---------------------\n");
296         smp_call_function_all(test_hello_world_handler, 0, 0);
297         printk("\nCore %d: SMP Call All (wait):\n", me);
298         printk("---------------------\n");
299         smp_call_function_all(test_hello_world_handler, 0, &waiter0);
300         smp_call_wait(waiter0);
301         printk("\nCore %d: SMP Call All-Else Individually, in order (nowait):\n", me);
302         printk("---------------------\n");
303         smp_call_function_single(1, test_hello_world_handler, 0, 0);
304         smp_call_function_single(2, test_hello_world_handler, 0, 0);
305         smp_call_function_single(3, test_hello_world_handler, 0, 0);
306         smp_call_function_single(4, test_hello_world_handler, 0, 0);
307         smp_call_function_single(5, test_hello_world_handler, 0, 0);
308         smp_call_function_single(6, test_hello_world_handler, 0, 0);
309         smp_call_function_single(7, test_hello_world_handler, 0, 0);
310         printk("\nCore %d: SMP Call Self (wait):\n", me);
311         printk("---------------------\n");
312         smp_call_function_self(test_hello_world_handler, 0, &waiter0);
313         smp_call_wait(waiter0);
314         printk("\nCore %d: SMP Call All-Else Individually, in order (wait):\n", me);
315         printk("---------------------\n");
316         smp_call_function_single(1, test_hello_world_handler, 0, &waiter0);
317         smp_call_wait(waiter0);
318         smp_call_function_single(2, test_hello_world_handler, 0, &waiter0);
319         smp_call_wait(waiter0);
320         smp_call_function_single(3, test_hello_world_handler, 0, &waiter0);
321         smp_call_wait(waiter0);
322         smp_call_function_single(4, test_hello_world_handler, 0, &waiter0);
323         smp_call_wait(waiter0);
324         smp_call_function_single(5, test_hello_world_handler, 0, &waiter0);
325         smp_call_wait(waiter0);
326         smp_call_function_single(6, test_hello_world_handler, 0, &waiter0);
327         smp_call_wait(waiter0);
328         smp_call_function_single(7, test_hello_world_handler, 0, &waiter0);
329         smp_call_wait(waiter0);
330         printk("\nTesting to see if any IPI-functions are dropped when not waiting:\n");
331         printk("A: %d, B: %d, C: %d (should be 0,0,0)\n", a, b, c);
332         smp_call_function_all(test_incrementer_handler, &a, 0);
333         smp_call_function_all(test_incrementer_handler, &b, 0);
334         smp_call_function_all(test_incrementer_handler, &c, 0);
335         // if i can clobber a previous IPI, the interleaving might do it
336         smp_call_function_single(1, test_incrementer_handler, &a, 0);
337         smp_call_function_single(2, test_incrementer_handler, &b, 0);
338         smp_call_function_single(3, test_incrementer_handler, &c, 0);
339         smp_call_function_single(4, test_incrementer_handler, &a, 0);
340         smp_call_function_single(5, test_incrementer_handler, &b, 0);
341         smp_call_function_single(6, test_incrementer_handler, &c, 0);
342         smp_call_function_all(test_incrementer_handler, &a, 0);
343         smp_call_function_single(3, test_incrementer_handler, &c, 0);
344         smp_call_function_all(test_incrementer_handler, &b, 0);
345         smp_call_function_single(1, test_incrementer_handler, &a, 0);
346         smp_call_function_all(test_incrementer_handler, &c, 0);
347         smp_call_function_single(2, test_incrementer_handler, &b, 0);
348         // wait, so we're sure the others finish before printing.
349         // without this, we could (and did) get 19,18,19, since the B_inc
350         // handler didn't finish yet
351         smp_call_function_self(test_null_handler, 0, &waiter0);
352         // need to grab all 5 handlers (max), since the code moves to the next free.
353         smp_call_function_self(test_null_handler, 0, &waiter1);
354         smp_call_function_self(test_null_handler, 0, &waiter2);
355         smp_call_function_self(test_null_handler, 0, &waiter3);
356         smp_call_function_self(test_null_handler, 0, &waiter4);
357         smp_call_wait(waiter0);
358         smp_call_wait(waiter1);
359         smp_call_wait(waiter2);
360         smp_call_wait(waiter3);
361         smp_call_wait(waiter4);
362         printk("A: %d, B: %d, C: %d (should be 19,19,19)\n", a, b, c);
363         printk("Attempting to deadlock by smp_calling with an outstanding wait:\n");
364         smp_call_function_self(test_null_handler, 0, &waiter0);
365         smp_call_function_self(test_null_handler, 0, &waiter1);
366         smp_call_wait(waiter0);
367         smp_call_wait(waiter1);
368         printk("\tMade it through!\n");
369         printk("Attempting to deadlock by smp_calling more than are available:\n");
370         printk("\tShould see an Insufficient message and a kernel warning.\n");
371         if (smp_call_function_self(test_null_handler, 0, &waiter0))
372                 printk("\tInsufficient handlers to call function (0)\n");
373         if (smp_call_function_self(test_null_handler, 0, &waiter1))
374                 printk("\tInsufficient handlers to call function (1)\n");
375         if (smp_call_function_self(test_null_handler, 0, &waiter2))
376                 printk("\tInsufficient handlers to call function (2)\n");
377         if (smp_call_function_self(test_null_handler, 0, &waiter3))
378                 printk("\tInsufficient handlers to call function (3)\n");
379         if (smp_call_function_self(test_null_handler, 0, &waiter4))
380                 printk("\tInsufficient handlers to call function (4)\n");
381         if (smp_call_function_self(test_null_handler, 0, &waiter5))
382                 printk("\tInsufficient handlers to call function (5)\n");
383         smp_call_wait(waiter0);
384         smp_call_wait(waiter1);
385         smp_call_wait(waiter2);
386         smp_call_wait(waiter3);
387         smp_call_wait(waiter4);
388         smp_call_wait(waiter5);
389         printk("\tMade it through!\n");
390
391         printk("Done\n");
392 }
393
394 void test_lapic_status_bit(void)
395 {
396         register_interrupt_handler(interrupt_handlers, test_vector,
397                                    test_incrementer_handler, &a);
398         #define NUM_IPI 100000
399         a = 0;
400         printk("IPIs received (should be 0): %d\n", a);
401         for(int i = 0; i < NUM_IPI; i++) {
402                 send_ipi(7, 0, test_vector);
403                 lapic_wait_to_send();
404         }
405         // need to wait a bit to let those IPIs get there
406         udelay(5000000);
407         printk("IPIs received (should be %d): %d\n", a, NUM_IPI);
408         // hopefully that handler never fires again.  leaving it registered for now.
409 }
410
411 /******************************************************************************/
412 /*            Test Measurements: Couples with measurement.c                   */
413 // All user processes can R/W the UGDATA page
414 barrier_t* bar = (barrier_t*)UGDATA;
415 uint32_t* job_to_run = (uint32_t*)(UGDATA + sizeof(barrier_t));
416 env_t* env_batch[64]; // Fairly arbitrary, just the max I plan to use.
417
418 /* Helpers for test_run_measurements */
419 static void wait_for_all_envs_to_die(void)
420 {
421         while (num_envs)
422                 cpu_relax();
423 }
424
425 // this never returns.
426 static void sync_tests(int start_core, int num_threads, int job_num)
427 {
428         assert(start_core + num_threads <= num_cpus);
429         wait_for_all_envs_to_die();
430         for (int i = start_core; i < start_core + num_threads; i++)
431                 env_batch[i] = ENV_CREATE(roslib_measurements);
432         init_barrier(bar, num_threads);
433         *job_to_run = job_num;
434         for (int i = start_core; i < start_core + num_threads; i++)
435                 smp_call_function_single(i, run_env_handler, env_batch[i], 0);
436         process_workqueue();
437         // we want to fake a run, to reenter manager for the next case
438         env_t *env = ENV_CREATE(roslib_null);
439         smp_call_function_single(0, run_env_handler, env, 0);
440         process_workqueue();
441         panic("whoops!\n");
442 }
443
444 static void async_tests(int start_core, int num_threads, int job_num)
445 {
446         int count;
447
448         assert(start_core + num_threads <= num_cpus);
449         wait_for_all_envs_to_die();
450         for (int i = start_core; i < start_core + num_threads; i++)
451                 env_batch[i] = ENV_CREATE(roslib_measurements);
452         init_barrier(bar, num_threads);
453         *job_to_run = job_num;
454         for (int i = start_core; i < start_core + num_threads; i++)
455                 smp_call_function_single(i, run_env_handler, env_batch[i], 0);
456         count = 0;
457         while (count > -num_threads) {
458                 count = 0;
459                 for (int i = start_core; i < start_core + num_threads; i++) {
460                         count += process_generic_syscalls(env_batch[i], 1);
461                 }
462                 cpu_relax();
463         }
464         // we want to fake a run, to reenter manager for the next case
465         env_t *env = ENV_CREATE(roslib_null);
466         smp_call_function_single(0, run_env_handler, env, 0);
467         process_workqueue();
468         // this all never returns
469         panic("whoops!\n");
470 }
471
472 void test_run_measurements(uint32_t job_num)
473 {
474         switch (job_num) {
475                 case 0: // Nulls
476                         printk("Case 0:\n");
477                         async_tests(2, 1, job_num);  // start core 2, 1 core total
478                         break;
479                 case 1: // Sync
480                         printk("Case 1:\n");
481                         sync_tests(2, 1, job_num);
482                         break;
483                 case 2:
484                         printk("Case 2:\n");
485                         sync_tests(2, 2, job_num);
486                         break;
487                 case 3:
488                         printk("Case 3:\n");
489                         sync_tests(0, 3, job_num);
490                         break;
491                 case 4:
492                         printk("Case 4:\n");
493                         sync_tests(0, 4, job_num);
494                         break;
495                 case 5:
496                         printk("Case 5:\n");
497                         sync_tests(0, 5, job_num);
498                         break;
499                 case 6:
500                         printk("Case 6:\n");
501                         sync_tests(0, 6, job_num);
502                         break;
503                 case 7:
504                         printk("Case 7:\n");
505                         sync_tests(0, 7, job_num);
506                         break;
507                 case 8:
508                         printk("Case 8:\n");
509                         sync_tests(0, 8, job_num);
510                         break;
511                 case 9:
512                         printk("Case 9:\n");
513                         async_tests(2, 1, job_num);
514                         break;
515                 case 10:
516                         printk("Case 10:\n");
517                         async_tests(2, 2, job_num);
518                         break;
519                 case 11:
520                         printk("Case 11:\n");
521                         async_tests(2, 3, job_num);
522                         break;
523                 case 12:
524                         printk("Case 12:\n");
525                         async_tests(2, 4, job_num);
526                         break;
527                 case 13:
528                         printk("Case 13:\n");
529                         async_tests(2, 5, job_num);
530                         break;
531                 case 14:
532                         printk("Case 14:\n");
533                         async_tests(2, 6, job_num);
534                         break;
535                 default:
536                         warn("Invalid test number!!");
537         }
538         panic("Error in test setup!!");
539 }
540
541 /************************************************************/
542 /* ISR Handler Functions */
543
544 void test_hello_world_handler(trapframe_t *tf, void* data)
545 {
546         cprintf("Incoming IRQ, ISR: %d on core %d with tf at 0x%08x\n",
547                 tf->tf_trapno, lapic_get_id(), tf);
548 }
549
550 uint32_t print_info_lock = 0;
551
552 void test_print_info_handler(trapframe_t *tf, void* data)
553 {
554         spin_lock_irqsave(&print_info_lock);
555         cprintf("----------------------------\n");
556         cprintf("This is Core %d\n", lapic_get_id());
557         cprintf("MTRR_DEF_TYPE = 0x%08x\n", read_msr(IA32_MTRR_DEF_TYPE));
558         cprintf("MTRR Phys0 Base = 0x%016llx, Mask = 0x%016llx\n",
559                 read_msr(0x200), read_msr(0x201));
560         cprintf("MTRR Phys1 Base = 0x%016llx, Mask = 0x%016llx\n",
561                 read_msr(0x202), read_msr(0x203));
562         cprintf("MTRR Phys2 Base = 0x%016llx, Mask = 0x%016llx\n",
563                 read_msr(0x204), read_msr(0x205));
564         cprintf("MTRR Phys3 Base = 0x%016llx, Mask = 0x%016llx\n",
565                 read_msr(0x206), read_msr(0x207));
566         cprintf("MTRR Phys4 Base = 0x%016llx, Mask = 0x%016llx\n",
567                 read_msr(0x208), read_msr(0x209));
568         cprintf("MTRR Phys5 Base = 0x%016llx, Mask = 0x%016llx\n",
569                 read_msr(0x20a), read_msr(0x20b));
570         cprintf("MTRR Phys6 Base = 0x%016llx, Mask = 0x%016llx\n",
571                 read_msr(0x20c), read_msr(0x20d));
572         cprintf("MTRR Phys7 Base = 0x%016llx, Mask = 0x%016llx\n",
573                 read_msr(0x20e), read_msr(0x20f));
574         cprintf("----------------------------\n");
575         spin_unlock_irqsave(&print_info_lock);
576 }
577
578 void test_barrier_handler(trapframe_t *tf, void* data)
579 {
580         cprintf("Round 1: Core %d\n", lapic_get_id());
581         waiton_barrier(&test_cpu_array);
582         waiton_barrier(&test_cpu_array);
583         waiton_barrier(&test_cpu_array);
584         waiton_barrier(&test_cpu_array);
585         waiton_barrier(&test_cpu_array);
586         waiton_barrier(&test_cpu_array);
587         cprintf("Round 2: Core %d\n", lapic_get_id());
588         waiton_barrier(&test_cpu_array);
589         cprintf("Round 3: Core %d\n", lapic_get_id());
590         // uncomment to see it fucked up
591         //cprintf("Round 4: Core %d\n", lapic_get_id());
592 }
593
594 static void test_waiting_handler(trapframe_t *tf, void* data)
595 {
596         {HANDLER_ATOMIC atomic_dec((uint32_t*)data);}
597 }
598
599 void test_pit(void)
600 {
601         cprintf("Starting test for PIT now (10s)\n");
602         udelay_pit(10000000);
603         cprintf("End now\n");
604         cprintf("Starting test for TSC (if stable) now (10s)\n");
605         udelay(10000000);
606         cprintf("End now\n");
607
608         cprintf("Starting test for LAPIC (if stable) now (10s)\n");
609         enable_irq();
610         lapic_set_timer(10000000, FALSE);
611
612         uint32_t waiting = 1;
613         register_interrupt_handler(interrupt_handlers, test_vector,
614                                    test_waiting_handler, &waiting);
615         while(waiting)
616                 cpu_relax();
617         cprintf("End now\n");
618 }