Get the previous commit working with gcc
[akaros.git] / kern / src / testing.c
1
2 #ifdef __SHARC__
3 #pragma nosharc
4 #endif
5
6 #include <arch/mmu.h>
7 #include <arch/arch.h>
8 #include <smp.h>
9
10 #include <ros/memlayout.h>
11 #include <ros/common.h>
12
13 #include <atomic.h>
14 #include <stdio.h>
15 #include <assert.h>
16 #include <string.h>
17 #include <testing.h>
18 #include <trap.h>
19 #include <arch/trap.h>
20 #include <process.h>
21 #include <syscall.h>
22 #include <timing.h>
23 #include <kfs.h>
24 #include <multiboot.h>
25 #include <pmap.h>
26 #include <page_alloc.h>
27
28 #ifdef __i386__
29
30 void test_ipi_sending(void)
31 {
32         extern handler_t (COUNT(NUM_INTERRUPT_HANDLERS) interrupt_handlers)[];
33         int8_t state = 0;
34
35         register_interrupt_handler(interrupt_handlers, I_TESTING,
36                                    test_hello_world_handler, NULL);
37         enable_irqsave(&state);
38         cprintf("\nCORE 0 sending broadcast\n");
39         send_broadcast_ipi(I_TESTING);
40         udelay(3000000);
41         cprintf("\nCORE 0 sending all others\n");
42         send_all_others_ipi(I_TESTING);
43         udelay(3000000);
44         cprintf("\nCORE 0 sending self\n");
45         send_self_ipi(I_TESTING);
46         udelay(3000000);
47         cprintf("\nCORE 0 sending ipi to physical 1\n");
48         send_ipi(0x01, 0, I_TESTING);
49         udelay(3000000);
50         cprintf("\nCORE 0 sending ipi to physical 2\n");
51         send_ipi(0x02, 0, I_TESTING);
52         udelay(3000000);
53         cprintf("\nCORE 0 sending ipi to physical 3\n");
54         send_ipi(0x03, 0, I_TESTING);
55         udelay(3000000);
56         cprintf("\nCORE 0 sending ipi to physical 15\n");
57         send_ipi(0x0f, 0, I_TESTING);
58         udelay(3000000);
59         cprintf("\nCORE 0 sending ipi to logical 2\n");
60         send_ipi(0x02, 1, I_TESTING);
61         udelay(3000000);
62         cprintf("\nCORE 0 sending ipi to logical 1\n");
63         send_ipi(0x01, 1, I_TESTING);
64         udelay(3000000);
65         cprintf("\nDone!\n");
66         disable_irqsave(&state);
67 }
68
69 // Note this never returns and will muck with any other timer work
70 void test_pic_reception(void)
71 {
72         register_interrupt_handler(interrupt_handlers, 0x20, test_hello_world_handler, NULL);
73         pit_set_timer(100,TIMER_RATEGEN); // totally arbitrary time
74         pic_unmask_irq(0);
75         cprintf("PIC1 Mask = 0x%04x\n", inb(PIC1_DATA));
76         cprintf("PIC2 Mask = 0x%04x\n", inb(PIC2_DATA));
77         unmask_lapic_lvt(LAPIC_LVT_LINT0);
78         cprintf("Core %d's LINT0: 0x%08x\n", core_id(), read_mmreg32(LAPIC_LVT_LINT0));
79         enable_irq();
80         while(1);
81 }
82
83 #endif // __i386__
84
85 void test_print_info(void)
86 {
87         cprintf("\nCORE 0 asking all cores to print info:\n");
88         smp_call_function_all(test_print_info_handler, NULL, 0);
89         cprintf("\nDone!\n");
90 }
91
92 void test_page_coloring(void) 
93 {
94         //Print the different cache properties of our machine
95         print_cache_properties("L1", &l1);
96         cprintf("\n");
97         print_cache_properties("L2", &l2);
98         cprintf("\n");
99         print_cache_properties("L3", &l3);
100         cprintf("\n");
101
102         //Print some stats about our memory
103         cprintf("Max Address: %llu\n", MAX_VADDR);
104         cprintf("Num Pages: %u\n", npages);
105
106         //Declare a local variable for allocating pages 
107         page_t* page;
108
109         //Run through and allocate all pages through l1_page_alloc
110         cprintf("Allocating from L1 page colors:\n");
111         for(int i=0; i<get_cache_num_page_colors(&l1); i++) {
112                 cprintf("  COLOR %d:\n", i);
113                 while(l1_page_alloc(&page, i) != -ENOMEM)
114                         cprintf("    Page: %d\n", page2ppn(page));
115         }
116
117         //Put all the pages back by reinitializing
118         page_init();
119         
120         //Run through and allocate all pages through l2_page_alloc
121         cprintf("Allocating from L2 page colors:\n");
122         for(int i=0; i<get_cache_num_page_colors(&l2); i++) {
123                 cprintf("  COLOR %d:\n", i);
124                 while(l2_page_alloc(&page, i) != -ENOMEM)
125                         cprintf("    Page: %d\n", page2ppn(page));
126         }
127
128         //Put all the pages back by reinitializing
129         page_init();
130         
131         //Run through and allocate all pages through l3_page_alloc
132         cprintf("Allocating from L3 page colors:\n");
133         for(int i=0; i<get_cache_num_page_colors(&l3); i++) {
134                 cprintf("  COLOR %d:\n", i);
135                 while(l3_page_alloc(&page, i) != -ENOMEM)
136                         cprintf("    Page: %d\n", page2ppn(page));
137         }
138         
139         //Put all the pages back by reinitializing
140         page_init();
141         
142         //Run through and allocate all pages through page_alloc
143         cprintf("Allocating from global allocator:\n");
144         while(page_alloc(&page) != -ENOMEM)
145                 cprintf("    Page: %d\n", page2ppn(page));
146         
147         if(l2_page_alloc(&page, 0) != -ENOMEM)
148                 cprintf("Should not get here, all pages should already be gone!\n");
149         cprintf("All pages gone for sure...\n");
150         
151         //Now lets put a few pages back using page_free..
152         cprintf("Reinserting pages via page_free and reallocating them...\n");
153         page_free(&pages[0]);
154         page_free(&pages[15]);
155         page_free(&pages[7]);
156         page_free(&pages[6]);
157         page_free(&pages[4]);
158
159         while(page_alloc(&page) != -ENOMEM)
160                 cprintf("Page: %d\n", page2ppn(page));  
161 }
162
163 barrier_t test_cpu_array;
164
165 void test_barrier(void)
166 {
167         cprintf("Core 0 initializing barrier\n");
168         init_barrier(&test_cpu_array, num_cpus);
169         cprintf("Core 0 asking all cores to print ids, barrier, rinse, repeat\n");
170         smp_call_function_all(test_barrier_handler, NULL, 0);
171 }
172
173 void test_interrupts_irqsave(void)
174 {
175         int8_t state = 0;
176         printd("Testing Nesting Enabling first, turning ints off:\n");
177         disable_irq();
178         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
179         assert(!irq_is_enabled());
180         printd("Enabling IRQSave\n");
181         enable_irqsave(&state);
182         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
183         assert(irq_is_enabled());
184         printd("Enabling IRQSave Again\n");
185         enable_irqsave(&state);
186         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
187         assert(irq_is_enabled());
188         printd("Disabling IRQSave Once\n");
189         disable_irqsave(&state);
190         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
191         assert(irq_is_enabled());
192         printd("Disabling IRQSave Again\n");
193         disable_irqsave(&state);
194         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
195         assert(!irq_is_enabled());
196         printd("Done.  Should have been 0, 200, 200, 200, 0\n");
197
198         printd("Testing Nesting Disabling first, turning ints on:\n");
199         state = 0;
200         enable_irq();
201         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
202         assert(irq_is_enabled());
203         printd("Disabling IRQSave Once\n");
204         disable_irqsave(&state);
205         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
206         assert(!irq_is_enabled());
207         printd("Disabling IRQSave Again\n");
208         disable_irqsave(&state);
209         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
210         assert(!irq_is_enabled());
211         printd("Enabling IRQSave Once\n");
212         enable_irqsave(&state);
213         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
214         assert(!irq_is_enabled());
215         printd("Enabling IRQSave Again\n");
216         enable_irqsave(&state);
217         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
218         assert(irq_is_enabled());
219         printd("Done.  Should have been 200, 0, 0, 0, 200 \n");
220
221         state = 0;
222         disable_irq();
223         printd("Ints are off, enabling then disabling.\n");
224         enable_irqsave(&state);
225         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
226         assert(irq_is_enabled());
227         disable_irqsave(&state);
228         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
229         assert(!irq_is_enabled());
230         printd("Done.  Should have been 200, 0\n");
231
232         state = 0;
233         enable_irq();
234         printd("Ints are on, enabling then disabling.\n");
235         enable_irqsave(&state);
236         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
237         assert(irq_is_enabled());
238         disable_irqsave(&state);
239         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
240         assert(irq_is_enabled());
241         printd("Done.  Should have been 200, 200\n");
242
243         state = 0;
244         disable_irq();
245         printd("Ints are off, disabling then enabling.\n");
246         disable_irqsave(&state);
247         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
248         assert(!irq_is_enabled());
249         enable_irqsave(&state);
250         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
251         assert(!irq_is_enabled());
252         printd("Done.  Should have been 0, 0\n");
253
254         state = 0;
255         enable_irq();
256         printd("Ints are on, disabling then enabling.\n");
257         disable_irqsave(&state);
258         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
259         assert(!irq_is_enabled());
260         enable_irqsave(&state);
261         printd("Interrupts are: %x\n", read_eflags() & FL_IF);
262         assert(irq_is_enabled());
263         printd("Done.  Should have been 0, 200\n");
264
265         disable_irq();
266         cprintf("Passed enable_irqsave tests\n");
267 }
268
269 void test_bitmasks(void)
270 {
271 #define masksize 67
272         DECL_BITMASK(mask, masksize);
273         printk("size of mask %d\n", sizeof(mask));
274         CLR_BITMASK(mask, masksize);
275         PRINT_BITMASK(mask, masksize);
276         printk("cleared\n");
277         SET_BITMASK_BIT(mask, 0);
278         SET_BITMASK_BIT(mask, 11);
279         SET_BITMASK_BIT(mask, 17);
280         SET_BITMASK_BIT(mask, masksize-1);
281         printk("bits set\n");
282         PRINT_BITMASK(mask, masksize);
283         DECL_BITMASK(mask2, masksize);
284         COPY_BITMASK(mask2, mask, masksize);
285         printk("copy of original mask, should be the same as the prev\n");
286         PRINT_BITMASK(mask2, masksize);
287         CLR_BITMASK_BIT(mask, 11);
288         printk("11 cleared\n");
289         PRINT_BITMASK(mask, masksize);
290         printk("bit 17 is %d (should be 1)\n", GET_BITMASK_BIT(mask, 17));
291         printk("bit 11 is %d (should be 0)\n", GET_BITMASK_BIT(mask, 11));
292         FILL_BITMASK(mask, masksize);
293         PRINT_BITMASK(mask, masksize);
294         printk("should be all 1's, except for a few at the end\n");
295         printk("Is Clear?: %d (should be 0)\n", BITMASK_IS_CLEAR(mask,masksize));
296         CLR_BITMASK(mask, masksize);
297         PRINT_BITMASK(mask, masksize);
298         printk("Is Clear?: %d (should be 1)\n", BITMASK_IS_CLEAR(mask,masksize));
299         printk("should be cleared\n");
300 }
301
302 checklist_t* the_global_list;
303
304 void test_checklist_handler(trapframe_t *tf, void* data)
305 {
306         udelay(1000000);
307         cprintf("down_checklist(%x,%d)\n", the_global_list, core_id());
308         down_checklist(the_global_list);
309 }
310
311 void test_checklists(void)
312 {
313         INIT_CHECKLIST(a_list, MAX_NUM_CPUS);
314         the_global_list = &a_list;
315         printk("Checklist Build, mask size: %d\n", sizeof(a_list.mask.bits));
316         printk("mask\n");
317         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
318         SET_BITMASK_BIT(a_list.mask.bits, 11);
319         printk("Set bit 11\n");
320         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
321
322         CLR_BITMASK(a_list.mask.bits, a_list.mask.size);
323         INIT_CHECKLIST_MASK(a_mask, MAX_NUM_CPUS);
324         FILL_BITMASK(a_mask.bits, num_cpus);
325         //CLR_BITMASK_BIT(a_mask.bits, core_id());
326         //SET_BITMASK_BIT(a_mask.bits, 1);
327         //printk("New mask (1, 17, 25):\n");
328         printk("Created new mask, filled up to num_cpus\n");
329         PRINT_BITMASK(a_mask.bits, a_mask.size);
330         printk("committing new mask\n");
331         commit_checklist_wait(&a_list, &a_mask);
332         printk("Old mask (copied onto):\n");
333         PRINT_BITMASK(a_list.mask.bits, a_list.mask.size);
334         //smp_call_function_single(1, test_checklist_handler, 0, 0);
335
336         smp_call_function_all(test_checklist_handler, NULL, 0);
337
338         printk("Waiting on checklist\n");
339         waiton_checklist(&a_list);
340         printk("Done Waiting!\n");
341
342 }
343
344 atomic_t a, b, c;
345
346 #ifdef __IVY__
347 void test_incrementer_handler(trapframe_t *tf, atomic_t *data)
348 #else
349 void test_incrementer_handler(trapframe_t *tf, void *data)
350 #endif
351 {
352         assert(data);
353         atomic_inc(data);
354 }
355
356 void test_null_handler(trapframe_t *tf, void* data)
357 {
358         asm volatile("nop");
359 }
360
361 void test_smp_call_functions(void)
362 {
363         int i;
364         atomic_init(&a, 0);
365         atomic_init(&b, 0);
366         atomic_init(&c, 0);
367         handler_wrapper_t *waiter0 = 0, *waiter1 = 0, *waiter2 = 0, *waiter3 = 0,
368                           *waiter4 = 0, *waiter5 = 0;
369         uint8_t me = core_id();
370         printk("\nCore %d: SMP Call Self (nowait):\n", me);
371         printk("---------------------\n");
372         smp_call_function_self(test_hello_world_handler, NULL, 0);
373         printk("\nCore %d: SMP Call Self (wait):\n", me);
374         printk("---------------------\n");
375         smp_call_function_self(test_hello_world_handler, NULL, &waiter0);
376         smp_call_wait(waiter0);
377         printk("\nCore %d: SMP Call All (nowait):\n", me);
378         printk("---------------------\n");
379         smp_call_function_all(test_hello_world_handler, NULL, 0);
380         printk("\nCore %d: SMP Call All (wait):\n", me);
381         printk("---------------------\n");
382         smp_call_function_all(test_hello_world_handler, NULL, &waiter0);
383         smp_call_wait(waiter0);
384         printk("\nCore %d: SMP Call All-Else Individually, in order (nowait):\n", me);
385         printk("---------------------\n");
386         for(i = 1; i < num_cpus; i++)
387                 smp_call_function_single(i, test_hello_world_handler, NULL, 0);
388         printk("\nCore %d: SMP Call Self (wait):\n", me);
389         printk("---------------------\n");
390         smp_call_function_self(test_hello_world_handler, NULL, &waiter0);
391         smp_call_wait(waiter0);
392         printk("\nCore %d: SMP Call All-Else Individually, in order (wait):\n", me);
393         printk("---------------------\n");
394         for(i = 1; i < num_cpus; i++)
395         {
396                 smp_call_function_single(i, test_hello_world_handler, NULL, &waiter0);
397                 smp_call_wait(waiter0);
398         }
399         printk("\nTesting to see if any IPI-functions are dropped when not waiting:\n");
400         printk("A: %d, B: %d, C: %d (should be 0,0,0)\n", atomic_read(&a), atomic_read(&b), atomic_read(&c));
401         smp_call_function_all(test_incrementer_handler, &a, 0);
402         smp_call_function_all(test_incrementer_handler, &b, 0);
403         smp_call_function_all(test_incrementer_handler, &c, 0);
404         // if i can clobber a previous IPI, the interleaving might do it
405         smp_call_function_single(1 % num_cpus, test_incrementer_handler, &a, 0);
406         smp_call_function_single(2 % num_cpus, test_incrementer_handler, &b, 0);
407         smp_call_function_single(3 % num_cpus, test_incrementer_handler, &c, 0);
408         smp_call_function_single(4 % num_cpus, test_incrementer_handler, &a, 0);
409         smp_call_function_single(5 % num_cpus, test_incrementer_handler, &b, 0);
410         smp_call_function_single(6 % num_cpus, test_incrementer_handler, &c, 0);
411         smp_call_function_all(test_incrementer_handler, &a, 0);
412         smp_call_function_single(3 % num_cpus, test_incrementer_handler, &c, 0);
413         smp_call_function_all(test_incrementer_handler, &b, 0);
414         smp_call_function_single(1 % num_cpus, test_incrementer_handler, &a, 0);
415         smp_call_function_all(test_incrementer_handler, &c, 0);
416         smp_call_function_single(2 % num_cpus, test_incrementer_handler, &b, 0);
417         // wait, so we're sure the others finish before printing.
418         // without this, we could (and did) get 19,18,19, since the B_inc
419         // handler didn't finish yet
420         smp_call_function_self(test_null_handler, NULL, &waiter0);
421         // need to grab all 5 handlers (max), since the code moves to the next free.
422         smp_call_function_self(test_null_handler, NULL, &waiter1);
423         smp_call_function_self(test_null_handler, NULL, &waiter2);
424         smp_call_function_self(test_null_handler, NULL, &waiter3);
425         smp_call_function_self(test_null_handler, NULL, &waiter4);
426         smp_call_wait(waiter0);
427         smp_call_wait(waiter1);
428         smp_call_wait(waiter2);
429         smp_call_wait(waiter3);
430         smp_call_wait(waiter4);
431         printk("A: %d, B: %d, C: %d (should be 19,19,19)\n", atomic_read(&a), atomic_read(&b), atomic_read(&c));
432         printk("Attempting to deadlock by smp_calling with an outstanding wait:\n");
433         smp_call_function_self(test_null_handler, NULL, &waiter0);
434         printk("Sent one\n");
435         smp_call_function_self(test_null_handler, NULL, &waiter1);
436         printk("Sent two\n");
437         smp_call_wait(waiter0);
438         printk("Wait one\n");
439         smp_call_wait(waiter1);
440         printk("Wait two\n");
441         printk("\tMade it through!\n");
442         printk("Attempting to deadlock by smp_calling more than are available:\n");
443         printk("\tShould see an Insufficient message and a kernel warning.\n");
444         if (smp_call_function_self(test_null_handler, NULL, &waiter0))
445                 printk("\tInsufficient handlers to call function (0)\n");
446         if (smp_call_function_self(test_null_handler, NULL, &waiter1))
447                 printk("\tInsufficient handlers to call function (1)\n");
448         if (smp_call_function_self(test_null_handler, NULL, &waiter2))
449                 printk("\tInsufficient handlers to call function (2)\n");
450         if (smp_call_function_self(test_null_handler, NULL, &waiter3))
451                 printk("\tInsufficient handlers to call function (3)\n");
452         if (smp_call_function_self(test_null_handler, NULL, &waiter4))
453                 printk("\tInsufficient handlers to call function (4)\n");
454         if (smp_call_function_self(test_null_handler, NULL, &waiter5))
455                 printk("\tInsufficient handlers to call function (5)\n");
456         smp_call_wait(waiter0);
457         smp_call_wait(waiter1);
458         smp_call_wait(waiter2);
459         smp_call_wait(waiter3);
460         smp_call_wait(waiter4);
461         smp_call_wait(waiter5);
462         printk("\tMade it through!\n");
463
464         printk("Done\n");
465 }
466
467 #ifdef __i386__
468 void test_lapic_status_bit(void)
469 {
470         register_interrupt_handler(interrupt_handlers, I_TESTING,
471                                    test_incrementer_handler, &a);
472         #define NUM_IPI 100000
473         atomic_set(&a,0);
474         printk("IPIs received (should be 0): %d\n", a);
475         for(int i = 0; i < NUM_IPI; i++) {
476                 send_ipi(7, 0, I_TESTING);
477                 lapic_wait_to_send();
478         }
479         // need to wait a bit to let those IPIs get there
480         udelay(5000000);
481         printk("IPIs received (should be %d): %d\n", a, NUM_IPI);
482         // hopefully that handler never fires again.  leaving it registered for now.
483 }
484 #endif // __i386__
485
486 /******************************************************************************/
487 /*            Test Measurements: Couples with measurement.c                   */
488 // All user processes can R/W the UGDATA page
489 barrier_t*COUNT(1) bar = (barrier_t*COUNT(1))TC(UGDATA);
490 uint32_t*COUNT(1) job_to_run = (uint32_t*COUNT(1))TC(UGDATA + sizeof(barrier_t));
491 env_t* env_batch[64]; // Fairly arbitrary, just the max I plan to use.
492
493 /* Helpers for test_run_measurements */
494 static void wait_for_all_envs_to_die(void)
495 {
496         while (atomic_read(&num_envs))
497                 cpu_relax();
498 }
499
500 // this never returns.
501 static void sync_tests(int start_core, int num_threads, int job_num)
502 {
503         assert(start_core + num_threads <= num_cpus);
504         wait_for_all_envs_to_die();
505         for (int i = start_core; i < start_core + num_threads; i++)
506                 env_batch[i] = kfs_proc_create(kfs_lookup_path("roslib_measurements"));
507         lcr3(env_batch[start_core]->env_cr3);
508         init_barrier(bar, num_threads);
509         *job_to_run = job_num;
510         for (int i = start_core; i < start_core + num_threads; i++)
511                 smp_call_function_single(i, run_env_handler, env_batch[i], 0);
512         process_workqueue();
513         // we want to fake a run, to reenter manager for the next case
514         env_t *env = kfs_proc_create(kfs_lookup_path("roslib_null"));
515         smp_call_function_single(0, run_env_handler, env, 0);
516         process_workqueue();
517         panic("whoops!\n");
518 }
519
520 static void async_tests(int start_core, int num_threads, int job_num)
521 {
522         int count;
523
524         assert(start_core + num_threads <= num_cpus);
525         wait_for_all_envs_to_die();
526         for (int i = start_core; i < start_core + num_threads; i++)
527                 env_batch[i] = kfs_proc_create(kfs_lookup_path("roslib_measurements"));
528         printk("async_tests: checkpoint 0\n");
529         lcr3(env_batch[start_core]->env_cr3);
530         init_barrier(bar, num_threads);
531         printk("async_tests: checkpoint 1\n");
532         *job_to_run = job_num;
533         for (int i = start_core; i < start_core + num_threads; i++)
534                 smp_call_function_single(i, run_env_handler, env_batch[i], 0);
535         count = 0;
536         while (count > -num_threads) {
537                 count = 0;
538                 for (int i = start_core; i < start_core + num_threads; i++) {
539                         count += process_generic_syscalls(env_batch[i], 1);
540                 }
541                 cpu_relax();
542         }
543         // we want to fake a run, to reenter manager for the next case
544         env_t *env = kfs_proc_create(kfs_lookup_path("roslib_null"));
545         smp_call_function_single(0, run_env_handler, env, 0);
546         process_workqueue();
547         // this all never returns
548         panic("whoops!\n");
549 }
550
551 void test_run_measurements(uint32_t job_num)
552 {
553         switch (job_num) {
554                 case 0: // Nulls
555                         printk("Case 0:\n");
556                         async_tests(2, 1, job_num);  // start core 2, 1 core total
557                         break;
558                 case 1: // Sync
559                         printk("Case 1:\n");
560                         sync_tests(2, 1, job_num);
561                         break;
562                 case 2:
563                         printk("Case 2:\n");
564                         sync_tests(2, 2, job_num);
565                         break;
566                 case 3:
567                         printk("Case 3:\n");
568                         sync_tests(0, 3, job_num);
569                         break;
570                 case 4:
571                         printk("Case 4:\n");
572                         sync_tests(0, 4, job_num);
573                         break;
574                 case 5:
575                         printk("Case 5:\n");
576                         sync_tests(0, 5, job_num);
577                         break;
578                 case 6:
579                         printk("Case 6:\n");
580                         sync_tests(0, 6, job_num);
581                         break;
582                 case 7:
583                         printk("Case 7:\n");
584                         sync_tests(0, 7, job_num);
585                         break;
586                 case 8:
587                         printk("Case 8:\n");
588                         sync_tests(0, 8, job_num);
589                         break;
590                 case 9:
591                         printk("Case 9:\n");
592                         async_tests(2, 1, job_num);
593                         break;
594                 case 10:
595                         printk("Case 10:\n");
596                         async_tests(2, 2, job_num);
597                         break;
598                 case 11:
599                         printk("Case 11:\n");
600                         async_tests(2, 3, job_num);
601                         break;
602                 case 12:
603                         printk("Case 12:\n");
604                         async_tests(2, 4, job_num);
605                         break;
606                 case 13:
607                         printk("Case 13:\n");
608                         async_tests(2, 5, job_num);
609                         break;
610                 case 14:
611                         printk("Case 14:\n");
612                         async_tests(2, 6, job_num);
613                         break;
614                 default:
615                         warn("Invalid test number!!");
616         }
617         panic("Error in test setup!!");
618 }
619
620 /************************************************************/
621 /* ISR Handler Functions */
622
623 void test_hello_world_handler(trapframe_t *tf, void* data)
624 {
625         int trapno;
626         #if defined(__i386__)
627         trapno = tf->tf_trapno;
628         #elif defined(__sparc_v8__)
629         trapno = (tf->tbr >> 4) & 0xFF;
630         #else
631         trapno = 0;
632         #endif
633
634         cprintf("Incoming IRQ, ISR: %d on core %d with tf at 0x%08x\n",
635                 trapno, core_id(), tf);
636 }
637
638 uint32_t print_info_lock = 0;
639
640 void test_print_info_handler(trapframe_t *tf, void* data)
641 {
642         spin_lock_irqsave(&print_info_lock);
643         cprintf("----------------------------\n");
644         cprintf("This is Core %d\n", core_id());
645 #ifdef __i386__
646         cprintf("MTRR_DEF_TYPE = 0x%08x\n", read_msr(IA32_MTRR_DEF_TYPE));
647         cprintf("MTRR Phys0 Base = 0x%016llx, Mask = 0x%016llx\n",
648                 read_msr(0x200), read_msr(0x201));
649         cprintf("MTRR Phys1 Base = 0x%016llx, Mask = 0x%016llx\n",
650                 read_msr(0x202), read_msr(0x203));
651         cprintf("MTRR Phys2 Base = 0x%016llx, Mask = 0x%016llx\n",
652                 read_msr(0x204), read_msr(0x205));
653         cprintf("MTRR Phys3 Base = 0x%016llx, Mask = 0x%016llx\n",
654                 read_msr(0x206), read_msr(0x207));
655         cprintf("MTRR Phys4 Base = 0x%016llx, Mask = 0x%016llx\n",
656                 read_msr(0x208), read_msr(0x209));
657         cprintf("MTRR Phys5 Base = 0x%016llx, Mask = 0x%016llx\n",
658                 read_msr(0x20a), read_msr(0x20b));
659         cprintf("MTRR Phys6 Base = 0x%016llx, Mask = 0x%016llx\n",
660                 read_msr(0x20c), read_msr(0x20d));
661         cprintf("MTRR Phys7 Base = 0x%016llx, Mask = 0x%016llx\n",
662                 read_msr(0x20e), read_msr(0x20f));
663 #endif // __i386__
664         cprintf("----------------------------\n");
665         spin_unlock_irqsave(&print_info_lock);
666 }
667
668 void test_barrier_handler(trapframe_t *tf, void* data)
669 {
670         cprintf("Round 1: Core %d\n", core_id());
671         waiton_barrier(&test_cpu_array);
672         waiton_barrier(&test_cpu_array);
673         waiton_barrier(&test_cpu_array);
674         waiton_barrier(&test_cpu_array);
675         waiton_barrier(&test_cpu_array);
676         waiton_barrier(&test_cpu_array);
677         cprintf("Round 2: Core %d\n", core_id());
678         waiton_barrier(&test_cpu_array);
679         cprintf("Round 3: Core %d\n", core_id());
680         // uncomment to see it fucked up
681         //cprintf("Round 4: Core %d\n", core_id());
682 }
683
684 #ifdef __IVY__
685 static void test_waiting_handler(trapframe_t *tf, atomic_t *data)
686 #else
687 static void test_waiting_handler(trapframe_t *tf, void *data)
688 #endif
689 {
690         atomic_dec(data);
691 }
692
693 #ifdef __i386__
694 void test_pit(void)
695 {
696         cprintf("Starting test for PIT now (10s)\n");
697         udelay_pit(10000000);
698         cprintf("End now\n");
699         cprintf("Starting test for TSC (if stable) now (10s)\n");
700         udelay(10000000);
701         cprintf("End now\n");
702
703         cprintf("Starting test for LAPIC (if stable) now (10s)\n");
704         enable_irq();
705         lapic_set_timer(10000000, FALSE);
706
707         atomic_t waiting;
708         atomic_init(&waiting, 1);
709         register_interrupt_handler(interrupt_handlers, I_TESTING,
710                                    test_waiting_handler, &waiting);
711         while(atomic_read(&waiting))
712                 cpu_relax();
713         cprintf("End now\n");
714 }
715
716 void test_circ_buffer(void)
717 {
718         int arr[5] = {0, 1, 2, 3, 4};
719
720         for (int i = 0; i < 5; i++) {
721                 FOR_CIRC_BUFFER(i, 5, j)
722                         printk("Starting with current = %d, each value = %d\n", i, j);
723         }
724         return;
725 }
726
727 #ifdef __IVY__
728 void test_am_handler(trapframe_t* tf, uint32_t srcid, uint32_t a0, uint32_t a1,
729                      uint32_t a2)
730 #else
731 void test_am_handler(trapframe_t* tf, uint32_t srcid, void * a0, void * a1,
732                      void * a2)
733 #endif
734 {
735         printk("Received AM on core %d from core %d: arg0= 0x%08x, arg1 = "
736                "0x%08x, arg2 = 0x%08x\n", core_id(), srcid, a0, a1, a2);
737         return;
738 }
739
740 void test_active_messages(void)
741 {
742         // basic tests, make sure we can handle a wraparound and that the error
743         // messages work.
744         printk("sending NUM_ACTIVE_MESSAGES to core 1, sending (#,deadbeef,0)\n");
745         for (int i = 0; i < NUM_ACTIVE_MESSAGES; i++)
746 #ifdef __IVY__
747                 while (send_active_message(1, test_am_handler, i, 0xdeadbeef, 0))
748                         cpu_relax();
749 #else
750                 while (send_active_message(1, test_am_handler, (void *)i,
751                                            (void *)0xdeadbeef, (void *)0))
752                         cpu_relax();
753 #endif
754         udelay(5000000);
755         printk("sending 2*NUM_ACTIVE_MESSAGES to core 1, sending (#,cafebabe,0)\n");
756         for (int i = 0; i < 2*NUM_ACTIVE_MESSAGES; i++)
757 #ifdef __IVY__
758                 while (send_active_message(1, test_am_handler, i, 0xdeadbeef, 0))
759                         cpu_relax();
760 #else
761                 while (send_active_message(1, test_am_handler, (void *)i,
762                                            (void *)0xdeadbeef, (void *)0))
763                         cpu_relax();
764 #endif
765         udelay(5000000);
766         return;
767 }
768 #endif // __i386__