mlx4: Use netif_stats for ifstat
[akaros.git] / kern / drivers / net / mlx4 / en_netdev.c
1 /*
2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33
34 #include <linux_compat.h>
35 #include <linux/mlx4/driver.h>
36 #include <linux/mlx4/device.h>
37 #include <linux/mlx4/cmd.h>
38 #include <linux/mlx4/cq.h>
39
40 #include "mlx4_en.h"
41 #include "en_port.h"
42
43 int mlx4_en_setup_tc(struct ether *dev, uint8_t up)
44 {
45         panic("Disabled");
46 #if 0 // AKAROS_PORT
47         struct mlx4_en_priv *priv = netdev_priv(dev);
48         int i;
49         unsigned int offset = 0;
50
51         if (up && up != MLX4_EN_NUM_UP)
52                 return -EINVAL;
53
54         netdev_set_num_tc(dev, up);
55
56         /* Partition Tx queues evenly amongst UP's */
57         for (i = 0; i < up; i++) {
58                 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
59                 offset += priv->num_tx_rings_p_up;
60         }
61
62         return 0;
63 #endif
64 }
65
66 #ifdef CONFIG_NET_RX_BUSY_POLL
67 /* must be called with local_bh_disable()d */
68 static int mlx4_en_low_latency_recv(struct napi_struct *napi)
69 {
70         struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
71         struct ether *dev = cq->dev;
72         struct mlx4_en_priv *priv = netdev_priv(dev);
73         struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring];
74         int done;
75
76         if (!priv->port_up)
77                 return LL_FLUSH_FAILED;
78
79         if (!mlx4_en_cq_lock_poll(cq))
80                 return LL_FLUSH_BUSY;
81
82         done = mlx4_en_process_rx_cq(dev, cq, 4);
83         if (likely(done))
84                 rx_ring->cleaned += done;
85         else
86                 rx_ring->misses++;
87
88         mlx4_en_cq_unlock_poll(cq);
89
90         return done;
91 }
92 #endif  /* CONFIG_NET_RX_BUSY_POLL */
93
94 #ifdef CONFIG_RFS_ACCEL
95
96 struct mlx4_en_filter {
97         struct list_head next;
98         struct work_struct work;
99
100         uint8_t     ip_proto;
101         __be32 src_ip;
102         __be32 dst_ip;
103         __be16 src_port;
104         __be16 dst_port;
105
106         int rxq_index;
107         struct mlx4_en_priv *priv;
108         uint32_t flow_id;                       /* RFS infrastructure id */
109         int id;                         /* mlx4_en driver id */
110         uint64_t reg_id;                        /* Flow steering API id */
111         uint8_t activated;                      /* Used to prevent expiry before filter
112                                          * is attached
113                                          */
114         struct hlist_node filter_chain;
115 };
116
117 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
118
119 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(uint8_t ip_proto)
120 {
121         switch (ip_proto) {
122         case IPPROTO_UDP:
123                 return MLX4_NET_TRANS_RULE_ID_UDP;
124         case IPPROTO_TCP:
125                 return MLX4_NET_TRANS_RULE_ID_TCP;
126         default:
127                 return MLX4_NET_TRANS_RULE_NUM;
128         }
129 };
130
131 static void mlx4_en_filter_work(struct work_struct *work)
132 {
133         struct mlx4_en_filter *filter = container_of(work,
134                                                      struct mlx4_en_filter,
135                                                      work);
136         struct mlx4_en_priv *priv = filter->priv;
137         struct mlx4_spec_list spec_tcp_udp = {
138                 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
139                 {
140                         .tcp_udp = {
141                                 .dst_port = filter->dst_port,
142                                 .dst_port_msk = (__force __be16)-1,
143                                 .src_port = filter->src_port,
144                                 .src_port_msk = (__force __be16)-1,
145                         },
146                 },
147         };
148         struct mlx4_spec_list spec_ip = {
149                 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
150                 {
151                         .ipv4 = {
152                                 .dst_ip = filter->dst_ip,
153                                 .dst_ip_msk = (__force __be32)-1,
154                                 .src_ip = filter->src_ip,
155                                 .src_ip_msk = (__force __be32)-1,
156                         },
157                 },
158         };
159         struct mlx4_spec_list spec_eth = {
160                 .id = MLX4_NET_TRANS_RULE_ID_ETH,
161         };
162         struct mlx4_net_trans_rule rule = {
163                 .list = LIST_HEAD_INIT(rule.list),
164                 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
165                 .exclusive = 1,
166                 .allow_loopback = 1,
167                 .promisc_mode = MLX4_FS_REGULAR,
168                 .port = priv->port,
169                 .priority = MLX4_DOMAIN_RFS,
170         };
171         int rc;
172         __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
173
174         if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
175                 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
176                         filter->ip_proto);
177                 goto ignore;
178         }
179         list_add_tail(&spec_eth.list, &rule.list);
180         list_add_tail(&spec_ip.list, &rule.list);
181         list_add_tail(&spec_tcp_udp.list, &rule.list);
182
183         rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
184         memcpy(spec_eth.eth.dst_mac, priv->dev->ea, Eaddrlen);
185         memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, Eaddrlen);
186
187         filter->activated = 0;
188
189         if (filter->reg_id) {
190                 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
191                 if (rc && rc != -ENOENT)
192                         en_err(priv, "Error detaching flow. rc = %d\n", rc);
193         }
194
195         rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
196         if (rc)
197                 en_err(priv, "Error attaching flow. err = %d\n", rc);
198
199 ignore:
200         mlx4_en_filter_rfs_expire(priv);
201
202         filter->activated = 1;
203 }
204
205 static inline struct hlist_head *
206 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
207                    __be16 src_port, __be16 dst_port)
208 {
209         unsigned long l;
210         int bucket_idx;
211
212         l = (__force unsigned long)src_port |
213             ((__force unsigned long)dst_port << 2);
214         l ^= (__force unsigned long)(src_ip ^ dst_ip);
215
216         bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
217
218         return &priv->filter_hash[bucket_idx];
219 }
220
221 static struct mlx4_en_filter *
222 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
223                      __be32 dst_ip, uint8_t ip_proto, __be16 src_port,
224                      __be16 dst_port, uint32_t flow_id)
225 {
226         struct mlx4_en_filter *filter = NULL;
227
228         filter = kzmalloc(sizeof(struct mlx4_en_filter), 0);
229         if (!filter)
230                 return NULL;
231
232         filter->priv = priv;
233         filter->rxq_index = rxq_index;
234         INIT_WORK(&filter->work, mlx4_en_filter_work);
235
236         filter->src_ip = src_ip;
237         filter->dst_ip = dst_ip;
238         filter->ip_proto = ip_proto;
239         filter->src_port = src_port;
240         filter->dst_port = dst_port;
241
242         filter->flow_id = flow_id;
243
244         filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
245
246         list_add_tail(&filter->next, &priv->filters);
247         hlist_add_head(&filter->filter_chain,
248                        filter_hash_bucket(priv, src_ip, dst_ip, src_port,
249                                           dst_port));
250
251         return filter;
252 }
253
254 static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
255 {
256         struct mlx4_en_priv *priv = filter->priv;
257         int rc;
258
259         list_del(&filter->next);
260
261         rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
262         if (rc && rc != -ENOENT)
263                 en_err(priv, "Error detaching flow. rc = %d\n", rc);
264
265         kfree(filter);
266 }
267
268 static inline struct mlx4_en_filter *
269 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
270                     uint8_t ip_proto, __be16 src_port, __be16 dst_port)
271 {
272         struct mlx4_en_filter *filter;
273         struct mlx4_en_filter *ret = NULL;
274
275         hlist_for_each_entry(filter,
276                              filter_hash_bucket(priv, src_ip, dst_ip,
277                                                 src_port, dst_port),
278                              filter_chain) {
279                 if (filter->src_ip == src_ip &&
280                     filter->dst_ip == dst_ip &&
281                     filter->ip_proto == ip_proto &&
282                     filter->src_port == src_port &&
283                     filter->dst_port == dst_port) {
284                         ret = filter;
285                         break;
286                 }
287         }
288
289         return ret;
290 }
291
292 static int
293 mlx4_en_filter_rfs(struct ether *net_dev, const struct sk_buff *skb,
294                    uint16_t rxq_index, uint32_t flow_id)
295 {
296         struct mlx4_en_priv *priv = netdev_priv(net_dev);
297         struct mlx4_en_filter *filter;
298         const struct iphdr *ip;
299         const __be16 *ports;
300         uint8_t ip_proto;
301         __be32 src_ip;
302         __be32 dst_ip;
303         __be16 src_port;
304         __be16 dst_port;
305         int nhoff = skb_network_offset(skb);
306         int ret = 0;
307
308         if (skb->protocol != cpu_to_be16(ETH_P_IP))
309                 return -EPROTONOSUPPORT;
310
311         ip = (const struct iphdr *)(skb->data + nhoff);
312         if (ip_is_fragment(ip))
313                 return -EPROTONOSUPPORT;
314
315         if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
316                 return -EPROTONOSUPPORT;
317         ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
318
319         ip_proto = ip->protocol;
320         src_ip = ip->saddr;
321         dst_ip = ip->daddr;
322         src_port = ports[0];
323         dst_port = ports[1];
324
325         spin_lock(&priv->filters_lock);
326         filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
327                                      src_port, dst_port);
328         if (filter) {
329                 if (filter->rxq_index == rxq_index)
330                         goto out;
331
332                 filter->rxq_index = rxq_index;
333         } else {
334                 filter = mlx4_en_filter_alloc(priv, rxq_index,
335                                               src_ip, dst_ip, ip_proto,
336                                               src_port, dst_port, flow_id);
337                 if (!filter) {
338                         ret = -ENOMEM;
339                         goto err;
340                 }
341         }
342
343         queue_work(priv->mdev->workqueue, &filter->work);
344
345 out:
346         ret = filter->id;
347 err:
348         spin_unlock(&priv->filters_lock);
349
350         return ret;
351 }
352
353 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
354 {
355         struct mlx4_en_filter *filter, *tmp;
356         LIST_HEAD(del_list);
357
358         spin_lock(&priv->filters_lock);
359         list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
360                 list_move(&filter->next, &del_list);
361                 hlist_del(&filter->filter_chain);
362         }
363         spin_unlock(&priv->filters_lock);
364
365         list_for_each_entry_safe(filter, tmp, &del_list, next) {
366                 cancel_work_sync(&filter->work);
367                 mlx4_en_filter_free(filter);
368         }
369 }
370
371 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
372 {
373         struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
374         LIST_HEAD(del_list);
375         int i = 0;
376
377         spin_lock(&priv->filters_lock);
378         list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
379                 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
380                         break;
381
382                 if (filter->activated &&
383                     !work_pending(&filter->work) &&
384                     rps_may_expire_flow(priv->dev,
385                                         filter->rxq_index, filter->flow_id,
386                                         filter->id)) {
387                         list_move(&filter->next, &del_list);
388                         hlist_del(&filter->filter_chain);
389                 } else
390                         last_filter = filter;
391
392                 i++;
393         }
394
395         if (last_filter && (&last_filter->next != priv->filters.next))
396                 list_move(&priv->filters, &last_filter->next);
397
398         spin_unlock(&priv->filters_lock);
399
400         list_for_each_entry_safe(filter, tmp, &del_list, next)
401                 mlx4_en_filter_free(filter);
402 }
403 #endif
404
405 static int mlx4_en_vlan_rx_add_vid(struct ether *dev,
406                                    __be16 proto, uint16_t vid)
407 {
408         struct mlx4_en_priv *priv = netdev_priv(dev);
409         struct mlx4_en_dev *mdev = priv->mdev;
410         int err;
411         int idx;
412
413         en_dbg(HW, priv, "adding VLAN:%d\n", vid);
414
415         set_bit(vid, priv->active_vlans);
416
417         /* Add VID to port VLAN filter */
418         qlock(&mdev->state_lock);
419         if (mdev->device_up && priv->port_up) {
420                 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
421                 if (err)
422                         en_err(priv, "Failed configuring VLAN filter\n");
423         }
424         if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
425                 en_dbg(HW, priv, "failed adding vlan %d\n", vid);
426         qunlock(&mdev->state_lock);
427
428         return 0;
429 }
430
431 static int mlx4_en_vlan_rx_kill_vid(struct ether *dev,
432                                     __be16 proto, uint16_t vid)
433 {
434         struct mlx4_en_priv *priv = netdev_priv(dev);
435         struct mlx4_en_dev *mdev = priv->mdev;
436         int err;
437
438         en_dbg(HW, priv, "Killing VID:%d\n", vid);
439
440         clear_bit(vid, priv->active_vlans);
441
442         /* Remove VID from port VLAN filter */
443         qlock(&mdev->state_lock);
444         mlx4_unregister_vlan(mdev->dev, priv->port, vid);
445
446         if (mdev->device_up && priv->port_up) {
447                 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
448                 if (err)
449                         en_err(priv, "Failed configuring VLAN filter\n");
450         }
451         qunlock(&mdev->state_lock);
452
453         return 0;
454 }
455
456 static void mlx4_en_u64_to_mac(unsigned char dst_mac[Eaddrlen + 2],
457                                uint64_t src_mac)
458 {
459         int i;
460         for (i = Eaddrlen - 1; i >= 0; --i) {
461                 dst_mac[i] = src_mac & 0xff;
462                 src_mac >>= 8;
463         }
464         memset(&dst_mac[Eaddrlen], 0, 2);
465 }
466
467
468 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
469                                     int qpn, uint64_t *reg_id)
470 {
471         int err;
472
473         if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
474             priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
475                 return 0; /* do nothing */
476
477         err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
478                                     MLX4_DOMAIN_NIC, reg_id);
479         if (err) {
480                 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
481                 return err;
482         }
483         en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
484         return 0;
485 }
486
487
488 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
489                                 unsigned char *mac, int *qpn,
490                                 uint64_t *reg_id)
491 {
492         struct mlx4_en_dev *mdev = priv->mdev;
493         struct mlx4_dev *dev = mdev->dev;
494         int err;
495
496         switch (dev->caps.steering_mode) {
497         case MLX4_STEERING_MODE_B0: {
498                 struct mlx4_qp qp;
499                 uint8_t gid[16] = {0};
500
501                 qp.qpn = *qpn;
502                 memcpy(&gid[10], mac, Eaddrlen);
503                 gid[5] = priv->port;
504
505                 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
506                 break;
507         }
508         case MLX4_STEERING_MODE_DEVICE_MANAGED: {
509                 struct mlx4_spec_list spec_eth = { {NULL} };
510                 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
511
512                 struct mlx4_net_trans_rule rule = {
513                         .queue_mode = MLX4_NET_TRANS_Q_FIFO,
514                         .exclusive = 0,
515                         .allow_loopback = 1,
516                         .promisc_mode = MLX4_FS_REGULAR,
517                         .priority = MLX4_DOMAIN_NIC,
518                 };
519
520                 rule.port = priv->port;
521                 rule.qpn = *qpn;
522                 INIT_LIST_HEAD(&rule.list);
523
524                 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
525                 memcpy(spec_eth.eth.dst_mac, mac, Eaddrlen);
526                 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, Eaddrlen);
527                 list_add_tail(&spec_eth.list, &rule.list);
528
529                 err = mlx4_flow_attach(dev, &rule, reg_id);
530                 break;
531         }
532         default:
533                 return -EINVAL;
534         }
535         if (err)
536                 en_warn(priv, "Failed Attaching Unicast\n");
537
538         return err;
539 }
540
541 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
542                                      unsigned char *mac, int qpn,
543                                      uint64_t reg_id)
544 {
545         struct mlx4_en_dev *mdev = priv->mdev;
546         struct mlx4_dev *dev = mdev->dev;
547
548         switch (dev->caps.steering_mode) {
549         case MLX4_STEERING_MODE_B0: {
550                 struct mlx4_qp qp;
551                 uint8_t gid[16] = {0};
552
553                 qp.qpn = qpn;
554                 memcpy(&gid[10], mac, Eaddrlen);
555                 gid[5] = priv->port;
556
557                 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
558                 break;
559         }
560         case MLX4_STEERING_MODE_DEVICE_MANAGED: {
561                 mlx4_flow_detach(dev, reg_id);
562                 break;
563         }
564         default:
565                 en_err(priv, "Invalid steering mode.\n");
566         }
567 }
568
569 static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
570 {
571         struct mlx4_en_dev *mdev = priv->mdev;
572         struct mlx4_dev *dev = mdev->dev;
573         struct mlx4_mac_entry *entry;
574         int index = 0;
575         int err = 0;
576         uint64_t reg_id = 0;
577         int *qpn = &priv->base_qpn;
578         uint64_t mac = mlx4_mac_to_u64(priv->dev->ea);
579
580 #if 0 // AKAROS_PORT
581         en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
582                priv->dev->ea);
583 #else
584         en_dbg(DRV, priv, "Registering MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
585                priv->dev->ea[0], priv->dev->ea[1], priv->dev->ea[2],
586                priv->dev->ea[3], priv->dev->ea[4], priv->dev->ea[5]);
587 #endif
588         index = mlx4_register_mac(dev, priv->port, mac);
589         if (index < 0) {
590                 err = index;
591                 en_err(priv, "Failed adding MAC: %pM\n",
592                        priv->dev->ea);
593                 return err;
594         }
595
596         if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
597                 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
598                 *qpn = base_qpn + index;
599                 return 0;
600         }
601
602         err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
603         en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
604         if (err) {
605                 en_err(priv, "Failed to reserve qp for mac registration\n");
606                 goto qp_err;
607         }
608
609         err = mlx4_en_uc_steer_add(priv, priv->dev->ea, qpn, &reg_id);
610         if (err)
611                 goto steer_err;
612
613 #if 0 // AKAROS_PORT
614         err = mlx4_en_tunnel_steer_add(priv, priv->dev->ea, *qpn,
615                                        &priv->tunnel_reg_id);
616         if (err)
617                 goto tunnel_err;
618 #endif
619
620         entry = kmalloc(sizeof(*entry), MEM_WAIT);
621         if (!entry) {
622                 err = -ENOMEM;
623                 goto alloc_err;
624         }
625         memcpy(entry->mac, priv->dev->ea, sizeof(entry->mac));
626         memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
627         entry->reg_id = reg_id;
628
629 #if 0 // AKAROS_PORT
630         hlist_add_head_rcu(&entry->hlist,
631                            &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
632 #else
633         hlist_add_head(&entry->hlist,
634                        &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
635         /* FIXME why is rcu significant? */
636 #endif
637
638         return 0;
639
640 alloc_err:
641         if (priv->tunnel_reg_id)
642                 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
643 #if 0 // AKAROS_PORT
644 tunnel_err:
645         mlx4_en_uc_steer_release(priv, priv->dev->ea, *qpn, reg_id);
646 #endif
647
648 steer_err:
649         mlx4_qp_release_range(dev, *qpn, 1);
650
651 qp_err:
652         mlx4_unregister_mac(dev, priv->port, mac);
653         return err;
654 }
655
656 static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
657 {
658         panic("Disabled");
659 #if 0 // AKAROS_PORT
660         struct mlx4_en_dev *mdev = priv->mdev;
661         struct mlx4_dev *dev = mdev->dev;
662         int qpn = priv->base_qpn;
663         uint64_t mac;
664
665         if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
666                 mac = mlx4_mac_to_u64(priv->dev->ea);
667                 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
668                        priv->dev->ea);
669                 mlx4_unregister_mac(dev, priv->port, mac);
670         } else {
671                 struct mlx4_mac_entry *entry;
672                 struct hlist_node *tmp;
673                 struct hlist_head *bucket;
674                 unsigned int i;
675
676                 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
677                         bucket = &priv->mac_hash[i];
678                         hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
679                                 mac = mlx4_mac_to_u64(entry->mac);
680                                 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
681                                        entry->mac);
682                                 mlx4_en_uc_steer_release(priv, entry->mac,
683                                                          qpn, entry->reg_id);
684
685                                 mlx4_unregister_mac(dev, priv->port, mac);
686                                 hlist_del_rcu(&entry->hlist);
687                                 kfree_rcu(entry, rcu);
688                         }
689                 }
690
691                 if (priv->tunnel_reg_id) {
692                         mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
693                         priv->tunnel_reg_id = 0;
694                 }
695
696                 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
697                        priv->port, qpn);
698                 mlx4_qp_release_range(dev, qpn, 1);
699                 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
700         }
701 #endif
702 }
703
704 #if 0 // AKAROS_PORT
705 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
706                                unsigned char *new_mac, unsigned char *prev_mac)
707 {
708         struct mlx4_en_dev *mdev = priv->mdev;
709         struct mlx4_dev *dev = mdev->dev;
710         int err = 0;
711         uint64_t new_mac_u64 = mlx4_mac_to_u64(new_mac);
712
713         if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
714                 struct hlist_head *bucket;
715                 unsigned int mac_hash;
716                 struct mlx4_mac_entry *entry;
717                 struct hlist_node *tmp;
718                 uint64_t prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
719
720                 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
721                 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
722                         if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
723                                 mlx4_en_uc_steer_release(priv, entry->mac,
724                                                          qpn, entry->reg_id);
725                                 mlx4_unregister_mac(dev, priv->port,
726                                                     prev_mac_u64);
727                                 hlist_del_rcu(&entry->hlist);
728                                 synchronize_rcu();
729                                 memcpy(entry->mac, new_mac, Eaddrlen);
730                                 entry->reg_id = 0;
731                                 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
732                                 hlist_add_head_rcu(&entry->hlist,
733                                                    &priv->mac_hash[mac_hash]);
734                                 mlx4_register_mac(dev, priv->port, new_mac_u64);
735                                 err = mlx4_en_uc_steer_add(priv, new_mac,
736                                                            &qpn,
737                                                            &entry->reg_id);
738                                 if (err)
739                                         return err;
740                                 if (priv->tunnel_reg_id) {
741                                         mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
742                                         priv->tunnel_reg_id = 0;
743                                 }
744                                 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
745                                                                &priv->tunnel_reg_id);
746                                 return err;
747                         }
748                 }
749                 return -EINVAL;
750         }
751
752         return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
753 }
754
755 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
756                               unsigned char new_mac[Eaddrlen + 2])
757 {
758         int err = 0;
759
760         if (priv->port_up) {
761                 /* Remove old MAC and insert the new one */
762                 err = mlx4_en_replace_mac(priv, priv->base_qpn,
763                                           new_mac, priv->current_mac);
764                 if (err)
765                         en_err(priv, "Failed changing HW MAC address\n");
766         } else
767                 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
768
769         if (!err)
770                 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
771
772         return err;
773 }
774
775 static int mlx4_en_set_mac(struct ether *dev, void *addr)
776 {
777         struct mlx4_en_priv *priv = netdev_priv(dev);
778         struct mlx4_en_dev *mdev = priv->mdev;
779         struct sockaddr *saddr = addr;
780         unsigned char new_mac[Eaddrlen + 2];
781         int err;
782
783         if (!is_valid_ether_addr(saddr->sa_data))
784                 return -EADDRNOTAVAIL;
785
786         qlock(&mdev->state_lock);
787         memcpy(new_mac, saddr->sa_data, Eaddrlen);
788         err = mlx4_en_do_set_mac(priv, new_mac);
789         if (!err)
790                 memcpy(dev->ea, saddr->sa_data, Eaddrlen);
791         qunlock(&mdev->state_lock);
792
793         return err;
794 }
795 #endif
796
797 static void mlx4_en_clear_list(struct ether *dev)
798 {
799         struct mlx4_en_priv *priv = netdev_priv(dev);
800         struct mlx4_en_mc_list *tmp, *mc_to_del;
801
802         list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
803                 list_del(&mc_to_del->list);
804                 kfree(mc_to_del);
805         }
806 }
807
808 #if 0 // AKAROS_PORT
809 static void mlx4_en_cache_mclist(struct ether *dev)
810 {
811         struct mlx4_en_priv *priv = netdev_priv(dev);
812         struct netdev_hw_addr *ha;
813         struct mlx4_en_mc_list *tmp;
814
815         mlx4_en_clear_list(dev);
816         netdev_for_each_mc_addr(ha, dev) {
817                 tmp = kzmalloc(sizeof(struct mlx4_en_mc_list), 0);
818                 if (!tmp) {
819                         mlx4_en_clear_list(dev);
820                         return;
821                 }
822                 memcpy(tmp->addr, ha->addr, Eaddrlen);
823                 list_add_tail(&tmp->list, &priv->mc_list);
824         }
825 }
826
827 static void update_mclist_flags(struct mlx4_en_priv *priv,
828                                 struct list_head *dst,
829                                 struct list_head *src)
830 {
831         struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
832         bool found;
833
834         /* Find all the entries that should be removed from dst,
835          * These are the entries that are not found in src
836          */
837         list_for_each_entry(dst_tmp, dst, list) {
838                 found = false;
839                 list_for_each_entry(src_tmp, src, list) {
840                         if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
841                                 found = true;
842                                 break;
843                         }
844                 }
845                 if (!found)
846                         dst_tmp->action = MCLIST_REM;
847         }
848
849         /* Add entries that exist in src but not in dst
850          * mark them as need to add
851          */
852         list_for_each_entry(src_tmp, src, list) {
853                 found = false;
854                 list_for_each_entry(dst_tmp, dst, list) {
855                         if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
856                                 dst_tmp->action = MCLIST_NONE;
857                                 found = true;
858                                 break;
859                         }
860                 }
861                 if (!found) {
862                         new_mc = kmemdup(src_tmp,
863                                          sizeof(struct mlx4_en_mc_list),
864                                          MEM_WAIT);
865                         if (!new_mc)
866                                 return;
867
868                         new_mc->action = MCLIST_ADD;
869                         list_add_tail(&new_mc->list, dst);
870                 }
871         }
872 }
873
874 static void mlx4_en_set_rx_mode(struct ether *dev)
875 {
876         struct mlx4_en_priv *priv = netdev_priv(dev);
877
878         if (!priv->port_up)
879                 return;
880
881         queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
882 }
883
884 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
885                                      struct mlx4_en_dev *mdev)
886 {
887         int err = 0;
888
889         if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
890                 if (netif_msg_rx_status(priv))
891                         en_warn(priv, "Entering promiscuous mode\n");
892                 priv->flags |= MLX4_EN_FLAG_PROMISC;
893
894                 /* Enable promiscouos mode */
895                 switch (mdev->dev->caps.steering_mode) {
896                 case MLX4_STEERING_MODE_DEVICE_MANAGED:
897                         err = mlx4_flow_steer_promisc_add(mdev->dev,
898                                                           priv->port,
899                                                           priv->base_qpn,
900                                                           MLX4_FS_ALL_DEFAULT);
901                         if (err)
902                                 en_err(priv, "Failed enabling promiscuous mode\n");
903                         priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
904                         break;
905
906                 case MLX4_STEERING_MODE_B0:
907                         err = mlx4_unicast_promisc_add(mdev->dev,
908                                                        priv->base_qpn,
909                                                        priv->port);
910                         if (err)
911                                 en_err(priv, "Failed enabling unicast promiscuous mode\n");
912
913                         /* Add the default qp number as multicast
914                          * promisc
915                          */
916                         if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
917                                 err = mlx4_multicast_promisc_add(mdev->dev,
918                                                                  priv->base_qpn,
919                                                                  priv->port);
920                                 if (err)
921                                         en_err(priv, "Failed enabling multicast promiscuous mode\n");
922                                 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
923                         }
924                         break;
925
926                 case MLX4_STEERING_MODE_A0:
927                         err = mlx4_SET_PORT_qpn_calc(mdev->dev,
928                                                      priv->port,
929                                                      priv->base_qpn,
930                                                      1);
931                         if (err)
932                                 en_err(priv, "Failed enabling promiscuous mode\n");
933                         break;
934                 }
935
936                 /* Disable port multicast filter (unconditionally) */
937                 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
938                                           0, MLX4_MCAST_DISABLE);
939                 if (err)
940                         en_err(priv, "Failed disabling multicast filter\n");
941         }
942 }
943
944 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
945                                        struct mlx4_en_dev *mdev)
946 {
947         int err = 0;
948
949         if (netif_msg_rx_status(priv))
950                 en_warn(priv, "Leaving promiscuous mode\n");
951         priv->flags &= ~MLX4_EN_FLAG_PROMISC;
952
953         /* Disable promiscouos mode */
954         switch (mdev->dev->caps.steering_mode) {
955         case MLX4_STEERING_MODE_DEVICE_MANAGED:
956                 err = mlx4_flow_steer_promisc_remove(mdev->dev,
957                                                      priv->port,
958                                                      MLX4_FS_ALL_DEFAULT);
959                 if (err)
960                         en_err(priv, "Failed disabling promiscuous mode\n");
961                 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
962                 break;
963
964         case MLX4_STEERING_MODE_B0:
965                 err = mlx4_unicast_promisc_remove(mdev->dev,
966                                                   priv->base_qpn,
967                                                   priv->port);
968                 if (err)
969                         en_err(priv, "Failed disabling unicast promiscuous mode\n");
970                 /* Disable Multicast promisc */
971                 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
972                         err = mlx4_multicast_promisc_remove(mdev->dev,
973                                                             priv->base_qpn,
974                                                             priv->port);
975                         if (err)
976                                 en_err(priv, "Failed disabling multicast promiscuous mode\n");
977                         priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
978                 }
979                 break;
980
981         case MLX4_STEERING_MODE_A0:
982                 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
983                                              priv->port,
984                                              priv->base_qpn, 0);
985                 if (err)
986                         en_err(priv, "Failed disabling promiscuous mode\n");
987                 break;
988         }
989 }
990
991 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
992                                  struct ether *dev,
993                                  struct mlx4_en_dev *mdev)
994 {
995         struct mlx4_en_mc_list *mclist, *tmp;
996         uint64_t mcast_addr = 0;
997         uint8_t mc_list[16] = {0};
998         int err = 0;
999
1000         /* Enable/disable the multicast filter according to IFF_ALLMULTI */
1001         if (dev->flags & IFF_ALLMULTI) {
1002                 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1003                                           0, MLX4_MCAST_DISABLE);
1004                 if (err)
1005                         en_err(priv, "Failed disabling multicast filter\n");
1006
1007                 /* Add the default qp number as multicast promisc */
1008                 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
1009                         switch (mdev->dev->caps.steering_mode) {
1010                         case MLX4_STEERING_MODE_DEVICE_MANAGED:
1011                                 err = mlx4_flow_steer_promisc_add(mdev->dev,
1012                                                                   priv->port,
1013                                                                   priv->base_qpn,
1014                                                                   MLX4_FS_MC_DEFAULT);
1015                                 break;
1016
1017                         case MLX4_STEERING_MODE_B0:
1018                                 err = mlx4_multicast_promisc_add(mdev->dev,
1019                                                                  priv->base_qpn,
1020                                                                  priv->port);
1021                                 break;
1022
1023                         case MLX4_STEERING_MODE_A0:
1024                                 break;
1025                         }
1026                         if (err)
1027                                 en_err(priv, "Failed entering multicast promisc mode\n");
1028                         priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
1029                 }
1030         } else {
1031                 /* Disable Multicast promisc */
1032                 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1033                         switch (mdev->dev->caps.steering_mode) {
1034                         case MLX4_STEERING_MODE_DEVICE_MANAGED:
1035                                 err = mlx4_flow_steer_promisc_remove(mdev->dev,
1036                                                                      priv->port,
1037                                                                      MLX4_FS_MC_DEFAULT);
1038                                 break;
1039
1040                         case MLX4_STEERING_MODE_B0:
1041                                 err = mlx4_multicast_promisc_remove(mdev->dev,
1042                                                                     priv->base_qpn,
1043                                                                     priv->port);
1044                                 break;
1045
1046                         case MLX4_STEERING_MODE_A0:
1047                                 break;
1048                         }
1049                         if (err)
1050                                 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1051                         priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1052                 }
1053
1054                 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1055                                           0, MLX4_MCAST_DISABLE);
1056                 if (err)
1057                         en_err(priv, "Failed disabling multicast filter\n");
1058
1059                 /* Flush mcast filter and init it with broadcast address */
1060                 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
1061                                     1, MLX4_MCAST_CONFIG);
1062
1063                 /* Update multicast list - we cache all addresses so they won't
1064                  * change while HW is updated holding the command semaphor */
1065                 qlock(&dev->qlock);
1066                 mlx4_en_cache_mclist(dev);
1067                 qunlock(&dev->qlock);
1068                 list_for_each_entry(mclist, &priv->mc_list, list) {
1069                         mcast_addr = mlx4_mac_to_u64(mclist->addr);
1070                         mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
1071                                             mcast_addr, 0, MLX4_MCAST_CONFIG);
1072                 }
1073                 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1074                                           0, MLX4_MCAST_ENABLE);
1075                 if (err)
1076                         en_err(priv, "Failed enabling multicast filter\n");
1077
1078                 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
1079                 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1080                         if (mclist->action == MCLIST_REM) {
1081                                 /* detach this address and delete from list */
1082                                 memcpy(&mc_list[10], mclist->addr, Eaddrlen);
1083                                 mc_list[5] = priv->port;
1084                                 err = mlx4_multicast_detach(mdev->dev,
1085                                                             &priv->rss_map.indir_qp,
1086                                                             mc_list,
1087                                                             MLX4_PROT_ETH,
1088                                                             mclist->reg_id);
1089                                 if (err)
1090                                         en_err(priv, "Fail to detach multicast address\n");
1091
1092                                 if (mclist->tunnel_reg_id) {
1093                                         err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
1094                                         if (err)
1095                                                 en_err(priv, "Failed to detach multicast address\n");
1096                                 }
1097
1098                                 /* remove from list */
1099                                 list_del(&mclist->list);
1100                                 kfree(mclist);
1101                         } else if (mclist->action == MCLIST_ADD) {
1102                                 /* attach the address */
1103                                 memcpy(&mc_list[10], mclist->addr, Eaddrlen);
1104                                 /* needed for B0 steering support */
1105                                 mc_list[5] = priv->port;
1106                                 err = mlx4_multicast_attach(mdev->dev,
1107                                                             &priv->rss_map.indir_qp,
1108                                                             mc_list,
1109                                                             priv->port, 0,
1110                                                             MLX4_PROT_ETH,
1111                                                             &mclist->reg_id);
1112                                 if (err)
1113                                         en_err(priv, "Fail to attach multicast address\n");
1114
1115                                 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
1116                                                                &mclist->tunnel_reg_id);
1117                                 if (err)
1118                                         en_err(priv, "Failed to attach multicast address\n");
1119                         }
1120                 }
1121         }
1122 }
1123
1124 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1125                                  struct ether *dev,
1126                                  struct mlx4_en_dev *mdev)
1127 {
1128         struct netdev_hw_addr *ha;
1129         struct mlx4_mac_entry *entry;
1130         struct hlist_node *tmp;
1131         bool found;
1132         uint64_t mac;
1133         int err = 0;
1134         struct hlist_head *bucket;
1135         unsigned int i;
1136         int removed = 0;
1137         uint32_t prev_flags;
1138
1139         /* Note that we do not need to protect our mac_hash traversal with rcu,
1140          * since all modification code is protected by mdev->state_lock
1141          */
1142
1143         /* find what to remove */
1144         for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1145                 bucket = &priv->mac_hash[i];
1146                 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1147                         found = false;
1148                         netdev_for_each_uc_addr(ha, dev) {
1149                                 if (ether_addr_equal_64bits(entry->mac,
1150                                                             ha->addr)) {
1151                                         found = true;
1152                                         break;
1153                                 }
1154                         }
1155
1156                         /* MAC address of the port is not in uc list */
1157                         if (ether_addr_equal_64bits(entry->mac,
1158                                                     priv->current_mac))
1159                                 found = true;
1160
1161                         if (!found) {
1162                                 mac = mlx4_mac_to_u64(entry->mac);
1163                                 mlx4_en_uc_steer_release(priv, entry->mac,
1164                                                          priv->base_qpn,
1165                                                          entry->reg_id);
1166                                 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1167
1168                                 hlist_del_rcu(&entry->hlist);
1169                                 kfree_rcu(entry, rcu);
1170                                 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1171                                        entry->mac, priv->port);
1172                                 ++removed;
1173                         }
1174                 }
1175         }
1176
1177         /* if we didn't remove anything, there is no use in trying to add
1178          * again once we are in a forced promisc mode state
1179          */
1180         if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1181                 return;
1182
1183         prev_flags = priv->flags;
1184         priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1185
1186         /* find what to add */
1187         netdev_for_each_uc_addr(ha, dev) {
1188                 found = false;
1189                 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1190                 hlist_for_each_entry(entry, bucket, hlist) {
1191                         if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1192                                 found = true;
1193                                 break;
1194                         }
1195                 }
1196
1197                 if (!found) {
1198                         entry = kmalloc(sizeof(*entry), MEM_WAIT);
1199                         if (!entry) {
1200                                 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1201                                        ha->addr, priv->port);
1202                                 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1203                                 break;
1204                         }
1205                         mac = mlx4_mac_to_u64(ha->addr);
1206                         memcpy(entry->mac, ha->addr, Eaddrlen);
1207                         err = mlx4_register_mac(mdev->dev, priv->port, mac);
1208                         if (err < 0) {
1209                                 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1210                                        ha->addr, priv->port, err);
1211                                 kfree(entry);
1212                                 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1213                                 break;
1214                         }
1215                         err = mlx4_en_uc_steer_add(priv, ha->addr,
1216                                                    &priv->base_qpn,
1217                                                    &entry->reg_id);
1218                         if (err) {
1219                                 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1220                                        ha->addr, priv->port, err);
1221                                 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1222                                 kfree(entry);
1223                                 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1224                                 break;
1225                         } else {
1226                                 unsigned int mac_hash;
1227                                 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1228                                        ha->addr, priv->port);
1229                                 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1230                                 bucket = &priv->mac_hash[mac_hash];
1231                                 hlist_add_head_rcu(&entry->hlist, bucket);
1232                         }
1233                 }
1234         }
1235
1236         if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1237                 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1238                         priv->port);
1239         } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1240                 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1241                         priv->port);
1242         }
1243 }
1244 #endif
1245
1246 static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1247 {
1248         struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1249                                                  rx_mode_task);
1250         struct mlx4_en_dev *mdev = priv->mdev;
1251         struct ether *dev = priv->dev;
1252
1253         qlock(&mdev->state_lock);
1254         if (!mdev->device_up) {
1255                 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1256                 goto out;
1257         }
1258         if (!priv->port_up) {
1259                 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1260                 goto out;
1261         }
1262
1263         if (!netif_carrier_ok(dev)) {
1264                 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1265                         if (priv->port_state.link_state) {
1266                                 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1267                                 netif_carrier_on(dev);
1268                                 en_dbg(LINK, priv, "Link Up\n");
1269                         }
1270                 }
1271         }
1272
1273 #if 0 // AKAROS_PORT
1274         if (dev->priv_flags & IFF_UNICAST_FLT)
1275                 mlx4_en_do_uc_filter(priv, dev, mdev);
1276
1277         /* Promsicuous mode: disable all filters */
1278         if ((dev->flags & IFF_PROMISC) ||
1279             (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
1280                 mlx4_en_set_promisc_mode(priv, mdev);
1281                 goto out;
1282         }
1283
1284         /* Not in promiscuous mode */
1285         if (priv->flags & MLX4_EN_FLAG_PROMISC)
1286                 mlx4_en_clear_promisc_mode(priv, mdev);
1287
1288         mlx4_en_do_multicast(priv, dev, mdev);
1289 #endif
1290 out:
1291         qunlock(&mdev->state_lock);
1292 }
1293
1294 #ifdef CONFIG_NET_POLL_CONTROLLER
1295 static void mlx4_en_netpoll(struct ether *dev)
1296 {
1297         struct mlx4_en_priv *priv = netdev_priv(dev);
1298         struct mlx4_en_cq *cq;
1299         int i;
1300
1301         for (i = 0; i < priv->rx_ring_num; i++) {
1302                 cq = priv->rx_cq[i];
1303                 napi_schedule(&cq->napi);
1304         }
1305 }
1306 #endif
1307
1308 static void mlx4_en_tx_timeout(struct ether *dev)
1309 {
1310         panic("Disabled");
1311 #if 0 // AKAROS_PORT
1312         struct mlx4_en_priv *priv = netdev_priv(dev);
1313         struct mlx4_en_dev *mdev = priv->mdev;
1314         int i;
1315
1316         if (netif_msg_timer(priv))
1317                 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
1318
1319         for (i = 0; i < priv->tx_ring_num; i++) {
1320                 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
1321                         continue;
1322                 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
1323                         i, priv->tx_ring[i]->qpn, priv->tx_ring[i]->cqn,
1324                         priv->tx_ring[i]->cons, priv->tx_ring[i]->prod);
1325         }
1326
1327         priv->port_stats.tx_timeout++;
1328         en_dbg(DRV, priv, "Scheduling watchdog\n");
1329         queue_work(mdev->workqueue, &priv->watchdog_task);
1330 #endif
1331 }
1332
1333
1334 struct netif_stats *mlx4_en_get_stats(struct ether *dev)
1335 {
1336         struct mlx4_en_priv *priv = netdev_priv(dev);
1337
1338         spin_lock(&priv->stats_lock);
1339         memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
1340         spin_unlock(&priv->stats_lock);
1341
1342         return &priv->ret_stats;
1343 }
1344
1345 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1346 {
1347         struct mlx4_en_cq *cq;
1348         int i;
1349
1350         /* If we haven't received a specific coalescing setting
1351          * (module param), we set the moderation parameters as follows:
1352          * - moder_cnt is set to the number of mtu sized packets to
1353          *   satisfy our coalescing target.
1354          * - moder_time is set to a fixed value.
1355          */
1356         priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
1357         priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
1358         priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1359         priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
1360         en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1361                priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
1362
1363         /* Setup cq moderation params */
1364         for (i = 0; i < priv->rx_ring_num; i++) {
1365                 cq = priv->rx_cq[i];
1366                 cq->moder_cnt = priv->rx_frames;
1367                 cq->moder_time = priv->rx_usecs;
1368                 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1369                 priv->last_moder_packets[i] = 0;
1370                 priv->last_moder_bytes[i] = 0;
1371         }
1372
1373         for (i = 0; i < priv->tx_ring_num; i++) {
1374                 cq = priv->tx_cq[i];
1375                 cq->moder_cnt = priv->tx_frames;
1376                 cq->moder_time = priv->tx_usecs;
1377         }
1378
1379         /* Reset auto-moderation params */
1380         priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1381         priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1382         priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1383         priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1384         priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
1385         priv->adaptive_rx_coal = 1;
1386         priv->last_moder_jiffies = 0;
1387         priv->last_moder_tx_packets = 0;
1388 }
1389
1390 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1391 {
1392         unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
1393         struct mlx4_en_cq *cq;
1394         unsigned long packets;
1395         unsigned long rate;
1396         unsigned long avg_pkt_size;
1397         unsigned long rx_packets;
1398         unsigned long rx_bytes;
1399         unsigned long rx_pkt_diff;
1400         int moder_time;
1401         int ring, err;
1402
1403         if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1404                 return;
1405
1406         for (ring = 0; ring < priv->rx_ring_num; ring++) {
1407                 spin_lock(&priv->stats_lock);
1408                 rx_packets = priv->rx_ring[ring]->packets;
1409                 rx_bytes = priv->rx_ring[ring]->bytes;
1410                 spin_unlock(&priv->stats_lock);
1411
1412                 rx_pkt_diff = ((unsigned long) (rx_packets -
1413                                 priv->last_moder_packets[ring]));
1414                 packets = rx_pkt_diff;
1415                 rate = packets * HZ / period;
1416                 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
1417                                 priv->last_moder_bytes[ring])) / packets : 0;
1418
1419                 /* Apply auto-moderation only when packet rate
1420                  * exceeds a rate that it matters */
1421                 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1422                     avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
1423                         if (rate < priv->pkt_rate_low)
1424                                 moder_time = priv->rx_usecs_low;
1425                         else if (rate > priv->pkt_rate_high)
1426                                 moder_time = priv->rx_usecs_high;
1427                         else
1428                                 moder_time = (rate - priv->pkt_rate_low) *
1429                                         (priv->rx_usecs_high - priv->rx_usecs_low) /
1430                                         (priv->pkt_rate_high - priv->pkt_rate_low) +
1431                                         priv->rx_usecs_low;
1432                 } else {
1433                         moder_time = priv->rx_usecs_low;
1434                 }
1435
1436                 if (moder_time != priv->last_moder_time[ring]) {
1437                         priv->last_moder_time[ring] = moder_time;
1438                         cq = priv->rx_cq[ring];
1439                         cq->moder_time = moder_time;
1440                         cq->moder_cnt = priv->rx_frames;
1441                         err = mlx4_en_set_cq_moder(priv, cq);
1442                         if (err)
1443                                 en_err(priv, "Failed modifying moderation for cq:%d\n",
1444                                        ring);
1445                 }
1446                 priv->last_moder_packets[ring] = rx_packets;
1447                 priv->last_moder_bytes[ring] = rx_bytes;
1448         }
1449
1450         priv->last_moder_jiffies = jiffies;
1451 }
1452
1453 static void mlx4_en_do_get_stats(struct work_struct *work)
1454 {
1455         struct delayed_work *delay = to_delayed_work(work);
1456         struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1457                                                  stats_task);
1458         struct mlx4_en_dev *mdev = priv->mdev;
1459         int err;
1460
1461         qlock(&mdev->state_lock);
1462         if (mdev->device_up) {
1463                 if (priv->port_up) {
1464                         err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1465                         if (err)
1466                                 en_dbg(HW, priv, "Could not update stats\n");
1467
1468                         mlx4_en_auto_moderation(priv);
1469                 }
1470
1471                 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1472         }
1473 #if 0 // AKAROS_PORT
1474         if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1475                 mlx4_en_do_set_mac(priv, priv->current_mac);
1476                 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1477         }
1478 #endif
1479         qunlock(&mdev->state_lock);
1480 }
1481
1482 /* mlx4_en_service_task - Run service task for tasks that needed to be done
1483  * periodically
1484  */
1485 static void mlx4_en_service_task(struct work_struct *work)
1486 {
1487         struct delayed_work *delay = to_delayed_work(work);
1488         struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1489                                                  service_task);
1490         struct mlx4_en_dev *mdev = priv->mdev;
1491
1492         qlock(&mdev->state_lock);
1493         if (mdev->device_up) {
1494 #if 0 // AKAROS_PORT
1495                 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1496                         mlx4_en_ptp_overflow_check(mdev);
1497 #endif
1498
1499                 mlx4_en_recover_from_oom(priv);
1500                 queue_delayed_work(mdev->workqueue, &priv->service_task,
1501                                    SERVICE_TASK_DELAY);
1502         }
1503         qunlock(&mdev->state_lock);
1504 }
1505
1506 static void mlx4_en_linkstate(struct work_struct *work)
1507 {
1508         struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1509                                                  linkstate_task);
1510         struct mlx4_en_dev *mdev = priv->mdev;
1511         int linkstate = priv->link_state;
1512
1513         qlock(&mdev->state_lock);
1514         /* If observable port state changed set carrier state and
1515          * report to system log */
1516         if (priv->last_link_state != linkstate) {
1517                 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
1518                         en_info(priv, "Link Down\n");
1519                         netif_carrier_off(priv->dev);
1520                 } else {
1521                         en_info(priv, "Link Up\n");
1522                         netif_carrier_on(priv->dev);
1523                 }
1524         }
1525         priv->last_link_state = linkstate;
1526         qunlock(&mdev->state_lock);
1527 }
1528
1529 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1530 {
1531         struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
1532         int numa_node = priv->mdev->dev->numa_node;
1533
1534         if (!zalloc_cpumask_var(&ring->affinity_mask, MEM_WAIT))
1535                 return -ENOMEM;
1536
1537         cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
1538                         ring->affinity_mask);
1539         return 0;
1540 }
1541
1542 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1543 {
1544         panic("Disabled");
1545 #if 0 // AKAROS_PORT
1546         free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
1547 #endif
1548 }
1549
1550 int mlx4_en_start_port(struct ether *dev)
1551 {
1552         struct mlx4_en_priv *priv = netdev_priv(dev);
1553         struct mlx4_en_dev *mdev = priv->mdev;
1554         struct mlx4_en_cq *cq;
1555         struct mlx4_en_tx_ring *tx_ring;
1556         int rx_index = 0;
1557         int tx_index = 0;
1558         int err = 0;
1559         int i;
1560         int j;
1561         uint8_t mc_list[16] = {0};
1562
1563         if (priv->port_up) {
1564                 en_dbg(DRV, priv, "start port called while port already up\n");
1565                 return 0;
1566         }
1567
1568         INIT_LIST_HEAD(&priv->mc_list);
1569         INIT_LIST_HEAD(&priv->curr_list);
1570 #if 0 // AKAROS_PORT
1571         INIT_LIST_HEAD(&priv->ethtool_list);
1572         memset(&priv->ethtool_rules[0], 0,
1573                sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
1574 #endif
1575
1576         /* Calculate Rx buf size */
1577         dev->mtu = MIN(dev->mtu, priv->max_mtu);
1578         mlx4_en_calc_rx_buf(dev);
1579         en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
1580
1581         /* Configure rx cq's and rings */
1582         err = mlx4_en_activate_rx_rings(priv);
1583         if (err) {
1584                 en_err(priv, "Failed to activate RX rings\n");
1585                 return err;
1586         }
1587         for (i = 0; i < priv->rx_ring_num; i++) {
1588                 cq = priv->rx_cq[i];
1589
1590                 mlx4_en_cq_init_lock(cq);
1591
1592                 err = mlx4_en_init_affinity_hint(priv, i);
1593                 if (err) {
1594                         en_err(priv, "Failed preparing IRQ affinity hint\n");
1595                         goto cq_err;
1596                 }
1597
1598                 err = mlx4_en_activate_cq(priv, cq, i);
1599                 if (err) {
1600                         en_err(priv, "Failed activating Rx CQ\n");
1601                         mlx4_en_free_affinity_hint(priv, i);
1602                         goto cq_err;
1603                 }
1604
1605                 for (j = 0; j < cq->size; j++) {
1606                         struct mlx4_cqe *cqe = NULL;
1607
1608                         cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
1609                               priv->cqe_factor;
1610                         cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1611                 }
1612
1613                 err = mlx4_en_set_cq_moder(priv, cq);
1614                 if (err) {
1615                         en_err(priv, "Failed setting cq moderation parameters\n");
1616                         mlx4_en_deactivate_cq(priv, cq);
1617                         mlx4_en_free_affinity_hint(priv, i);
1618                         goto cq_err;
1619                 }
1620                 mlx4_en_arm_cq(priv, cq);
1621                 priv->rx_ring[i]->cqn = cq->mcq.cqn;
1622                 ++rx_index;
1623         }
1624
1625         /* Set qp number */
1626         en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
1627         err = mlx4_en_get_qp(priv);
1628         if (err) {
1629                 en_err(priv, "Failed getting eth qp\n");
1630                 goto cq_err;
1631         }
1632         mdev->mac_removed[priv->port] = 0;
1633
1634         err = mlx4_en_config_rss_steer(priv);
1635         if (err) {
1636                 en_err(priv, "Failed configuring rss steering\n");
1637                 goto mac_err;
1638         }
1639
1640         err = mlx4_en_create_drop_qp(priv);
1641         if (err)
1642                 goto rss_err;
1643
1644         /* Configure tx cq's and rings */
1645         for (i = 0; i < priv->tx_ring_num; i++) {
1646                 /* Configure cq */
1647                 cq = priv->tx_cq[i];
1648                 err = mlx4_en_activate_cq(priv, cq, i);
1649                 if (err) {
1650                         en_err(priv, "Failed allocating Tx CQ\n");
1651                         goto tx_err;
1652                 }
1653                 err = mlx4_en_set_cq_moder(priv, cq);
1654                 if (err) {
1655                         en_err(priv, "Failed setting cq moderation parameters\n");
1656                         mlx4_en_deactivate_cq(priv, cq);
1657                         goto tx_err;
1658                 }
1659                 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
1660                 cq->buf->wqe_index = cpu_to_be16(0xffff);
1661
1662                 /* Configure ring */
1663                 tx_ring = priv->tx_ring[i];
1664                 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
1665                         i / priv->num_tx_rings_p_up);
1666                 if (err) {
1667                         en_err(priv, "Failed allocating Tx ring\n");
1668                         mlx4_en_deactivate_cq(priv, cq);
1669                         goto tx_err;
1670                 }
1671 #if 0 // AKAROS_PORT
1672                 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
1673 #else
1674                 tx_ring->tx_queue = 0; /* TODO multi-queue support. */
1675 #endif
1676
1677                 /* Arm CQ for TX completions */
1678                 mlx4_en_arm_cq(priv, cq);
1679
1680                 /* Set initial ownership of all Tx TXBBs to SW (1) */
1681                 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1682                         *((uint32_t *) (tx_ring->buf + j)) = 0xffffffff;
1683                 ++tx_index;
1684         }
1685
1686         /* Configure port */
1687         err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1688                                     priv->rx_skb_size + ETH_FCS_LEN,
1689                                     priv->prof->tx_pause,
1690                                     priv->prof->tx_ppp,
1691                                     priv->prof->rx_pause,
1692                                     priv->prof->rx_ppp);
1693         if (err) {
1694                 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1695                        priv->port, err);
1696                 goto tx_err;
1697         }
1698         /* Set default qp number */
1699         err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1700         if (err) {
1701                 en_err(priv, "Failed setting default qp numbers\n");
1702                 goto tx_err;
1703         }
1704
1705 #if 0 // AKAROS_PORT
1706         if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
1707                 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
1708                 if (err) {
1709                         en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
1710                                err);
1711                         goto tx_err;
1712                 }
1713         }
1714 #endif
1715
1716         /* Init port */
1717         en_dbg(HW, priv, "Initializing port\n");
1718         err = mlx4_INIT_PORT(mdev->dev, priv->port);
1719         if (err) {
1720                 en_err(priv, "Failed Initializing port\n");
1721                 goto tx_err;
1722         }
1723
1724         /* Attach rx QP to bradcast address */
1725         eth_broadcast_addr(&mc_list[10]);
1726         mc_list[5] = priv->port; /* needed for B0 steering support */
1727         if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
1728                                   priv->port, 0, MLX4_PROT_ETH,
1729                                   &priv->broadcast_id))
1730                 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1731
1732         /* Must redo promiscuous mode setup. */
1733         priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1734
1735         /* Schedule multicast task to populate multicast list */
1736         queue_work(mdev->workqueue, &priv->rx_mode_task);
1737
1738 #ifdef CONFIG_MLX4_EN_VXLAN
1739         if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1740                 vxlan_get_rx_port(dev);
1741 #endif
1742         priv->port_up = true;
1743 #if 0 // AKAROS_PORT
1744         netif_tx_start_all_queues(dev);
1745         netif_device_attach(dev);
1746 #endif
1747
1748         return 0;
1749
1750 tx_err:
1751         while (tx_index--) {
1752                 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
1753                 mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
1754         }
1755         mlx4_en_destroy_drop_qp(priv);
1756 rss_err:
1757         mlx4_en_release_rss_steer(priv);
1758 mac_err:
1759         mlx4_en_put_qp(priv);
1760 cq_err:
1761         while (rx_index--) {
1762                 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
1763                 mlx4_en_free_affinity_hint(priv, rx_index);
1764         }
1765         for (i = 0; i < priv->rx_ring_num; i++)
1766                 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1767
1768         return err; /* need to close devices */
1769 }
1770
1771
1772 void mlx4_en_stop_port(struct ether *dev, int detach)
1773 {
1774         panic("Disabled");
1775 #if 0 // AKAROS_PORT
1776         struct mlx4_en_priv *priv = netdev_priv(dev);
1777         struct mlx4_en_dev *mdev = priv->mdev;
1778         struct mlx4_en_mc_list *mclist, *tmp;
1779 #if 0 // AKAROS_PORT
1780         struct ethtool_flow_id *flow, *tmp_flow;
1781 #endif
1782         int i;
1783         uint8_t mc_list[16] = {0};
1784
1785         if (!priv->port_up) {
1786                 en_dbg(DRV, priv, "stop port called while port already down\n");
1787                 return;
1788         }
1789
1790         /* close port*/
1791         mlx4_CLOSE_PORT(mdev->dev, priv->port);
1792
1793         /* Synchronize with tx routine */
1794         netif_tx_lock_bh(dev);
1795         if (detach)
1796                 netif_device_detach(dev);
1797         netif_tx_stop_all_queues(dev);
1798         netif_tx_unlock_bh(dev);
1799
1800         netif_tx_disable(dev);
1801
1802         /* Set port as not active */
1803         priv->port_up = false;
1804
1805         /* Promsicuous mode */
1806         if (mdev->dev->caps.steering_mode ==
1807             MLX4_STEERING_MODE_DEVICE_MANAGED) {
1808                 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1809                                  MLX4_EN_FLAG_MC_PROMISC);
1810                 mlx4_flow_steer_promisc_remove(mdev->dev,
1811                                                priv->port,
1812                                                MLX4_FS_ALL_DEFAULT);
1813                 mlx4_flow_steer_promisc_remove(mdev->dev,
1814                                                priv->port,
1815                                                MLX4_FS_MC_DEFAULT);
1816         } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1817                 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1818
1819                 /* Disable promiscouos mode */
1820                 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1821                                             priv->port);
1822
1823                 /* Disable Multicast promisc */
1824                 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1825                         mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1826                                                       priv->port);
1827                         priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1828                 }
1829         }
1830
1831         /* Detach All multicasts */
1832         eth_broadcast_addr(&mc_list[10]);
1833         mc_list[5] = priv->port; /* needed for B0 steering support */
1834         mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
1835                               MLX4_PROT_ETH, priv->broadcast_id);
1836         list_for_each_entry(mclist, &priv->curr_list, list) {
1837                 memcpy(&mc_list[10], mclist->addr, Eaddrlen);
1838                 mc_list[5] = priv->port;
1839                 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
1840                                       mc_list, MLX4_PROT_ETH, mclist->reg_id);
1841                 if (mclist->tunnel_reg_id)
1842                         mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
1843         }
1844         mlx4_en_clear_list(dev);
1845         list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1846                 list_del(&mclist->list);
1847                 kfree(mclist);
1848         }
1849
1850         /* Flush multicast filter */
1851         mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1852
1853 #if 0 // AKAROS_PORT
1854         /* Remove flow steering rules for the port*/
1855         if (mdev->dev->caps.steering_mode ==
1856             MLX4_STEERING_MODE_DEVICE_MANAGED) {
1857                 ASSERT_RTNL();
1858                 list_for_each_entry_safe(flow, tmp_flow,
1859                                          &priv->ethtool_list, list) {
1860                         mlx4_flow_detach(mdev->dev, flow->id);
1861                         list_del(&flow->list);
1862                 }
1863         }
1864 #endif
1865
1866         mlx4_en_destroy_drop_qp(priv);
1867
1868         /* Free TX Rings */
1869         for (i = 0; i < priv->tx_ring_num; i++) {
1870                 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
1871                 mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
1872         }
1873         kthread_usleep(1000 * 10);
1874
1875         for (i = 0; i < priv->tx_ring_num; i++)
1876                 mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
1877
1878         /* Free RSS qps */
1879         mlx4_en_release_rss_steer(priv);
1880
1881         /* Unregister Mac address for the port */
1882         mlx4_en_put_qp(priv);
1883         if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
1884                 mdev->mac_removed[priv->port] = 1;
1885
1886         /* Free RX Rings */
1887         for (i = 0; i < priv->rx_ring_num; i++) {
1888                 struct mlx4_en_cq *cq = priv->rx_cq[i];
1889
1890                 local_bh_disable();
1891                 while (!mlx4_en_cq_lock_napi(cq)) {
1892                         pr_info("CQ %d locked\n", i);
1893                         mdelay(1);
1894                 }
1895                 local_bh_enable();
1896
1897                 napi_synchronize(&cq->napi);
1898                 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1899                 mlx4_en_deactivate_cq(priv, cq);
1900
1901                 mlx4_en_free_affinity_hint(priv, i);
1902         }
1903 #endif
1904 }
1905
1906 static void mlx4_en_restart(struct work_struct *work)
1907 {
1908         struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1909                                                  watchdog_task);
1910         struct mlx4_en_dev *mdev = priv->mdev;
1911         struct ether *dev = priv->dev;
1912
1913         en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1914
1915         qlock(&mdev->state_lock);
1916         if (priv->port_up) {
1917                 mlx4_en_stop_port(dev, 1);
1918                 if (mlx4_en_start_port(dev))
1919                         en_err(priv, "Failed restarting port %d\n", priv->port);
1920         }
1921         qunlock(&mdev->state_lock);
1922 }
1923
1924 static void mlx4_en_clear_stats(struct ether *dev)
1925 {
1926         struct mlx4_en_priv *priv = netdev_priv(dev);
1927         struct mlx4_en_dev *mdev = priv->mdev;
1928         int i;
1929
1930         if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
1931                 en_dbg(HW, priv, "Failed dumping statistics\n");
1932
1933         memset(&priv->stats, 0, sizeof(priv->stats));
1934         memset(&priv->pstats, 0, sizeof(priv->pstats));
1935         memset(&priv->pkstats, 0, sizeof(priv->pkstats));
1936         memset(&priv->port_stats, 0, sizeof(priv->port_stats));
1937         memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
1938         memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
1939         memset(&priv->rx_priority_flowstats, 0,
1940                sizeof(priv->rx_priority_flowstats));
1941         memset(&priv->tx_priority_flowstats, 0,
1942                sizeof(priv->tx_priority_flowstats));
1943
1944         for (i = 0; i < priv->tx_ring_num; i++) {
1945                 priv->tx_ring[i]->bytes = 0;
1946                 priv->tx_ring[i]->packets = 0;
1947                 priv->tx_ring[i]->tx_csum = 0;
1948         }
1949         for (i = 0; i < priv->rx_ring_num; i++) {
1950                 priv->rx_ring[i]->bytes = 0;
1951                 priv->rx_ring[i]->packets = 0;
1952                 priv->rx_ring[i]->csum_ok = 0;
1953                 priv->rx_ring[i]->csum_none = 0;
1954                 priv->rx_ring[i]->csum_complete = 0;
1955         }
1956 }
1957
1958 int mlx4_en_open(struct ether *dev)
1959 {
1960         struct mlx4_en_priv *priv = netdev_priv(dev);
1961         struct mlx4_en_dev *mdev = priv->mdev;
1962         int err = 0;
1963
1964         qlock(&mdev->state_lock);
1965
1966         if (!mdev->device_up) {
1967                 en_err(priv, "Cannot open - device down/disabled\n");
1968                 err = -EBUSY;
1969                 goto out;
1970         }
1971
1972         /* Reset HW statistics and SW counters */
1973         mlx4_en_clear_stats(dev);
1974
1975         err = mlx4_en_start_port(dev);
1976         if (err)
1977                 en_err(priv, "Failed starting port:%d\n", priv->port);
1978
1979 out:
1980         qunlock(&mdev->state_lock);
1981         return err;
1982 }
1983
1984
1985 static int mlx4_en_close(struct ether *dev)
1986 {
1987         struct mlx4_en_priv *priv = netdev_priv(dev);
1988         struct mlx4_en_dev *mdev = priv->mdev;
1989
1990         en_dbg(IFDOWN, priv, "Close port called\n");
1991
1992         qlock(&mdev->state_lock);
1993
1994         mlx4_en_stop_port(dev, 0);
1995         netif_carrier_off(dev);
1996
1997         qunlock(&mdev->state_lock);
1998         return 0;
1999 }
2000
2001 void mlx4_en_free_resources(struct mlx4_en_priv *priv)
2002 {
2003         int i;
2004
2005 #ifdef CONFIG_RFS_ACCEL
2006         free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
2007         priv->dev->rx_cpu_rmap = NULL;
2008 #endif
2009
2010         for (i = 0; i < priv->tx_ring_num; i++) {
2011                 if (priv->tx_ring && priv->tx_ring[i])
2012                         mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
2013                 if (priv->tx_cq && priv->tx_cq[i])
2014                         mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
2015         }
2016
2017         for (i = 0; i < priv->rx_ring_num; i++) {
2018                 if (priv->rx_ring[i])
2019                         mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2020                                 priv->prof->rx_ring_size, priv->stride);
2021                 if (priv->rx_cq[i])
2022                         mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2023         }
2024
2025         if (priv->base_tx_qpn) {
2026                 mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
2027                 priv->base_tx_qpn = 0;
2028         }
2029 }
2030
2031 int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
2032 {
2033         struct mlx4_en_port_profile *prof = priv->prof;
2034         int i;
2035         int node;
2036
2037         /* Create tx Rings */
2038         for (i = 0; i < priv->tx_ring_num; i++) {
2039                 node = cpu_to_node(i % num_online_cpus());
2040                 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
2041                                       prof->tx_ring_size, i, TX, node))
2042                         goto err;
2043
2044                 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
2045                                            prof->tx_ring_size, TXBB_SIZE,
2046                                            node, i))
2047                         goto err;
2048         }
2049
2050         /* Create rx Rings */
2051         for (i = 0; i < priv->rx_ring_num; i++) {
2052                 node = cpu_to_node(i % num_online_cpus());
2053                 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
2054                                       prof->rx_ring_size, i, RX, node))
2055                         goto err;
2056
2057                 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
2058                                            prof->rx_ring_size, priv->stride,
2059                                            node))
2060                         goto err;
2061         }
2062
2063 #ifdef CONFIG_RFS_ACCEL
2064         if (priv->mdev->dev->caps.comp_pool) {
2065                 priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
2066                 if (!priv->dev->rx_cpu_rmap)
2067                         goto err;
2068         }
2069 #endif
2070
2071         return 0;
2072
2073 err:
2074         en_err(priv, "Failed to allocate NIC resources\n");
2075         for (i = 0; i < priv->rx_ring_num; i++) {
2076                 if (priv->rx_ring[i])
2077                         mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2078                                                 prof->rx_ring_size,
2079                                                 priv->stride);
2080                 if (priv->rx_cq[i])
2081                         mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2082         }
2083         for (i = 0; i < priv->tx_ring_num; i++) {
2084                 if (priv->tx_ring[i])
2085                         mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
2086                 if (priv->tx_cq[i])
2087                         mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
2088         }
2089         return -ENOMEM;
2090 }
2091
2092
2093 void mlx4_en_destroy_netdev(struct ether *dev)
2094 {
2095         panic("Disabled");
2096 #if 0 // AKAROS_PORT
2097         struct mlx4_en_priv *priv = netdev_priv(dev);
2098         struct mlx4_en_dev *mdev = priv->mdev;
2099
2100         en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
2101
2102         /* Unregister device - this will close the port if it was up */
2103         if (priv->registered)
2104                 unregister_netdev(dev);
2105
2106         if (priv->allocated)
2107                 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
2108
2109         cancel_delayed_work(&priv->stats_task);
2110         cancel_delayed_work(&priv->service_task);
2111         /* flush any pending task for this netdev */
2112         flush_workqueue(mdev->workqueue);
2113
2114         /* Detach the netdev so tasks would not attempt to access it */
2115         qlock(&mdev->state_lock);
2116         mdev->pndev[priv->port] = NULL;
2117         mdev->upper[priv->port] = NULL;
2118         qunlock(&mdev->state_lock);
2119
2120         mlx4_en_free_resources(priv);
2121
2122         kfree(priv->tx_ring);
2123         kfree(priv->tx_cq);
2124
2125         free_netdev(dev);
2126 #endif
2127 }
2128
2129 #if 0 // AKAROS_PORT
2130 static int mlx4_en_change_mtu(struct ether *dev, int new_mtu)
2131 {
2132         struct mlx4_en_priv *priv = netdev_priv(dev);
2133         struct mlx4_en_dev *mdev = priv->mdev;
2134         int err = 0;
2135
2136         en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
2137                  dev->mtu, new_mtu);
2138
2139         if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
2140                 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
2141                 return -EPERM;
2142         }
2143         dev->mtu = new_mtu;
2144
2145         if (netif_running(dev)) {
2146                 qlock(&mdev->state_lock);
2147                 if (!mdev->device_up) {
2148                         /* NIC is probably restarting - let watchdog task reset
2149                          * the port */
2150                         en_dbg(DRV, priv, "Change MTU called with card down!?\n");
2151                 } else {
2152                         mlx4_en_stop_port(dev, 1);
2153                         err = mlx4_en_start_port(dev);
2154                         if (err) {
2155                                 en_err(priv, "Failed restarting port:%d\n",
2156                                          priv->port);
2157                                 queue_work(mdev->workqueue, &priv->watchdog_task);
2158                         }
2159                 }
2160                 qunlock(&mdev->state_lock);
2161         }
2162         return 0;
2163 }
2164
2165 static int mlx4_en_hwtstamp_set(struct ether *dev, struct ifreq *ifr)
2166 {
2167         struct mlx4_en_priv *priv = netdev_priv(dev);
2168         struct mlx4_en_dev *mdev = priv->mdev;
2169         struct hwtstamp_config config;
2170
2171         if (memcpy_from_user(current, &config, ifr->ifr_data, sizeof(config)))
2172                 return -EFAULT;
2173
2174         /* reserved for future extensions */
2175         if (config.flags)
2176                 return -EINVAL;
2177
2178         /* device doesn't support time stamping */
2179         if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
2180                 return -EINVAL;
2181
2182         /* TX HW timestamp */
2183         switch (config.tx_type) {
2184         case HWTSTAMP_TX_OFF:
2185         case HWTSTAMP_TX_ON:
2186                 break;
2187         default:
2188                 return -ERANGE;
2189         }
2190
2191         /* RX HW timestamp */
2192         switch (config.rx_filter) {
2193         case HWTSTAMP_FILTER_NONE:
2194                 break;
2195         case HWTSTAMP_FILTER_ALL:
2196         case HWTSTAMP_FILTER_SOME:
2197         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2198         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2199         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2200         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2201         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2202         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2203         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2204         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2205         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2206         case HWTSTAMP_FILTER_PTP_V2_EVENT:
2207         case HWTSTAMP_FILTER_PTP_V2_SYNC:
2208         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2209                 config.rx_filter = HWTSTAMP_FILTER_ALL;
2210                 break;
2211         default:
2212                 return -ERANGE;
2213         }
2214
2215         if (mlx4_en_reset_config(dev, config, dev->feat)) {
2216                 config.tx_type = HWTSTAMP_TX_OFF;
2217                 config.rx_filter = HWTSTAMP_FILTER_NONE;
2218         }
2219
2220         return memcpy_to_user(current, ifr->ifr_data, &config, sizeof(config)) ? -EFAULT : 0;
2221 }
2222
2223 static int mlx4_en_hwtstamp_get(struct ether *dev, struct ifreq *ifr)
2224 {
2225         struct mlx4_en_priv *priv = netdev_priv(dev);
2226
2227         return memcpy_to_user(current, ifr->ifr_data, &priv->hwtstamp_config,
2228                               sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
2229 }
2230
2231 static int mlx4_en_ioctl(struct ether *dev, struct ifreq *ifr, int cmd)
2232 {
2233         switch (cmd) {
2234         case SIOCSHWTSTAMP:
2235                 return mlx4_en_hwtstamp_set(dev, ifr);
2236         case SIOCGHWTSTAMP:
2237                 return mlx4_en_hwtstamp_get(dev, ifr);
2238         default:
2239                 return -EOPNOTSUPP;
2240         }
2241 }
2242
2243 static int mlx4_en_set_features(struct ether *netdev,
2244                                 netdev_features_t features)
2245 {
2246         struct mlx4_en_priv *priv = netdev_priv(netdev);
2247         bool reset = false;
2248         int ret = 0;
2249
2250         if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
2251                 en_info(priv, "Turn %s RX-FCS\n",
2252                         (features & NETIF_F_RXFCS) ? "ON" : "OFF");
2253                 reset = true;
2254         }
2255
2256         if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
2257                 uint8_t ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
2258
2259                 en_info(priv, "Turn %s RX-ALL\n",
2260                         ignore_fcs_value ? "ON" : "OFF");
2261                 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
2262                                               priv->port, ignore_fcs_value);
2263                 if (ret)
2264                         return ret;
2265         }
2266
2267         if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
2268                 en_info(priv, "Turn %s RX vlan strip offload\n",
2269                         (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
2270                 reset = true;
2271         }
2272
2273         if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
2274                 en_info(priv, "Turn %s TX vlan strip offload\n",
2275                         (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
2276
2277         if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
2278                 en_info(priv, "Turn %s loopback\n",
2279                         (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
2280                 mlx4_en_update_loopback_state(netdev, features);
2281         }
2282
2283         if (reset) {
2284                 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
2285                                            features);
2286                 if (ret)
2287                         return ret;
2288         }
2289
2290         return 0;
2291 }
2292
2293 static int mlx4_en_set_vf_mac(struct ether *dev, int queue, uint8_t *mac)
2294 {
2295         struct mlx4_en_priv *en_priv = netdev_priv(dev);
2296         struct mlx4_en_dev *mdev = en_priv->mdev;
2297         uint64_t mac_u64 = mlx4_mac_to_u64(mac);
2298
2299         if (!is_valid_ether_addr(mac))
2300                 return -EINVAL;
2301
2302         return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
2303 }
2304
2305 static int mlx4_en_set_vf_vlan(struct ether *dev, int vf, uint16_t vlan,
2306                                uint8_t qos)
2307 {
2308         struct mlx4_en_priv *en_priv = netdev_priv(dev);
2309         struct mlx4_en_dev *mdev = en_priv->mdev;
2310
2311         return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
2312 }
2313
2314 static int mlx4_en_set_vf_rate(struct ether *dev, int vf, int min_tx_rate,
2315                                int max_tx_rate)
2316 {
2317         struct mlx4_en_priv *en_priv = netdev_priv(dev);
2318         struct mlx4_en_dev *mdev = en_priv->mdev;
2319
2320         return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
2321                                 max_tx_rate);
2322 }
2323
2324 static int mlx4_en_set_vf_spoofchk(struct ether *dev, int vf, bool setting)
2325 {
2326         struct mlx4_en_priv *en_priv = netdev_priv(dev);
2327         struct mlx4_en_dev *mdev = en_priv->mdev;
2328
2329         return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
2330 }
2331
2332 static int mlx4_en_get_vf_config(struct ether *dev, int vf,
2333                                  struct ifla_vf_info *ivf)
2334 {
2335         struct mlx4_en_priv *en_priv = netdev_priv(dev);
2336         struct mlx4_en_dev *mdev = en_priv->mdev;
2337
2338         return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
2339 }
2340
2341 static int mlx4_en_set_vf_link_state(struct ether *dev, int vf,
2342                                      int link_state)
2343 {
2344         struct mlx4_en_priv *en_priv = netdev_priv(dev);
2345         struct mlx4_en_dev *mdev = en_priv->mdev;
2346
2347         return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
2348 }
2349
2350 #define PORT_ID_BYTE_LEN 8
2351 static int mlx4_en_get_phys_port_id(struct ether *dev,
2352                                     struct netdev_phys_item_id *ppid)
2353 {
2354         struct mlx4_en_priv *priv = netdev_priv(dev);
2355         struct mlx4_dev *mdev = priv->mdev->dev;
2356         int i;
2357         uint64_t phys_port_id = mdev->caps.phys_port_id[priv->port];
2358
2359         if (!phys_port_id)
2360                 return -EOPNOTSUPP;
2361
2362         ppid->id_len = sizeof(phys_port_id);
2363         for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
2364                 ppid->id[i] =  phys_port_id & 0xff;
2365                 phys_port_id >>= 8;
2366         }
2367         return 0;
2368 }
2369
2370 #ifdef CONFIG_MLX4_EN_VXLAN
2371 static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
2372 {
2373         int ret;
2374         struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2375                                                  vxlan_add_task);
2376
2377         ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
2378         if (ret)
2379                 goto out;
2380
2381         ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2382                                   VXLAN_STEER_BY_OUTER_MAC, 1);
2383 out:
2384         if (ret) {
2385                 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
2386                 return;
2387         }
2388
2389         /* set offloads */
2390         priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
2391                                       NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL;
2392         priv->dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL;
2393         priv->dev->feat    |= NETIF_F_GSO_UDP_TUNNEL;
2394 }
2395
2396 static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
2397 {
2398         int ret;
2399         struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2400                                                  vxlan_del_task);
2401         /* unset offloads */
2402         priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
2403                                       NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL);
2404         priv->dev->hw_features &= ~NETIF_F_GSO_UDP_TUNNEL;
2405         priv->dev->feat    &= ~NETIF_F_GSO_UDP_TUNNEL;
2406
2407         ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2408                                   VXLAN_STEER_BY_OUTER_MAC, 0);
2409         if (ret)
2410                 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
2411
2412         priv->vxlan_port = 0;
2413 }
2414
2415 static void mlx4_en_add_vxlan_port(struct  ether *dev,
2416                                    sa_family_t sa_family, __be16 port)
2417 {
2418         struct mlx4_en_priv *priv = netdev_priv(dev);
2419         __be16 current_port;
2420
2421         if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
2422                 return;
2423
2424         if (sa_family == AF_INET6)
2425                 return;
2426
2427         current_port = priv->vxlan_port;
2428         if (current_port && current_port != port) {
2429                 en_warn(priv, "vxlan port %d configured, can't add port %d\n",
2430                         be16_to_cpu(current_port), be16_to_cpu(port));
2431                 return;
2432         }
2433
2434         priv->vxlan_port = port;
2435         queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
2436 }
2437
2438 static void mlx4_en_del_vxlan_port(struct  ether *dev,
2439                                    sa_family_t sa_family, __be16 port)
2440 {
2441         struct mlx4_en_priv *priv = netdev_priv(dev);
2442         __be16 current_port;
2443
2444         if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
2445                 return;
2446
2447         if (sa_family == AF_INET6)
2448                 return;
2449
2450         current_port = priv->vxlan_port;
2451         if (current_port != port) {
2452                 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n",
2453                        be16_to_cpu(port));
2454                 return;
2455         }
2456
2457         queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
2458 }
2459
2460 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
2461                                                 struct ether *dev,
2462                                                 netdev_features_t features)
2463 {
2464         features = vlan_features_check(skb, features);
2465         return vxlan_features_check(skb, features);
2466 }
2467 #endif
2468
2469 static int mlx4_en_set_tx_maxrate(struct ether *dev, int queue_index,
2470                                   uint32_t maxrate)
2471 {
2472         struct mlx4_en_priv *priv = netdev_priv(dev);
2473         struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[queue_index];
2474         struct mlx4_update_qp_params params;
2475         int err;
2476
2477         if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
2478                 return -EOPNOTSUPP;
2479
2480         /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
2481         if (maxrate >> 12) {
2482                 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
2483                 params.rate_val  = maxrate / 1000;
2484         } else if (maxrate) {
2485                 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
2486                 params.rate_val  = maxrate;
2487         } else { /* zero serves to revoke the QP rate-limitation */
2488                 params.rate_unit = 0;
2489                 params.rate_val  = 0;
2490         }
2491
2492         err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
2493                              &params);
2494         return err;
2495 }
2496
2497 static const struct net_device_ops mlx4_netdev_ops = {
2498         .ndo_open               = mlx4_en_open,
2499         .ndo_stop               = mlx4_en_close,
2500         .ndo_start_xmit         = mlx4_en_xmit,
2501         .ndo_select_queue       = mlx4_en_select_queue,
2502         .ndo_get_stats          = mlx4_en_get_stats,
2503         .ndo_set_rx_mode        = mlx4_en_set_rx_mode,
2504         .ndo_set_mac_address    = mlx4_en_set_mac,
2505         .ndo_validate_addr      = eth_validate_addr,
2506         .ndo_change_mtu         = mlx4_en_change_mtu,
2507         .ndo_do_ioctl           = mlx4_en_ioctl,
2508         .ndo_tx_timeout         = mlx4_en_tx_timeout,
2509         .ndo_vlan_rx_add_vid    = mlx4_en_vlan_rx_add_vid,
2510         .ndo_vlan_rx_kill_vid   = mlx4_en_vlan_rx_kill_vid,
2511 #ifdef CONFIG_NET_POLL_CONTROLLER
2512         .ndo_poll_controller    = mlx4_en_netpoll,
2513 #endif
2514         .ndo_set_features       = mlx4_en_set_features,
2515         .ndo_setup_tc           = mlx4_en_setup_tc,
2516 #ifdef CONFIG_RFS_ACCEL
2517         .ndo_rx_flow_steer      = mlx4_en_filter_rfs,
2518 #endif
2519 #ifdef CONFIG_NET_RX_BUSY_POLL
2520         .ndo_busy_poll          = mlx4_en_low_latency_recv,
2521 #endif
2522         .ndo_get_phys_port_id   = mlx4_en_get_phys_port_id,
2523 #ifdef CONFIG_MLX4_EN_VXLAN
2524         .ndo_add_vxlan_port     = mlx4_en_add_vxlan_port,
2525         .ndo_del_vxlan_port     = mlx4_en_del_vxlan_port,
2526         .ndo_features_check     = mlx4_en_features_check,
2527 #endif
2528         .ndo_set_tx_maxrate     = mlx4_en_set_tx_maxrate,
2529 };
2530
2531 static const struct net_device_ops mlx4_netdev_ops_master = {
2532         .ndo_open               = mlx4_en_open,
2533         .ndo_stop               = mlx4_en_close,
2534         .ndo_start_xmit         = mlx4_en_xmit,
2535         .ndo_select_queue       = mlx4_en_select_queue,
2536         .ndo_get_stats          = mlx4_en_get_stats,
2537         .ndo_set_rx_mode        = mlx4_en_set_rx_mode,
2538         .ndo_set_mac_address    = mlx4_en_set_mac,
2539         .ndo_validate_addr      = eth_validate_addr,
2540         .ndo_change_mtu         = mlx4_en_change_mtu,
2541         .ndo_tx_timeout         = mlx4_en_tx_timeout,
2542         .ndo_vlan_rx_add_vid    = mlx4_en_vlan_rx_add_vid,
2543         .ndo_vlan_rx_kill_vid   = mlx4_en_vlan_rx_kill_vid,
2544         .ndo_set_vf_mac         = mlx4_en_set_vf_mac,
2545         .ndo_set_vf_vlan        = mlx4_en_set_vf_vlan,
2546         .ndo_set_vf_rate        = mlx4_en_set_vf_rate,
2547         .ndo_set_vf_spoofchk    = mlx4_en_set_vf_spoofchk,
2548         .ndo_set_vf_link_state  = mlx4_en_set_vf_link_state,
2549         .ndo_get_vf_config      = mlx4_en_get_vf_config,
2550 #ifdef CONFIG_NET_POLL_CONTROLLER
2551         .ndo_poll_controller    = mlx4_en_netpoll,
2552 #endif
2553         .ndo_set_features       = mlx4_en_set_features,
2554         .ndo_setup_tc           = mlx4_en_setup_tc,
2555 #ifdef CONFIG_RFS_ACCEL
2556         .ndo_rx_flow_steer      = mlx4_en_filter_rfs,
2557 #endif
2558         .ndo_get_phys_port_id   = mlx4_en_get_phys_port_id,
2559 #ifdef CONFIG_MLX4_EN_VXLAN
2560         .ndo_add_vxlan_port     = mlx4_en_add_vxlan_port,
2561         .ndo_del_vxlan_port     = mlx4_en_del_vxlan_port,
2562         .ndo_features_check     = mlx4_en_features_check,
2563 #endif
2564         .ndo_set_tx_maxrate     = mlx4_en_set_tx_maxrate,
2565 };
2566 #endif
2567
2568 struct mlx4_en_bond {
2569         struct work_struct work;
2570         struct mlx4_en_priv *priv;
2571         int is_bonded;
2572         struct mlx4_port_map port_map;
2573 };
2574
2575 static void mlx4_en_bond_work(struct work_struct *work)
2576 {
2577         panic("Disabled");
2578 #if 0 // AKAROS_PORT
2579         struct mlx4_en_bond *bond = container_of(work,
2580                                                      struct mlx4_en_bond,
2581                                                      work);
2582         int err = 0;
2583         struct mlx4_dev *dev = bond->priv->mdev->dev;
2584
2585         if (bond->is_bonded) {
2586                 if (!mlx4_is_bonded(dev)) {
2587                         err = mlx4_bond(dev);
2588                         if (err)
2589                                 en_err(bond->priv, "Fail to bond device\n");
2590                 }
2591                 if (!err) {
2592                         err = mlx4_port_map_set(dev, &bond->port_map);
2593                         if (err)
2594                                 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
2595                                        bond->port_map.port1,
2596                                        bond->port_map.port2,
2597                                        err);
2598                 }
2599         } else if (mlx4_is_bonded(dev)) {
2600                 err = mlx4_unbond(dev);
2601                 if (err)
2602                         en_err(bond->priv, "Fail to unbond device\n");
2603         }
2604         dev_put(bond->priv->dev);
2605         kfree(bond);
2606 #endif
2607 }
2608
2609 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
2610                                    uint8_t v2p_p1, uint8_t v2p_p2)
2611 {
2612         panic("Disabled");
2613 #if 0 // AKAROS_PORT
2614         struct mlx4_en_bond *bond = NULL;
2615
2616         bond = kzmalloc(sizeof(*bond), 0);
2617         if (!bond)
2618                 return -ENOMEM;
2619
2620         INIT_WORK(&bond->work, mlx4_en_bond_work);
2621         bond->priv = priv;
2622         bond->is_bonded = is_bonded;
2623         bond->port_map.port1 = v2p_p1;
2624         bond->port_map.port2 = v2p_p2;
2625         dev_hold(priv->dev);
2626         queue_work(priv->mdev->workqueue, &bond->work);
2627         return 0;
2628 #endif
2629 }
2630
2631 int mlx4_en_netdev_event(struct notifier_block *this,
2632                          unsigned long event, void *ptr)
2633 {
2634         panic("Disabled");
2635 #if 0 // AKAROS_PORT
2636         struct ether *ndev = netdev_notifier_info_to_dev(ptr);
2637         uint8_t port = 0;
2638         struct mlx4_en_dev *mdev;
2639         struct mlx4_dev *dev;
2640         int i, num_eth_ports = 0;
2641         bool do_bond = true;
2642         struct mlx4_en_priv *priv;
2643         uint8_t v2p_port1 = 0;
2644         uint8_t v2p_port2 = 0;
2645
2646         if (!net_eq(dev_net(ndev), &init_net))
2647                 return NOTIFY_DONE;
2648
2649         mdev = container_of(this, struct mlx4_en_dev, nb);
2650         dev = mdev->dev;
2651
2652         /* Go into this mode only when two network devices set on two ports
2653          * of the same mlx4 device are slaves of the same bonding master
2654          */
2655         mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
2656                 ++num_eth_ports;
2657                 if (!port && (mdev->pndev[i] == ndev))
2658                         port = i;
2659                 mdev->upper[i] = mdev->pndev[i] ?
2660                         netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
2661                 /* condition not met: network device is a slave */
2662                 if (!mdev->upper[i])
2663                         do_bond = false;
2664                 if (num_eth_ports < 2)
2665                         continue;
2666                 /* condition not met: same master */
2667                 if (mdev->upper[i] != mdev->upper[i-1])
2668                         do_bond = false;
2669         }
2670         /* condition not met: 2 salves */
2671         do_bond = (num_eth_ports ==  2) ? do_bond : false;
2672
2673         /* handle only events that come with enough info */
2674         if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
2675                 return NOTIFY_DONE;
2676
2677         priv = netdev_priv(ndev);
2678         if (do_bond) {
2679                 struct netdev_notifier_bonding_info *notifier_info = ptr;
2680                 struct netdev_bonding_info *bonding_info =
2681                         &notifier_info->bonding_info;
2682
2683                 /* required mode 1, 2 or 4 */
2684                 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
2685                     (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
2686                     (bonding_info->master.bond_mode != BOND_MODE_8023AD))
2687                         do_bond = false;
2688
2689                 /* require exactly 2 slaves */
2690                 if (bonding_info->master.num_slaves != 2)
2691                         do_bond = false;
2692
2693                 /* calc v2p */
2694                 if (do_bond) {
2695                         if (bonding_info->master.bond_mode ==
2696                             BOND_MODE_ACTIVEBACKUP) {
2697                                 /* in active-backup mode virtual ports are
2698                                  * mapped to the physical port of the active
2699                                  * slave */
2700                                 if (bonding_info->slave.state ==
2701                                     BOND_STATE_BACKUP) {
2702                                         if (port == 1) {
2703                                                 v2p_port1 = 2;
2704                                                 v2p_port2 = 2;
2705                                         } else {
2706                                                 v2p_port1 = 1;
2707                                                 v2p_port2 = 1;
2708                                         }
2709                                 } else { /* BOND_STATE_ACTIVE */
2710                                         if (port == 1) {
2711                                                 v2p_port1 = 1;
2712                                                 v2p_port2 = 1;
2713                                         } else {
2714                                                 v2p_port1 = 2;
2715                                                 v2p_port2 = 2;
2716                                         }
2717                                 }
2718                         } else { /* Active-Active */
2719                                 /* in active-active mode a virtual port is
2720                                  * mapped to the native physical port if and only
2721                                  * if the physical port is up */
2722                                 __s8 link = bonding_info->slave.link;
2723
2724                                 if (port == 1)
2725                                         v2p_port2 = 2;
2726                                 else
2727                                         v2p_port1 = 1;
2728                                 if ((link == BOND_LINK_UP) ||
2729                                     (link == BOND_LINK_FAIL)) {
2730                                         if (port == 1)
2731                                                 v2p_port1 = 1;
2732                                         else
2733                                                 v2p_port2 = 2;
2734                                 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
2735                                         if (port == 1)
2736                                                 v2p_port1 = 2;
2737                                         else
2738                                                 v2p_port2 = 1;
2739                                 }
2740                         }
2741                 }
2742         }
2743
2744         mlx4_en_queue_bond_work(priv, do_bond,
2745                                 v2p_port1, v2p_port2);
2746 #endif
2747
2748         return NOTIFY_DONE;
2749 }
2750
2751 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
2752                                      struct mlx4_en_stats_bitmap *stats_bitmap,
2753                                      uint8_t rx_ppp, uint8_t rx_pause,
2754                                      uint8_t tx_ppp, uint8_t tx_pause)
2755 {
2756         int last_i = NUM_MAIN_STATS + NUM_PORT_STATS;
2757
2758         if (!mlx4_is_slave(dev) &&
2759             (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
2760                 qlock(&stats_bitmap->mutex);
2761                 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
2762
2763                 if (rx_ppp)
2764                         bitmap_set(stats_bitmap->bitmap, last_i,
2765                                    NUM_FLOW_PRIORITY_STATS_RX);
2766                 last_i += NUM_FLOW_PRIORITY_STATS_RX;
2767
2768                 if (rx_pause && !(rx_ppp))
2769                         bitmap_set(stats_bitmap->bitmap, last_i,
2770                                    NUM_FLOW_STATS_RX);
2771                 last_i += NUM_FLOW_STATS_RX;
2772
2773                 if (tx_ppp)
2774                         bitmap_set(stats_bitmap->bitmap, last_i,
2775                                    NUM_FLOW_PRIORITY_STATS_TX);
2776                 last_i += NUM_FLOW_PRIORITY_STATS_TX;
2777
2778                 if (tx_pause && !(tx_ppp))
2779                         bitmap_set(stats_bitmap->bitmap, last_i,
2780                                    NUM_FLOW_STATS_TX);
2781                 last_i += NUM_FLOW_STATS_TX;
2782
2783                 qunlock(&stats_bitmap->mutex);
2784         }
2785 }
2786
2787 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
2788                               struct mlx4_en_stats_bitmap *stats_bitmap,
2789                               uint8_t rx_ppp, uint8_t rx_pause,
2790                               uint8_t tx_ppp, uint8_t tx_pause)
2791 {
2792         panic("Disabled");
2793 #if 0 // AKAROS_PORT
2794         int last_i = 0;
2795
2796         qlock_init(&stats_bitmap->mutex);
2797         bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
2798
2799         if (mlx4_is_slave(dev)) {
2800                 bitmap_set(stats_bitmap->bitmap, last_i +
2801                                          MLX4_FIND_NETDEV_STAT(rx_packets), 1);
2802                 bitmap_set(stats_bitmap->bitmap, last_i +
2803                                          MLX4_FIND_NETDEV_STAT(tx_packets), 1);
2804                 bitmap_set(stats_bitmap->bitmap, last_i +
2805                                          MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
2806                 bitmap_set(stats_bitmap->bitmap, last_i +
2807                                          MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
2808                 bitmap_set(stats_bitmap->bitmap, last_i +
2809                                          MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
2810                 bitmap_set(stats_bitmap->bitmap, last_i +
2811                                          MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
2812         } else {
2813                 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
2814         }
2815         last_i += NUM_MAIN_STATS;
2816
2817         bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
2818         last_i += NUM_PORT_STATS;
2819
2820         mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
2821                                         rx_ppp, rx_pause,
2822                                         tx_ppp, tx_pause);
2823         last_i += NUM_FLOW_STATS;
2824
2825         if (!mlx4_is_slave(dev))
2826                 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
2827 #endif
2828 }
2829
2830 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2831                         struct ether *dev,
2832                         struct mlx4_en_port_profile *prof)
2833 {
2834         struct mlx4_en_priv *priv;
2835         int i;
2836         int err;
2837         uint64_t mac_u64;
2838
2839 #if 0 // AKAROS_PORT
2840         dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
2841                                  MAX_TX_RINGS, MAX_RX_RINGS);
2842         if (dev == NULL)
2843                 return -ENOMEM;
2844
2845         netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
2846         netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
2847
2848         SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
2849 #else
2850         dev->ctlr = kzmalloc(sizeof(struct mlx4_en_priv), MEM_WAIT);
2851 #endif
2852
2853         /*
2854          * Initialize driver private data
2855          */
2856
2857         priv = netdev_priv(dev);
2858         memset(priv, 0, sizeof(struct mlx4_en_priv));
2859         spinlock_init(&priv->stats_lock);
2860         INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
2861         INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
2862         INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
2863         INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
2864         INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
2865 #ifdef CONFIG_MLX4_EN_VXLAN
2866         INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
2867         INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
2868 #endif
2869 #ifdef CONFIG_RFS_ACCEL
2870         INIT_LIST_HEAD(&priv->filters);
2871         spinlock_init(&priv->filters_lock);
2872 #endif
2873
2874         priv->dev = dev;
2875         priv->mdev = mdev;
2876 #if 0 // AKAROS_PORT
2877         priv->ddev = &mdev->pdev->dev;
2878 #endif
2879         priv->prof = prof;
2880         priv->port = port;
2881         priv->port_up = false;
2882         priv->flags = prof->flags;
2883         priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
2884         priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
2885                         MLX4_WQE_CTRL_SOLICITED);
2886         priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
2887         priv->tx_ring_num = prof->tx_ring_num;
2888         priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
2889         netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
2890
2891         priv->tx_ring = kzmalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
2892                                  MEM_WAIT);
2893         if (!priv->tx_ring) {
2894                 err = -ENOMEM;
2895                 goto out;
2896         }
2897         priv->tx_cq = kzmalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
2898                                MEM_WAIT);
2899         if (!priv->tx_cq) {
2900                 err = -ENOMEM;
2901                 goto out;
2902         }
2903         priv->rx_ring_num = prof->rx_ring_num;
2904         priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
2905         priv->cqe_size = mdev->dev->caps.cqe_size;
2906         priv->mac_index = -1;
2907         priv->msg_enable = MLX4_EN_MSG_LEVEL;
2908 #ifdef CONFIG_MLX4_EN_DCB
2909         if (!mlx4_is_slave(priv->mdev->dev)) {
2910                 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
2911                         dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
2912                 } else {
2913                         en_info(priv, "enabling only PFC DCB ops\n");
2914                         dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
2915                 }
2916         }
2917 #endif
2918
2919         for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
2920                 INIT_HLIST_HEAD(&priv->mac_hash[i]);
2921
2922         /* Query for default mac and max mtu */
2923         priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
2924
2925         if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
2926             MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
2927                 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
2928
2929         /* Set default MAC */
2930         mlx4_en_u64_to_mac(dev->ea, mdev->dev->caps.def_mac[priv->port]);
2931         if (!is_valid_ether_addr(dev->ea)) {
2932                 if (mlx4_is_slave(priv->mdev->dev)) {
2933                         eth_hw_addr_random(dev);
2934                         en_warn(priv, "Assigned random MAC address %pM\n",
2935                                 dev->ea);
2936                         mac_u64 = mlx4_mac_to_u64(dev->ea);
2937                         mdev->dev->caps.def_mac[priv->port] = mac_u64;
2938                 } else {
2939                         en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
2940                                priv->port, dev->ea);
2941                         err = -EINVAL;
2942                         goto out;
2943                 }
2944         }
2945
2946         memcpy(priv->current_mac, dev->ea, sizeof(priv->current_mac));
2947
2948         priv->stride = ROUNDUPPWR2(sizeof(struct mlx4_en_rx_desc) + DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2949         err = mlx4_en_alloc_resources(priv);
2950         if (err)
2951                 goto out;
2952
2953         /* Initialize time stamping config */
2954         priv->hwtstamp_config.flags = 0;
2955         priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
2956         priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
2957
2958         /* Allocate page for receive rings */
2959         err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
2960                                 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
2961         if (err) {
2962                 en_err(priv, "Failed to allocate page for rx qps\n");
2963                 goto out;
2964         }
2965         priv->allocated = 1;
2966
2967 #if 0 // AKAROS_PORT
2968         /*
2969          * Initialize netdev entry points
2970          */
2971         if (mlx4_is_master(priv->mdev->dev))
2972                 {}
2973                 else
2974                         {}
2975         netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
2976         netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
2977 #endif
2978
2979         /*
2980          * Set driver features
2981          */
2982         dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2983         if (mdev->LSO_support)
2984                 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
2985
2986         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
2987 #if 0 // AKAROS_PORT
2988         dev->feat = dev->hw_features | NETIF_F_HIGHDMA |
2989                         NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2990                         NETIF_F_HW_VLAN_CTAG_FILTER;
2991 #else
2992         dev->feat = dev->hw_features | NETIF_F_SG | NETIF_F_IP_CSUM | NETF_PADMIN;
2993 #endif
2994         dev->hw_features |= NETIF_F_LOOPBACK |
2995                         NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
2996
2997         if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
2998                 dev->hw_features |= NETIF_F_RXFCS;
2999
3000         if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
3001                 dev->hw_features |= NETIF_F_RXALL;
3002
3003         if (mdev->dev->caps.steering_mode ==
3004             MLX4_STEERING_MODE_DEVICE_MANAGED &&
3005             mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
3006                 dev->hw_features |= NETIF_F_NTUPLE;
3007
3008 #if 0 // AKAROS_PORT
3009         if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
3010                 dev->priv_flags |= IFF_UNICAST_FLT;
3011 #endif
3012
3013         /* Setting a default hash function value */
3014         if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
3015                 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3016         } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
3017                 priv->rss_hash_fn = ETH_RSS_HASH_XOR;
3018         } else {
3019                 en_warn(priv,
3020                         "No RSS hash capabilities exposed, using Toeplitz\n");
3021                 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3022         }
3023
3024         mdev->pndev[port] = dev;
3025         mdev->upper[port] = NULL;
3026
3027         netif_carrier_off(dev);
3028         mlx4_en_set_default_moderation(priv);
3029
3030         en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
3031         en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
3032
3033         mlx4_en_update_loopback_state(priv->dev, priv->dev->feat);
3034
3035         /* Configure port */
3036         mlx4_en_calc_rx_buf(dev);
3037         err = mlx4_SET_PORT_general(mdev->dev, priv->port,
3038                                     priv->rx_skb_size + ETH_FCS_LEN,
3039                                     prof->tx_pause, prof->tx_ppp,
3040                                     prof->rx_pause, prof->rx_ppp);
3041         if (err) {
3042                 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
3043                        priv->port, err);
3044                 goto out;
3045         }
3046
3047         if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3048                 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
3049                 if (err) {
3050                         en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
3051                                err);
3052                         goto out;
3053                 }
3054         }
3055
3056         /* Init port */
3057         en_warn(priv, "Initializing port\n");
3058         err = mlx4_INIT_PORT(mdev->dev, priv->port);
3059         if (err) {
3060                 en_err(priv, "Failed Initializing port\n");
3061                 goto out;
3062         }
3063         queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
3064
3065         if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
3066                 queue_delayed_work(mdev->workqueue, &priv->service_task,
3067                                    SERVICE_TASK_DELAY);
3068
3069 #if 0 // AKAROS_PORT
3070         mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
3071                                  mdev->profile.prof[priv->port].rx_ppp,
3072                                  mdev->profile.prof[priv->port].rx_pause,
3073                                  mdev->profile.prof[priv->port].tx_ppp,
3074                                  mdev->profile.prof[priv->port].tx_pause);
3075
3076         err = register_netdev(dev);
3077         if (err) {
3078                 en_err(priv, "Netdev registration failed for port %d\n", port);
3079                 goto out;
3080         }
3081 #endif
3082
3083         priv->registered = 1;
3084
3085         return 0;
3086
3087 out:
3088         mlx4_en_destroy_netdev(dev);
3089         return err;
3090 }
3091
3092 int mlx4_en_reset_config(struct ether *dev,
3093                          struct hwtstamp_config ts_config,
3094                          netdev_features_t features)
3095 {
3096         struct mlx4_en_priv *priv = netdev_priv(dev);
3097         struct mlx4_en_dev *mdev = priv->mdev;
3098         int port_up = 0;
3099         int err = 0;
3100
3101         if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
3102             priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
3103             !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&