mlx4: /dev/ -> /dev_vfs/
[akaros.git] / kern / drivers / net / mlx4 / en_ethtool.c
1 /*
2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33
34 #include <linux/kernel.h>
35 #include <linux/ethtool.h>
36 #include <linux/netdevice.h>
37 #include <linux/mlx4/driver.h>
38 #include <linux/mlx4/device.h>
39 #include <linux/in.h>
40 #include <net/ip.h>
41 #include <linux/bitmap.h>
42
43 #include "mlx4_en.h"
44 #include "en_port.h"
45
46 #define EN_ETHTOOL_QP_ATTACH (1ull << 63)
47 #define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
48 #define EN_ETHTOOL_WORD_MASK  cpu_to_be32(0xffffffff)
49
50 static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
51 {
52         int i;
53         int err = 0;
54
55         for (i = 0; i < priv->tx_ring_num; i++) {
56                 priv->tx_cq[i]->moder_cnt = priv->tx_frames;
57                 priv->tx_cq[i]->moder_time = priv->tx_usecs;
58                 if (priv->port_up) {
59                         err = mlx4_en_set_cq_moder(priv, priv->tx_cq[i]);
60                         if (err)
61                                 return err;
62                 }
63         }
64
65         if (priv->adaptive_rx_coal)
66                 return 0;
67
68         for (i = 0; i < priv->rx_ring_num; i++) {
69                 priv->rx_cq[i]->moder_cnt = priv->rx_frames;
70                 priv->rx_cq[i]->moder_time = priv->rx_usecs;
71                 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
72                 if (priv->port_up) {
73                         err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]);
74                         if (err)
75                                 return err;
76                 }
77         }
78
79         return err;
80 }
81
82 static void
83 mlx4_en_get_drvinfo(struct ether *dev, struct ethtool_drvinfo *drvinfo)
84 {
85         struct mlx4_en_priv *priv = netdev_priv(dev);
86         struct mlx4_en_dev *mdev = priv->mdev;
87
88         strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
89         strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
90                 sizeof(drvinfo->version));
91         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
92                 "%d.%d.%d",
93                 (u16) (mdev->dev->caps.fw_ver >> 32),
94                 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
95                 (u16) (mdev->dev->caps.fw_ver & 0xffff));
96         strlcpy(drvinfo->bus_info, pci_name(mdev->dev->persist->pdev),
97                 sizeof(drvinfo->bus_info));
98         drvinfo->n_stats = 0;
99         drvinfo->regdump_len = 0;
100         drvinfo->eedump_len = 0;
101 }
102
103 static const char mlx4_en_priv_flags[][ETH_GSTRING_LEN] = {
104         "blueflame",
105 };
106
107 static const char main_strings[][ETH_GSTRING_LEN] = {
108         /* main statistics */
109         "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
110         "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
111         "rx_length_errors", "rx_over_errors", "rx_crc_errors",
112         "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
113         "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
114         "tx_heartbeat_errors", "tx_window_errors",
115
116         /* port statistics */
117         "tso_packets",
118         "xmit_more",
119         "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
120         "rx_csum_good", "rx_csum_none", "rx_csum_complete", "tx_chksum_offload",
121
122         /* priority flow control statistics rx */
123         "rx_pause_prio_0", "rx_pause_duration_prio_0",
124         "rx_pause_transition_prio_0",
125         "rx_pause_prio_1", "rx_pause_duration_prio_1",
126         "rx_pause_transition_prio_1",
127         "rx_pause_prio_2", "rx_pause_duration_prio_2",
128         "rx_pause_transition_prio_2",
129         "rx_pause_prio_3", "rx_pause_duration_prio_3",
130         "rx_pause_transition_prio_3",
131         "rx_pause_prio_4", "rx_pause_duration_prio_4",
132         "rx_pause_transition_prio_4",
133         "rx_pause_prio_5", "rx_pause_duration_prio_5",
134         "rx_pause_transition_prio_5",
135         "rx_pause_prio_6", "rx_pause_duration_prio_6",
136         "rx_pause_transition_prio_6",
137         "rx_pause_prio_7", "rx_pause_duration_prio_7",
138         "rx_pause_transition_prio_7",
139
140         /* flow control statistics rx */
141         "rx_pause", "rx_pause_duration", "rx_pause_transition",
142
143         /* priority flow control statistics tx */
144         "tx_pause_prio_0", "tx_pause_duration_prio_0",
145         "tx_pause_transition_prio_0",
146         "tx_pause_prio_1", "tx_pause_duration_prio_1",
147         "tx_pause_transition_prio_1",
148         "tx_pause_prio_2", "tx_pause_duration_prio_2",
149         "tx_pause_transition_prio_2",
150         "tx_pause_prio_3", "tx_pause_duration_prio_3",
151         "tx_pause_transition_prio_3",
152         "tx_pause_prio_4", "tx_pause_duration_prio_4",
153         "tx_pause_transition_prio_4",
154         "tx_pause_prio_5", "tx_pause_duration_prio_5",
155         "tx_pause_transition_prio_5",
156         "tx_pause_prio_6", "tx_pause_duration_prio_6",
157         "tx_pause_transition_prio_6",
158         "tx_pause_prio_7", "tx_pause_duration_prio_7",
159         "tx_pause_transition_prio_7",
160
161         /* flow control statistics tx */
162         "tx_pause", "tx_pause_duration", "tx_pause_transition",
163
164         /* packet statistics */
165         "rx_multicast_packets",
166         "rx_broadcast_packets",
167         "rx_jabbers",
168         "rx_in_range_length_error",
169         "rx_out_range_length_error",
170         "tx_multicast_packets",
171         "tx_broadcast_packets",
172         "rx_prio_0_packets", "rx_prio_0_bytes",
173         "rx_prio_1_packets", "rx_prio_1_bytes",
174         "rx_prio_2_packets", "rx_prio_2_bytes",
175         "rx_prio_3_packets", "rx_prio_3_bytes",
176         "rx_prio_4_packets", "rx_prio_4_bytes",
177         "rx_prio_5_packets", "rx_prio_5_bytes",
178         "rx_prio_6_packets", "rx_prio_6_bytes",
179         "rx_prio_7_packets", "rx_prio_7_bytes",
180         "rx_novlan_packets", "rx_novlan_bytes",
181         "tx_prio_0_packets", "tx_prio_0_bytes",
182         "tx_prio_1_packets", "tx_prio_1_bytes",
183         "tx_prio_2_packets", "tx_prio_2_bytes",
184         "tx_prio_3_packets", "tx_prio_3_bytes",
185         "tx_prio_4_packets", "tx_prio_4_bytes",
186         "tx_prio_5_packets", "tx_prio_5_bytes",
187         "tx_prio_6_packets", "tx_prio_6_bytes",
188         "tx_prio_7_packets", "tx_prio_7_bytes",
189         "tx_novlan_packets", "tx_novlan_bytes",
190
191 };
192
193 static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
194         "Interrupt Test",
195         "Link Test",
196         "Speed Test",
197         "Register Test",
198         "Loopback Test",
199 };
200
201 static uint32_t mlx4_en_get_msglevel(struct ether *dev)
202 {
203         return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
204 }
205
206 static void mlx4_en_set_msglevel(struct ether *dev, uint32_t val)
207 {
208         ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
209 }
210
211 static void mlx4_en_get_wol(struct ether *netdev,
212                             struct ethtool_wolinfo *wol)
213 {
214         struct mlx4_en_priv *priv = netdev_priv(netdev);
215         int err = 0;
216         uint64_t config = 0;
217         uint64_t mask;
218
219         if ((priv->port < 1) || (priv->port > 2)) {
220                 en_err(priv, "Failed to get WoL information\n");
221                 return;
222         }
223
224         mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
225                 MLX4_DEV_CAP_FLAG_WOL_PORT2;
226
227         if (!(priv->mdev->dev->caps.flags & mask)) {
228                 wol->supported = 0;
229                 wol->wolopts = 0;
230                 return;
231         }
232
233         err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
234         if (err) {
235                 en_err(priv, "Failed to get WoL information\n");
236                 return;
237         }
238
239         if (config & MLX4_EN_WOL_MAGIC)
240                 wol->supported = WAKE_MAGIC;
241         else
242                 wol->supported = 0;
243
244         if (config & MLX4_EN_WOL_ENABLED)
245                 wol->wolopts = WAKE_MAGIC;
246         else
247                 wol->wolopts = 0;
248 }
249
250 static int mlx4_en_set_wol(struct ether *netdev,
251                             struct ethtool_wolinfo *wol)
252 {
253         struct mlx4_en_priv *priv = netdev_priv(netdev);
254         uint64_t config = 0;
255         int err = 0;
256         uint64_t mask;
257
258         if ((priv->port < 1) || (priv->port > 2))
259                 return -EOPNOTSUPP;
260
261         mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
262                 MLX4_DEV_CAP_FLAG_WOL_PORT2;
263
264         if (!(priv->mdev->dev->caps.flags & mask))
265                 return -EOPNOTSUPP;
266
267         if (wol->supported & ~WAKE_MAGIC)
268                 return -EINVAL;
269
270         err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
271         if (err) {
272                 en_err(priv, "Failed to get WoL info, unable to modify\n");
273                 return err;
274         }
275
276         if (wol->wolopts & WAKE_MAGIC) {
277                 config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
278                                 MLX4_EN_WOL_MAGIC;
279         } else {
280                 config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
281                 config |= MLX4_EN_WOL_DO_MODIFY;
282         }
283
284         err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
285         if (err)
286                 en_err(priv, "Failed to set WoL information\n");
287
288         return err;
289 }
290
291 struct bitmap_iterator {
292         unsigned long *stats_bitmap;
293         unsigned int count;
294         unsigned int iterator;
295         bool advance_array; /* if set, force no increments */
296 };
297
298 static inline void bitmap_iterator_init(struct bitmap_iterator *h,
299                                         unsigned long *stats_bitmap,
300                                         int count)
301 {
302         h->iterator = 0;
303         h->advance_array = !bitmap_empty(stats_bitmap, count);
304         h->count = h->advance_array ? bitmap_weight(stats_bitmap, count)
305                 : count;
306         h->stats_bitmap = stats_bitmap;
307 }
308
309 static inline int bitmap_iterator_test(struct bitmap_iterator *h)
310 {
311         return !h->advance_array ? 1 : test_bit(h->iterator, h->stats_bitmap);
312 }
313
314 static inline int bitmap_iterator_inc(struct bitmap_iterator *h)
315 {
316         return h->iterator++;
317 }
318
319 static inline unsigned int
320 bitmap_iterator_count(struct bitmap_iterator *h)
321 {
322         return h->count;
323 }
324
325 static int mlx4_en_get_sset_count(struct ether *dev, int sset)
326 {
327         struct mlx4_en_priv *priv = netdev_priv(dev);
328         struct bitmap_iterator it;
329
330         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
331
332         switch (sset) {
333         case ETH_SS_STATS:
334                 return bitmap_iterator_count(&it) +
335                         (priv->tx_ring_num * 2) +
336 #ifdef CONFIG_NET_RX_BUSY_POLL
337                         (priv->rx_ring_num * 5);
338 #else
339                         (priv->rx_ring_num * 2);
340 #endif
341         case ETH_SS_TEST:
342                 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
343                                         & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
344         case ETH_SS_PRIV_FLAGS:
345                 return ARRAY_SIZE(mlx4_en_priv_flags);
346         default:
347                 return -EOPNOTSUPP;
348         }
349 }
350
351 static void mlx4_en_get_ethtool_stats(struct ether *dev,
352                                       struct ethtool_stats *stats,
353                                       uint64_t *data)
354 {
355         struct mlx4_en_priv *priv = netdev_priv(dev);
356         int index = 0;
357         int i;
358         struct bitmap_iterator it;
359
360         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
361
362         spin_lock(&priv->stats_lock);
363
364         for (i = 0; i < NUM_MAIN_STATS; i++, bitmap_iterator_inc(&it))
365                 if (bitmap_iterator_test(&it))
366                         data[index++] = ((unsigned long *)&priv->stats)[i];
367
368         for (i = 0; i < NUM_PORT_STATS; i++, bitmap_iterator_inc(&it))
369                 if (bitmap_iterator_test(&it))
370                         data[index++] = ((unsigned long *)&priv->port_stats)[i];
371
372         for (i = 0; i < NUM_FLOW_PRIORITY_STATS_RX;
373              i++, bitmap_iterator_inc(&it))
374                 if (bitmap_iterator_test(&it))
375                         data[index++] =
376                                 ((uint64_t *)&priv->rx_priority_flowstats)[i];
377
378         for (i = 0; i < NUM_FLOW_STATS_RX; i++, bitmap_iterator_inc(&it))
379                 if (bitmap_iterator_test(&it))
380                         data[index++] = ((uint64_t *)&priv->rx_flowstats)[i];
381
382         for (i = 0; i < NUM_FLOW_PRIORITY_STATS_TX;
383              i++, bitmap_iterator_inc(&it))
384                 if (bitmap_iterator_test(&it))
385                         data[index++] =
386                                 ((uint64_t *)&priv->tx_priority_flowstats)[i];
387
388         for (i = 0; i < NUM_FLOW_STATS_TX; i++, bitmap_iterator_inc(&it))
389                 if (bitmap_iterator_test(&it))
390                         data[index++] = ((uint64_t *)&priv->tx_flowstats)[i];
391
392         for (i = 0; i < NUM_PKT_STATS; i++, bitmap_iterator_inc(&it))
393                 if (bitmap_iterator_test(&it))
394                         data[index++] = ((unsigned long *)&priv->pkstats)[i];
395
396         for (i = 0; i < priv->tx_ring_num; i++) {
397                 data[index++] = priv->tx_ring[i]->packets;
398                 data[index++] = priv->tx_ring[i]->bytes;
399         }
400         for (i = 0; i < priv->rx_ring_num; i++) {
401                 data[index++] = priv->rx_ring[i]->packets;
402                 data[index++] = priv->rx_ring[i]->bytes;
403 #ifdef CONFIG_NET_RX_BUSY_POLL
404                 data[index++] = priv->rx_ring[i]->yields;
405                 data[index++] = priv->rx_ring[i]->misses;
406                 data[index++] = priv->rx_ring[i]->cleaned;
407 #endif
408         }
409         spin_unlock(&priv->stats_lock);
410
411 }
412
413 static void mlx4_en_self_test(struct ether *dev,
414                               struct ethtool_test *etest, uint64_t *buf)
415 {
416         mlx4_en_ex_selftest(dev, &etest->flags, buf);
417 }
418
419 static void mlx4_en_get_strings(struct ether *dev,
420                                 uint32_t stringset, uint8_t *data)
421 {
422         struct mlx4_en_priv *priv = netdev_priv(dev);
423         int index = 0;
424         int i, strings = 0;
425         struct bitmap_iterator it;
426
427         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
428
429         switch (stringset) {
430         case ETH_SS_TEST:
431                 for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
432                         strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
433                 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
434                         for (; i < MLX4_EN_NUM_SELF_TEST; i++)
435                                 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
436                 break;
437
438         case ETH_SS_STATS:
439                 /* Add main counters */
440                 for (i = 0; i < NUM_MAIN_STATS; i++, strings++,
441                      bitmap_iterator_inc(&it))
442                         if (bitmap_iterator_test(&it))
443                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
444                                        main_strings[strings]);
445
446                 for (i = 0; i < NUM_PORT_STATS; i++, strings++,
447                      bitmap_iterator_inc(&it))
448                         if (bitmap_iterator_test(&it))
449                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
450                                        main_strings[strings]);
451
452                 for (i = 0; i < NUM_FLOW_STATS; i++, strings++,
453                      bitmap_iterator_inc(&it))
454                         if (bitmap_iterator_test(&it))
455                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
456                                        main_strings[strings]);
457
458                 for (i = 0; i < NUM_PKT_STATS; i++, strings++,
459                      bitmap_iterator_inc(&it))
460                         if (bitmap_iterator_test(&it))
461                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
462                                        main_strings[strings]);
463
464                 for (i = 0; i < priv->tx_ring_num; i++) {
465                         sprintf(data + (index++) * ETH_GSTRING_LEN,
466                                 "tx%d_packets", i);
467                         sprintf(data + (index++) * ETH_GSTRING_LEN,
468                                 "tx%d_bytes", i);
469                 }
470                 for (i = 0; i < priv->rx_ring_num; i++) {
471                         sprintf(data + (index++) * ETH_GSTRING_LEN,
472                                 "rx%d_packets", i);
473                         sprintf(data + (index++) * ETH_GSTRING_LEN,
474                                 "rx%d_bytes", i);
475 #ifdef CONFIG_NET_RX_BUSY_POLL
476                         sprintf(data + (index++) * ETH_GSTRING_LEN,
477                                 "rx%d_napi_yield", i);
478                         sprintf(data + (index++) * ETH_GSTRING_LEN,
479                                 "rx%d_misses", i);
480                         sprintf(data + (index++) * ETH_GSTRING_LEN,
481                                 "rx%d_cleaned", i);
482 #endif
483                 }
484                 break;
485         case ETH_SS_PRIV_FLAGS:
486                 for (i = 0; i < ARRAY_SIZE(mlx4_en_priv_flags); i++)
487                         strcpy(data + i * ETH_GSTRING_LEN,
488                                mlx4_en_priv_flags[i]);
489                 break;
490
491         }
492 }
493
494 static uint32_t mlx4_en_autoneg_get(struct ether *dev)
495 {
496         struct mlx4_en_priv *priv = netdev_priv(dev);
497         struct mlx4_en_dev *mdev = priv->mdev;
498         uint32_t autoneg = AUTONEG_DISABLE;
499
500         if ((mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP) &&
501             (priv->port_state.flags & MLX4_EN_PORT_ANE))
502                 autoneg = AUTONEG_ENABLE;
503
504         return autoneg;
505 }
506
507 static uint32_t ptys_get_supported_port(struct mlx4_ptys_reg *ptys_reg)
508 {
509         uint32_t eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
510
511         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
512                          | MLX4_PROT_MASK(MLX4_1000BASE_T)
513                          | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
514                         return SUPPORTED_TP;
515         }
516
517         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
518                          | MLX4_PROT_MASK(MLX4_10GBASE_SR)
519                          | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
520                          | MLX4_PROT_MASK(MLX4_40GBASE_CR4)
521                          | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
522                          | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
523                         return SUPPORTED_FIBRE;
524         }
525
526         if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
527                          | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
528                          | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
529                          | MLX4_PROT_MASK(MLX4_10GBASE_KR)
530                          | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
531                          | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
532                         return SUPPORTED_Backplane;
533         }
534         return 0;
535 }
536
537 static uint32_t ptys_get_active_port(struct mlx4_ptys_reg *ptys_reg)
538 {
539         uint32_t eth_proto = be32_to_cpu(ptys_reg->eth_proto_oper);
540
541         if (!eth_proto) /* link down */
542                 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
543
544         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
545                          | MLX4_PROT_MASK(MLX4_1000BASE_T)
546                          | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
547                         return PORT_TP;
548         }
549
550         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_SR)
551                          | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
552                          | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
553                          | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
554                         return PORT_FIBRE;
555         }
556
557         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
558                          | MLX4_PROT_MASK(MLX4_56GBASE_CR4)
559                          | MLX4_PROT_MASK(MLX4_40GBASE_CR4))) {
560                         return PORT_DA;
561         }
562
563         if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
564                          | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
565                          | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
566                          | MLX4_PROT_MASK(MLX4_10GBASE_KR)
567                          | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
568                          | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
569                         return PORT_NONE;
570         }
571         return PORT_OTHER;
572 }
573
574 #define MLX4_LINK_MODES_SZ \
575         (FIELD_SIZEOF(struct mlx4_ptys_reg, eth_proto_cap) * 8)
576
577 enum ethtool_report {
578         SUPPORTED = 0,
579         ADVERTISED = 1,
580         SPEED = 2
581 };
582
583 /* Translates mlx4 link mode to equivalent ethtool Link modes/speed */
584 static uint32_t ptys2ethtool_map[MLX4_LINK_MODES_SZ][3] = {
585         [MLX4_100BASE_TX] = {
586                 SUPPORTED_100baseT_Full,
587                 ADVERTISED_100baseT_Full,
588                 SPEED_100
589                 },
590
591         [MLX4_1000BASE_T] = {
592                 SUPPORTED_1000baseT_Full,
593                 ADVERTISED_1000baseT_Full,
594                 SPEED_1000
595                 },
596         [MLX4_1000BASE_CX_SGMII] = {
597                 SUPPORTED_1000baseKX_Full,
598                 ADVERTISED_1000baseKX_Full,
599                 SPEED_1000
600                 },
601         [MLX4_1000BASE_KX] = {
602                 SUPPORTED_1000baseKX_Full,
603                 ADVERTISED_1000baseKX_Full,
604                 SPEED_1000
605                 },
606
607         [MLX4_10GBASE_T] = {
608                 SUPPORTED_10000baseT_Full,
609                 ADVERTISED_10000baseT_Full,
610                 SPEED_10000
611                 },
612         [MLX4_10GBASE_CX4] = {
613                 SUPPORTED_10000baseKX4_Full,
614                 ADVERTISED_10000baseKX4_Full,
615                 SPEED_10000
616                 },
617         [MLX4_10GBASE_KX4] = {
618                 SUPPORTED_10000baseKX4_Full,
619                 ADVERTISED_10000baseKX4_Full,
620                 SPEED_10000
621                 },
622         [MLX4_10GBASE_KR] = {
623                 SUPPORTED_10000baseKR_Full,
624                 ADVERTISED_10000baseKR_Full,
625                 SPEED_10000
626                 },
627         [MLX4_10GBASE_CR] = {
628                 SUPPORTED_10000baseKR_Full,
629                 ADVERTISED_10000baseKR_Full,
630                 SPEED_10000
631                 },
632         [MLX4_10GBASE_SR] = {
633                 SUPPORTED_10000baseKR_Full,
634                 ADVERTISED_10000baseKR_Full,
635                 SPEED_10000
636                 },
637
638         [MLX4_20GBASE_KR2] = {
639                 SUPPORTED_20000baseMLD2_Full | SUPPORTED_20000baseKR2_Full,
640                 ADVERTISED_20000baseMLD2_Full | ADVERTISED_20000baseKR2_Full,
641                 SPEED_20000
642                 },
643
644         [MLX4_40GBASE_CR4] = {
645                 SUPPORTED_40000baseCR4_Full,
646                 ADVERTISED_40000baseCR4_Full,
647                 SPEED_40000
648                 },
649         [MLX4_40GBASE_KR4] = {
650                 SUPPORTED_40000baseKR4_Full,
651                 ADVERTISED_40000baseKR4_Full,
652                 SPEED_40000
653                 },
654         [MLX4_40GBASE_SR4] = {
655                 SUPPORTED_40000baseSR4_Full,
656                 ADVERTISED_40000baseSR4_Full,
657                 SPEED_40000
658                 },
659
660         [MLX4_56GBASE_KR4] = {
661                 SUPPORTED_56000baseKR4_Full,
662                 ADVERTISED_56000baseKR4_Full,
663                 SPEED_56000
664                 },
665         [MLX4_56GBASE_CR4] = {
666                 SUPPORTED_56000baseCR4_Full,
667                 ADVERTISED_56000baseCR4_Full,
668                 SPEED_56000
669                 },
670         [MLX4_56GBASE_SR4] = {
671                 SUPPORTED_56000baseSR4_Full,
672                 ADVERTISED_56000baseSR4_Full,
673                 SPEED_56000
674                 },
675 };
676
677 static uint32_t ptys2ethtool_link_modes(uint32_t eth_proto,
678                                         enum ethtool_report report)
679 {
680         int i;
681         uint32_t link_modes = 0;
682
683         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
684                 if (eth_proto & MLX4_PROT_MASK(i))
685                         link_modes |= ptys2ethtool_map[i][report];
686         }
687         return link_modes;
688 }
689
690 static uint32_t ethtool2ptys_link_modes(uint32_t link_modes,
691                                         enum ethtool_report report)
692 {
693         int i;
694         uint32_t ptys_modes = 0;
695
696         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
697                 if (ptys2ethtool_map[i][report] & link_modes)
698                         ptys_modes |= 1 << i;
699         }
700         return ptys_modes;
701 }
702
703 /* Convert actual speed (SPEED_XXX) to ptys link modes */
704 static uint32_t speed2ptys_link_modes(uint32_t speed)
705 {
706         int i;
707         uint32_t ptys_modes = 0;
708
709         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
710                 if (ptys2ethtool_map[i][SPEED] == speed)
711                         ptys_modes |= 1 << i;
712         }
713         return ptys_modes;
714 }
715
716 static int ethtool_get_ptys_settings(struct ether *dev,
717                                      struct ethtool_cmd *cmd)
718 {
719         struct mlx4_en_priv *priv = netdev_priv(dev);
720         struct mlx4_ptys_reg ptys_reg;
721         uint32_t eth_proto;
722         int ret;
723
724         memset(&ptys_reg, 0, sizeof(ptys_reg));
725         ptys_reg.local_port = priv->port;
726         ptys_reg.proto_mask = MLX4_PTYS_EN;
727         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
728                                    MLX4_ACCESS_REG_QUERY, &ptys_reg);
729         if (ret) {
730                 en_warn(priv, "Failed to run mlx4_ACCESS_PTYS_REG status(%x)",
731                         ret);
732                 return ret;
733         }
734         en_dbg(DRV, priv, "ptys_reg.proto_mask       %x\n",
735                ptys_reg.proto_mask);
736         en_dbg(DRV, priv, "ptys_reg.eth_proto_cap    %x\n",
737                be32_to_cpu(ptys_reg.eth_proto_cap));
738         en_dbg(DRV, priv, "ptys_reg.eth_proto_admin  %x\n",
739                be32_to_cpu(ptys_reg.eth_proto_admin));
740         en_dbg(DRV, priv, "ptys_reg.eth_proto_oper   %x\n",
741                be32_to_cpu(ptys_reg.eth_proto_oper));
742         en_dbg(DRV, priv, "ptys_reg.eth_proto_lp_adv %x\n",
743                be32_to_cpu(ptys_reg.eth_proto_lp_adv));
744
745         cmd->supported = 0;
746         cmd->advertising = 0;
747
748         cmd->supported |= ptys_get_supported_port(&ptys_reg);
749
750         eth_proto = be32_to_cpu(ptys_reg.eth_proto_cap);
751         cmd->supported |= ptys2ethtool_link_modes(eth_proto, SUPPORTED);
752
753         eth_proto = be32_to_cpu(ptys_reg.eth_proto_admin);
754         cmd->advertising |= ptys2ethtool_link_modes(eth_proto, ADVERTISED);
755
756         cmd->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
757         cmd->advertising |= (priv->prof->tx_pause) ? ADVERTISED_Pause : 0;
758
759         cmd->advertising |= (priv->prof->tx_pause ^ priv->prof->rx_pause) ?
760                 ADVERTISED_Asym_Pause : 0;
761
762         cmd->port = ptys_get_active_port(&ptys_reg);
763         cmd->transceiver = (SUPPORTED_TP & cmd->supported) ?
764                 XCVR_EXTERNAL : XCVR_INTERNAL;
765
766         if (mlx4_en_autoneg_get(dev)) {
767                 cmd->supported |= SUPPORTED_Autoneg;
768                 cmd->advertising |= ADVERTISED_Autoneg;
769         }
770
771         cmd->autoneg = (priv->port_state.flags & MLX4_EN_PORT_ANC) ?
772                 AUTONEG_ENABLE : AUTONEG_DISABLE;
773
774         eth_proto = be32_to_cpu(ptys_reg.eth_proto_lp_adv);
775         cmd->lp_advertising = ptys2ethtool_link_modes(eth_proto, ADVERTISED);
776
777         cmd->lp_advertising |= (priv->port_state.flags & MLX4_EN_PORT_ANC) ?
778                         ADVERTISED_Autoneg : 0;
779
780         cmd->phy_address = 0;
781         cmd->mdio_support = 0;
782         cmd->maxtxpkt = 0;
783         cmd->maxrxpkt = 0;
784         cmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
785         cmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
786
787         return ret;
788 }
789
790 static void ethtool_get_default_settings(struct ether *dev,
791                                          struct ethtool_cmd *cmd)
792 {
793         struct mlx4_en_priv *priv = netdev_priv(dev);
794         int trans_type;
795
796         cmd->autoneg = AUTONEG_DISABLE;
797         cmd->supported = SUPPORTED_10000baseT_Full;
798         cmd->advertising = ADVERTISED_10000baseT_Full;
799         trans_type = priv->port_state.transceiver;
800
801         if (trans_type > 0 && trans_type <= 0xC) {
802                 cmd->port = PORT_FIBRE;
803                 cmd->transceiver = XCVR_EXTERNAL;
804                 cmd->supported |= SUPPORTED_FIBRE;
805                 cmd->advertising |= ADVERTISED_FIBRE;
806         } else if (trans_type == 0x80 || trans_type == 0) {
807                 cmd->port = PORT_TP;
808                 cmd->transceiver = XCVR_INTERNAL;
809                 cmd->supported |= SUPPORTED_TP;
810                 cmd->advertising |= ADVERTISED_TP;
811         } else  {
812                 cmd->port = -1;
813                 cmd->transceiver = -1;
814         }
815 }
816
817 static int mlx4_en_get_settings(struct ether *dev, struct ethtool_cmd *cmd)
818 {
819         struct mlx4_en_priv *priv = netdev_priv(dev);
820         int ret = -EINVAL;
821
822         if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
823                 return -ENOMEM;
824
825         en_dbg(DRV, priv, "query port state.flags ANC(%x) ANE(%x)\n",
826                priv->port_state.flags & MLX4_EN_PORT_ANC,
827                priv->port_state.flags & MLX4_EN_PORT_ANE);
828
829         if (priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL)
830                 ret = ethtool_get_ptys_settings(dev, cmd);
831         if (ret) /* ETH PROT CRTL is not supported or PTYS CMD failed */
832                 ethtool_get_default_settings(dev, cmd);
833
834         if (netif_carrier_ok(dev)) {
835                 ethtool_cmd_speed_set(cmd, priv->port_state.link_speed);
836                 cmd->duplex = DUPLEX_FULL;
837         } else {
838                 ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN);
839                 cmd->duplex = DUPLEX_UNKNOWN;
840         }
841         return 0;
842 }
843
844 /* Calculate PTYS admin according ethtool speed (SPEED_XXX) */
845 static __be32 speed_set_ptys_admin(struct mlx4_en_priv *priv, uint32_t speed,
846                                    __be32 proto_cap)
847 {
848         __be32 proto_admin = 0;
849
850         if (!speed) { /* Speed = 0 ==> Reset Link modes */
851                 proto_admin = proto_cap;
852                 en_info(priv, "Speed was set to 0, Reset advertised Link Modes to default (%x)\n",
853                         be32_to_cpu(proto_cap));
854         } else {
855                 uint32_t ptys_link_modes = speed2ptys_link_modes(speed);
856
857                 proto_admin = cpu_to_be32(ptys_link_modes) & proto_cap;
858                 en_info(priv, "Setting Speed to %d\n", speed);
859         }
860         return proto_admin;
861 }
862
863 static int mlx4_en_set_settings(struct ether *dev, struct ethtool_cmd *cmd)
864 {
865         struct mlx4_en_priv *priv = netdev_priv(dev);
866         struct mlx4_ptys_reg ptys_reg;
867         __be32 proto_admin;
868         int ret;
869
870         uint32_t ptys_adv = ethtool2ptys_link_modes(cmd->advertising, ADVERTISED);
871         int speed = ethtool_cmd_speed(cmd);
872
873         en_dbg(DRV, priv, "Set Speed=%d adv=0x%x autoneg=%d duplex=%d\n",
874                speed, cmd->advertising, cmd->autoneg, cmd->duplex);
875
876         if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL) ||
877             (cmd->duplex == DUPLEX_HALF))
878                 return -EINVAL;
879
880         memset(&ptys_reg, 0, sizeof(ptys_reg));
881         ptys_reg.local_port = priv->port;
882         ptys_reg.proto_mask = MLX4_PTYS_EN;
883         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
884                                    MLX4_ACCESS_REG_QUERY, &ptys_reg);
885         if (ret) {
886                 en_warn(priv, "Failed to QUERY mlx4_ACCESS_PTYS_REG status(%x)\n",
887                         ret);
888                 return 0;
889         }
890
891         proto_admin = cmd->autoneg == AUTONEG_ENABLE ?
892                 cpu_to_be32(ptys_adv) :
893                 speed_set_ptys_admin(priv, speed,
894                                      ptys_reg.eth_proto_cap);
895
896         proto_admin &= ptys_reg.eth_proto_cap;
897         if (!proto_admin) {
898                 en_warn(priv, "Not supported link mode(s) requested, check supported link modes.\n");
899                 return -EINVAL; /* nothing to change due to bad input */
900         }
901
902         if (proto_admin == ptys_reg.eth_proto_admin)
903                 return 0; /* Nothing to change */
904
905         en_dbg(DRV, priv, "mlx4_ACCESS_PTYS_REG SET: ptys_reg.eth_proto_admin = 0x%x\n",
906                be32_to_cpu(proto_admin));
907
908         ptys_reg.eth_proto_admin = proto_admin;
909         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev, MLX4_ACCESS_REG_WRITE,
910                                    &ptys_reg);
911         if (ret) {
912                 en_warn(priv, "Failed to write mlx4_ACCESS_PTYS_REG eth_proto_admin(0x%x) status(0x%x)",
913                         be32_to_cpu(ptys_reg.eth_proto_admin), ret);
914                 return ret;
915         }
916
917         qlock(&priv->mdev->state_lock);
918         if (priv->port_up) {
919                 en_warn(priv, "Port link mode changed, restarting port...\n");
920                 mlx4_en_stop_port(dev, 1);
921                 if (mlx4_en_start_port(dev))
922                         en_err(priv, "Failed restarting port %d\n", priv->port);
923         }
924         qunlock(&priv->mdev->state_lock);
925         return 0;
926 }
927
928 static int mlx4_en_get_coalesce(struct ether *dev,
929                                 struct ethtool_coalesce *coal)
930 {
931         struct mlx4_en_priv *priv = netdev_priv(dev);
932
933         coal->tx_coalesce_usecs = priv->tx_usecs;
934         coal->tx_max_coalesced_frames = priv->tx_frames;
935         coal->tx_max_coalesced_frames_irq = priv->tx_work_limit;
936
937         coal->rx_coalesce_usecs = priv->rx_usecs;
938         coal->rx_max_coalesced_frames = priv->rx_frames;
939
940         coal->pkt_rate_low = priv->pkt_rate_low;
941         coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
942         coal->pkt_rate_high = priv->pkt_rate_high;
943         coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
944         coal->rate_sample_interval = priv->sample_interval;
945         coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
946
947         return 0;
948 }
949
950 static int mlx4_en_set_coalesce(struct ether *dev,
951                                 struct ethtool_coalesce *coal)
952 {
953         struct mlx4_en_priv *priv = netdev_priv(dev);
954
955         if (!coal->tx_max_coalesced_frames_irq)
956                 return -EINVAL;
957
958         priv->rx_frames = (coal->rx_max_coalesced_frames ==
959                            MLX4_EN_AUTO_CONF) ?
960                                 MLX4_EN_RX_COAL_TARGET :
961                                 coal->rx_max_coalesced_frames;
962         priv->rx_usecs = (coal->rx_coalesce_usecs ==
963                           MLX4_EN_AUTO_CONF) ?
964                                 MLX4_EN_RX_COAL_TIME :
965                                 coal->rx_coalesce_usecs;
966
967         /* Setting TX coalescing parameters */
968         if (coal->tx_coalesce_usecs != priv->tx_usecs ||
969             coal->tx_max_coalesced_frames != priv->tx_frames) {
970                 priv->tx_usecs = coal->tx_coalesce_usecs;
971                 priv->tx_frames = coal->tx_max_coalesced_frames;
972         }
973
974         /* Set adaptive coalescing params */
975         priv->pkt_rate_low = coal->pkt_rate_low;
976         priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
977         priv->pkt_rate_high = coal->pkt_rate_high;
978         priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
979         priv->sample_interval = coal->rate_sample_interval;
980         priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
981         priv->tx_work_limit = coal->tx_max_coalesced_frames_irq;
982
983         return mlx4_en_moderation_update(priv);
984 }
985
986 static int mlx4_en_set_pauseparam(struct ether *dev,
987                                   struct ethtool_pauseparam *pause)
988 {
989         struct mlx4_en_priv *priv = netdev_priv(dev);
990         struct mlx4_en_dev *mdev = priv->mdev;
991         int err;
992
993         if (pause->autoneg)
994                 return -EINVAL;
995
996         priv->prof->tx_pause = pause->tx_pause != 0;
997         priv->prof->rx_pause = pause->rx_pause != 0;
998         err = mlx4_SET_PORT_general(mdev->dev, priv->port,
999                                     priv->rx_skb_size + ETH_FCS_LEN,
1000                                     priv->prof->tx_pause,
1001                                     priv->prof->tx_ppp,
1002                                     priv->prof->rx_pause,
1003                                     priv->prof->rx_ppp);
1004         if (err)
1005                 en_err(priv, "Failed setting pause params\n");
1006         else
1007                 mlx4_en_update_pfc_stats_bitmap(mdev->dev, &priv->stats_bitmap,
1008                                                 priv->prof->rx_ppp,
1009                                                 priv->prof->rx_pause,
1010                                                 priv->prof->tx_ppp,
1011                                                 priv->prof->tx_pause);
1012
1013         return err;
1014 }
1015
1016 static void mlx4_en_get_pauseparam(struct ether *dev,
1017                                    struct ethtool_pauseparam *pause)
1018 {
1019         struct mlx4_en_priv *priv = netdev_priv(dev);
1020
1021         pause->tx_pause = priv->prof->tx_pause;
1022         pause->rx_pause = priv->prof->rx_pause;
1023 }
1024
1025 static int mlx4_en_set_ringparam(struct ether *dev,
1026                                  struct ethtool_ringparam *param)
1027 {
1028         struct mlx4_en_priv *priv = netdev_priv(dev);
1029         struct mlx4_en_dev *mdev = priv->mdev;
1030         uint32_t rx_size, tx_size;
1031         int port_up = 0;
1032         int err = 0;
1033
1034         if (param->rx_jumbo_pending || param->rx_mini_pending)
1035                 return -EINVAL;
1036
1037         rx_size = ROUNDUPPWR2(param->rx_pending);
1038         rx_size = MAX_T(uint32_t, rx_size, MLX4_EN_MIN_RX_SIZE);
1039         rx_size = MIN_T(uint32_t, rx_size, MLX4_EN_MAX_RX_SIZE);
1040         tx_size = ROUNDUPPWR2(param->tx_pending);
1041         tx_size = MAX_T(uint32_t, tx_size, MLX4_EN_MIN_TX_SIZE);
1042         tx_size = MIN_T(uint32_t, tx_size, MLX4_EN_MAX_TX_SIZE);
1043
1044         if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size :
1045                                         priv->rx_ring[0]->size) &&
1046             tx_size == priv->tx_ring[0]->size)
1047                 return 0;
1048
1049         qlock(&mdev->state_lock);
1050         if (priv->port_up) {
1051                 port_up = 1;
1052                 mlx4_en_stop_port(dev, 1);
1053         }
1054
1055         mlx4_en_free_resources(priv);
1056
1057         priv->prof->tx_ring_size = tx_size;
1058         priv->prof->rx_ring_size = rx_size;
1059
1060         err = mlx4_en_alloc_resources(priv);
1061         if (err) {
1062                 en_err(priv, "Failed reallocating port resources\n");
1063                 goto out;
1064         }
1065         if (port_up) {
1066                 err = mlx4_en_start_port(dev);
1067                 if (err)
1068                         en_err(priv, "Failed starting port\n");
1069         }
1070
1071         err = mlx4_en_moderation_update(priv);
1072
1073 out:
1074         qunlock(&mdev->state_lock);
1075         return err;
1076 }
1077
1078 static void mlx4_en_get_ringparam(struct ether *dev,
1079                                   struct ethtool_ringparam *param)
1080 {
1081         struct mlx4_en_priv *priv = netdev_priv(dev);
1082
1083         memset(param, 0, sizeof(*param));
1084         param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
1085         param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
1086         param->rx_pending = priv->port_up ?
1087                 priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size;
1088         param->tx_pending = priv->tx_ring[0]->size;
1089 }
1090
1091 static uint32_t mlx4_en_get_rxfh_indir_size(struct ether *dev)
1092 {
1093         struct mlx4_en_priv *priv = netdev_priv(dev);
1094
1095         return priv->rx_ring_num;
1096 }
1097
1098 static uint32_t mlx4_en_get_rxfh_key_size(struct ether *netdev)
1099 {
1100         return MLX4_EN_RSS_KEY_SIZE;
1101 }
1102
1103 static int mlx4_en_check_rxfh_func(struct ether *dev, uint8_t hfunc)
1104 {
1105         struct mlx4_en_priv *priv = netdev_priv(dev);
1106
1107         /* check if requested function is supported by the device */
1108         if (hfunc == ETH_RSS_HASH_TOP) {
1109                 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP))
1110                         return -EINVAL;
1111                 if (!(dev->feat & NETIF_F_RXHASH))
1112                         en_warn(priv, "Toeplitz hash function should be used in conjunction with RX hashing for optimal performance\n");
1113                 return 0;
1114         } else if (hfunc == ETH_RSS_HASH_XOR) {
1115                 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR))
1116                         return -EINVAL;
1117                 if (dev->feat & NETIF_F_RXHASH)
1118                         en_warn(priv, "Enabling both XOR Hash function and RX Hashing can limit RPS functionality\n");
1119                 return 0;
1120         }
1121
1122         return -EINVAL;
1123 }
1124
1125 static int mlx4_en_get_rxfh(struct ether *dev, uint32_t *ring_index,
1126                             uint8_t *key,
1127                             uint8_t *hfunc)
1128 {
1129         struct mlx4_en_priv *priv = netdev_priv(dev);
1130         struct mlx4_en_rss_map *rss_map = &priv->rss_map;
1131         int rss_rings;
1132         size_t n = priv->rx_ring_num;
1133         int err = 0;
1134
1135         rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num;
1136         rss_rings = 1 << LOG2_UP(rss_rings);
1137
1138         while (n--) {
1139                 if (!ring_index)
1140                         break;
1141                 ring_index[n] = rss_map->qps[n % rss_rings].qpn -
1142                         rss_map->base_qpn;
1143         }
1144         if (key)
1145                 memcpy(key, priv->rss_key, MLX4_EN_RSS_KEY_SIZE);
1146         if (hfunc)
1147                 *hfunc = priv->rss_hash_fn;
1148         return err;
1149 }
1150
1151 static int mlx4_en_set_rxfh(struct ether *dev,
1152                             const uint32_t *ring_index,
1153                             const uint8_t *key, const uint8_t hfunc)
1154 {
1155         struct mlx4_en_priv *priv = netdev_priv(dev);
1156         struct mlx4_en_dev *mdev = priv->mdev;
1157         int port_up = 0;
1158         int err = 0;
1159         int i;
1160         int rss_rings = 0;
1161
1162         /* Calculate RSS table size and make sure flows are spread evenly
1163          * between rings
1164          */
1165         for (i = 0; i < priv->rx_ring_num; i++) {
1166                 if (!ring_index)
1167                         continue;
1168                 if (i > 0 && !ring_index[i] && !rss_rings)
1169                         rss_rings = i;
1170
1171                 if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num)))
1172                         return -EINVAL;
1173         }
1174
1175         if (!rss_rings)
1176                 rss_rings = priv->rx_ring_num;
1177
1178         /* RSS table size must be an order of 2 */
1179         if (!IS_PWR2(rss_rings))
1180                 return -EINVAL;
1181
1182         if (hfunc != ETH_RSS_HASH_NO_CHANGE) {
1183                 err = mlx4_en_check_rxfh_func(dev, hfunc);
1184                 if (err)
1185                         return err;
1186         }
1187
1188         qlock(&mdev->state_lock);
1189         if (priv->port_up) {
1190                 port_up = 1;
1191                 mlx4_en_stop_port(dev, 1);
1192         }
1193
1194         if (ring_index)
1195                 priv->prof->rss_rings = rss_rings;
1196         if (key)
1197                 memcpy(priv->rss_key, key, MLX4_EN_RSS_KEY_SIZE);
1198         if (hfunc !=  ETH_RSS_HASH_NO_CHANGE)
1199                 priv->rss_hash_fn = hfunc;
1200
1201         if (port_up) {
1202                 err = mlx4_en_start_port(dev);
1203                 if (err)
1204                         en_err(priv, "Failed starting port\n");
1205         }
1206
1207         qunlock(&mdev->state_lock);
1208         return err;
1209 }
1210
1211 #define all_zeros_or_all_ones(field)            \
1212         ((field) == 0 || (field) == (__force typeof(field))-1)
1213
1214 static int mlx4_en_validate_flow(struct ether *dev,
1215                                  struct ethtool_rxnfc *cmd)
1216 {
1217         struct ethtool_usrip4_spec *l3_mask;
1218         struct ethtool_tcpip4_spec *l4_mask;
1219         struct ethhdr *eth_mask;
1220
1221         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1222                 return -EINVAL;
1223
1224         if (cmd->fs.flow_type & FLOW_MAC_EXT) {
1225                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
1226                 if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
1227                         return -EINVAL;
1228         }
1229
1230         switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1231         case TCP_V4_FLOW:
1232         case UDP_V4_FLOW:
1233                 if (cmd->fs.m_u.tcp_ip4_spec.tos)
1234                         return -EINVAL;
1235                 l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1236                 /* don't allow mask which isn't all 0 or 1 */
1237                 if (!all_zeros_or_all_ones(l4_mask->ip4src) ||
1238                     !all_zeros_or_all_ones(l4_mask->ip4dst) ||
1239                     !all_zeros_or_all_ones(l4_mask->psrc) ||
1240                     !all_zeros_or_all_ones(l4_mask->pdst))
1241                         return -EINVAL;
1242                 break;
1243         case IP_USER_FLOW:
1244                 l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1245                 if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto ||
1246                     cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 ||
1247                     (!l3_mask->ip4src && !l3_mask->ip4dst) ||
1248                     !all_zeros_or_all_ones(l3_mask->ip4src) ||
1249                     !all_zeros_or_all_ones(l3_mask->ip4dst))
1250                         return -EINVAL;
1251                 break;
1252         case ETHER_FLOW:
1253                 eth_mask = &cmd->fs.m_u.ether_spec;
1254                 /* source mac mask must not be set */
1255                 if (!is_zero_ether_addr(eth_mask->h_source))
1256                         return -EINVAL;
1257
1258                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
1259                 if (!is_broadcast_ether_addr(eth_mask->h_dest))
1260                         return -EINVAL;
1261
1262                 if (!all_zeros_or_all_ones(eth_mask->h_proto))
1263                         return -EINVAL;
1264                 break;
1265         default:
1266                 return -EINVAL;
1267         }
1268
1269         if ((cmd->fs.flow_type & FLOW_EXT)) {
1270                 if (cmd->fs.m_ext.vlan_etype ||
1271                     !((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1272                       0 ||
1273                       (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1274                       cpu_to_be16(VLAN_VID_MASK)))
1275                         return -EINVAL;
1276
1277                 if (cmd->fs.m_ext.vlan_tci) {
1278                         if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID)
1279                                 return -EINVAL;
1280
1281                 }
1282         }
1283
1284         return 0;
1285 }
1286
1287 static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd,
1288                                         struct list_head *rule_list_h,
1289                                         struct mlx4_spec_list *spec_l2,
1290                                         unsigned char *mac)
1291 {
1292         int err = 0;
1293         __be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16);
1294
1295         spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
1296         memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, Eaddrlen);
1297         memcpy(spec_l2->eth.dst_mac, mac, Eaddrlen);
1298
1299         if ((cmd->fs.flow_type & FLOW_EXT) &&
1300             (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) {
1301                 spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci;
1302                 spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK);
1303         }
1304
1305         list_add_tail(&spec_l2->list, rule_list_h);
1306
1307         return err;
1308 }
1309
1310 static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv,
1311                                                 struct ethtool_rxnfc *cmd,
1312                                                 struct list_head *rule_list_h,
1313                                                 struct mlx4_spec_list *spec_l2,
1314                                                 __be32 ipv4_dst)
1315 {
1316 #ifdef CONFIG_INET
1317         unsigned char mac[Eaddrlen];
1318
1319         if (!ipv4_is_multicast(ipv4_dst)) {
1320                 if (cmd->fs.flow_type & FLOW_MAC_EXT)
1321                         memcpy(&mac, cmd->fs.h_ext.h_dest, Eaddrlen);
1322                 else
1323                         memcpy(&mac, priv->dev->ea, Eaddrlen);
1324         } else {
1325                 ip_eth_mc_map(ipv4_dst, mac);
1326         }
1327
1328         return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]);
1329 #else
1330         return -EINVAL;
1331 #endif
1332 }
1333
1334 static int add_ip_rule(struct mlx4_en_priv *priv,
1335                        struct ethtool_rxnfc *cmd,
1336                        struct list_head *list_h)
1337 {
1338         int err;
1339         struct mlx4_spec_list *spec_l2 = NULL;
1340         struct mlx4_spec_list *spec_l3 = NULL;
1341         struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1342
1343         spec_l3 = kzmalloc(sizeof(*spec_l3), MEM_WAIT);
1344         spec_l2 = kzmalloc(sizeof(*spec_l2), MEM_WAIT);
1345         if (!spec_l2 || !spec_l3) {
1346                 err = -ENOMEM;
1347                 goto free_spec;
1348         }
1349
1350         err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2,
1351                                                    cmd->fs.h_u.
1352                                                    usr_ip4_spec.ip4dst);
1353         if (err)
1354                 goto free_spec;
1355         spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1356         spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src;
1357         if (l3_mask->ip4src)
1358                 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1359         spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst;
1360         if (l3_mask->ip4dst)
1361                 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1362         list_add_tail(&spec_l3->list, list_h);
1363
1364         return 0;
1365
1366 free_spec:
1367         kfree(spec_l2);
1368         kfree(spec_l3);
1369         return err;
1370 }
1371
1372 static int add_tcp_udp_rule(struct mlx4_en_priv *priv,
1373                              struct ethtool_rxnfc *cmd,
1374                              struct list_head *list_h, int proto)
1375 {
1376         int err;
1377         struct mlx4_spec_list *spec_l2 = NULL;
1378         struct mlx4_spec_list *spec_l3 = NULL;
1379         struct mlx4_spec_list *spec_l4 = NULL;
1380         struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1381
1382         spec_l2 = kzmalloc(sizeof(*spec_l2), MEM_WAIT);
1383         spec_l3 = kzmalloc(sizeof(*spec_l3), MEM_WAIT);
1384         spec_l4 = kzmalloc(sizeof(*spec_l4), MEM_WAIT);
1385         if (!spec_l2 || !spec_l3 || !spec_l4) {
1386                 err = -ENOMEM;
1387                 goto free_spec;
1388         }
1389
1390         spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1391
1392         if (proto == TCP_V4_FLOW) {
1393                 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1394                                                            spec_l2,
1395                                                            cmd->fs.h_u.
1396                                                            tcp_ip4_spec.ip4dst);
1397                 if (err)
1398                         goto free_spec;
1399                 spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP;
1400                 spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src;
1401                 spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst;
1402                 spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc;
1403                 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst;
1404         } else {
1405                 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1406                                                            spec_l2,
1407                                                            cmd->fs.h_u.
1408                                                            udp_ip4_spec.ip4dst);
1409                 if (err)
1410                         goto free_spec;
1411                 spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP;
1412                 spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src;
1413                 spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst;
1414                 spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc;
1415                 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst;
1416         }
1417
1418         if (l4_mask->ip4src)
1419                 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1420         if (l4_mask->ip4dst)
1421                 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1422
1423         if (l4_mask->psrc)
1424                 spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK;
1425         if (l4_mask->pdst)
1426                 spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK;
1427
1428         list_add_tail(&spec_l3->list, list_h);
1429         list_add_tail(&spec_l4->list, list_h);
1430
1431         return 0;
1432
1433 free_spec:
1434         kfree(spec_l2);
1435         kfree(spec_l3);
1436         kfree(spec_l4);
1437         return err;
1438 }
1439
1440 static int mlx4_en_ethtool_to_net_trans_rule(struct ether *dev,
1441                                              struct ethtool_rxnfc *cmd,
1442                                              struct list_head *rule_list_h)
1443 {
1444         int err;
1445         struct ethhdr *eth_spec;
1446         struct mlx4_spec_list *spec_l2;
1447         struct mlx4_en_priv *priv = netdev_priv(dev);
1448
1449         err = mlx4_en_validate_flow(dev, cmd);
1450         if (err)
1451                 return err;
1452
1453         switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1454         case ETHER_FLOW:
1455                 spec_l2 = kzmalloc(sizeof(*spec_l2), MEM_WAIT);
1456                 if (!spec_l2)
1457                         return -ENOMEM;
1458
1459                 eth_spec = &cmd->fs.h_u.ether_spec;
1460                 mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2,
1461                                              &eth_spec->h_dest[0]);
1462                 spec_l2->eth.ether_type = eth_spec->h_proto;
1463                 if (eth_spec->h_proto)
1464                         spec_l2->eth.ether_type_enable = 1;
1465                 break;
1466         case IP_USER_FLOW:
1467                 err = add_ip_rule(priv, cmd, rule_list_h);
1468                 break;
1469         case TCP_V4_FLOW:
1470                 err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW);
1471                 break;
1472         case UDP_V4_FLOW:
1473                 err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW);
1474                 break;
1475         }
1476
1477         return err;
1478 }
1479
1480 static int mlx4_en_flow_replace(struct ether *dev,
1481                                 struct ethtool_rxnfc *cmd)
1482 {
1483         int err;
1484         struct mlx4_en_priv *priv = netdev_priv(dev);
1485         struct ethtool_flow_id *loc_rule;
1486         struct mlx4_spec_list *spec, *tmp_spec;
1487         uint32_t qpn;
1488         uint64_t reg_id;
1489
1490         struct mlx4_net_trans_rule rule = {
1491                 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
1492                 .exclusive = 0,
1493                 .allow_loopback = 1,
1494                 .promisc_mode = MLX4_FS_REGULAR,
1495         };
1496
1497         rule.port = priv->port;
1498         rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location;
1499         INIT_LIST_HEAD(&rule.list);
1500
1501         /* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */
1502         if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC)
1503                 qpn = priv->drop_qp.qpn;
1504         else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) {
1505                 qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1);
1506         } else {
1507                 if (cmd->fs.ring_cookie >= priv->rx_ring_num) {
1508                         en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n",
1509                                 cmd->fs.ring_cookie);
1510                         return -EINVAL;
1511                 }
1512                 qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn;
1513                 if (!qpn) {
1514                         en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n",
1515                                 cmd->fs.ring_cookie);
1516                         return -EINVAL;
1517                 }
1518         }
1519         rule.qpn = qpn;
1520         err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list);
1521         if (err)
1522                 goto out_free_list;
1523
1524         loc_rule = &priv->ethtool_rules[cmd->fs.location];
1525         if (loc_rule->id) {
1526                 err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id);
1527                 if (err) {
1528                         en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n",
1529                                cmd->fs.location, loc_rule->id);
1530                         goto out_free_list;
1531                 }
1532                 loc_rule->id = 0;
1533                 memset(&loc_rule->flow_spec, 0,
1534                        sizeof(struct ethtool_rx_flow_spec));
1535                 list_del(&loc_rule->list);
1536         }
1537         err = mlx4_flow_attach(priv->mdev->dev, &rule, &reg_id);
1538         if (err) {
1539                 en_err(priv, "Fail to attach network rule at location %d\n",
1540                        cmd->fs.location);
1541                 goto out_free_list;
1542         }
1543         loc_rule->id = reg_id;
1544         memcpy(&loc_rule->flow_spec, &cmd->fs,
1545                sizeof(struct ethtool_rx_flow_spec));
1546         list_add_tail(&loc_rule->list, &priv->ethtool_list);
1547
1548 out_free_list:
1549         list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) {
1550                 list_del(&spec->list);
1551                 kfree(spec);
1552         }
1553         return err;
1554 }
1555
1556 static int mlx4_en_flow_detach(struct ether *dev,
1557                                struct ethtool_rxnfc *cmd)
1558 {
1559         int err = 0;
1560         struct ethtool_flow_id *rule;
1561         struct mlx4_en_priv *priv = netdev_priv(dev);
1562
1563         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1564                 return -EINVAL;
1565
1566         rule = &priv->ethtool_rules[cmd->fs.location];
1567         if (!rule->id) {
1568                 err =  -ENOENT;
1569                 goto out;
1570         }
1571
1572         err = mlx4_flow_detach(priv->mdev->dev, rule->id);
1573         if (err) {
1574                 en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n",
1575                        cmd->fs.location, rule->id);
1576                 goto out;
1577         }
1578         rule->id = 0;
1579         memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec));
1580         list_del(&rule->list);
1581 out:
1582         return err;
1583
1584 }
1585
1586 static int mlx4_en_get_flow(struct ether *dev, struct ethtool_rxnfc *cmd,
1587                             int loc)
1588 {
1589         int err = 0;
1590         struct ethtool_flow_id *rule;
1591         struct mlx4_en_priv *priv = netdev_priv(dev);
1592
1593         if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES)
1594                 return -EINVAL;
1595
1596         rule = &priv->ethtool_rules[loc];
1597         if (rule->id)
1598                 memcpy(&cmd->fs, &rule->flow_spec,
1599                        sizeof(struct ethtool_rx_flow_spec));
1600         else
1601                 err = -ENOENT;
1602
1603         return err;
1604 }
1605
1606 static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)
1607 {
1608
1609         int i, res = 0;
1610         for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
1611                 if (priv->ethtool_rules[i].id)
1612                         res++;
1613         }
1614         return res;
1615
1616 }
1617
1618 static int mlx4_en_get_rxnfc(struct ether *dev, struct ethtool_rxnfc *cmd,
1619                              uint32_t *rule_locs)
1620 {
1621         struct mlx4_en_priv *priv = netdev_priv(dev);
1622         struct mlx4_en_dev *mdev = priv->mdev;
1623         int err = 0;
1624         int i = 0, priority = 0;
1625
1626         if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT ||
1627              cmd->cmd == ETHTOOL_GRXCLSRULE ||
1628              cmd->cmd == ETHTOOL_GRXCLSRLALL) &&
1629             (mdev->dev->caps.steering_mode !=
1630              MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up))
1631                 return -EINVAL;
1632
1633         switch (cmd->cmd) {
1634         case ETHTOOL_GRXRINGS:
1635                 cmd->data = priv->rx_ring_num;
1636                 break;
1637         case ETHTOOL_GRXCLSRLCNT:
1638                 cmd->rule_cnt = mlx4_en_get_num_flows(priv);
1639                 break;
1640         case ETHTOOL_GRXCLSRULE:
1641                 err = mlx4_en_get_flow(dev, cmd, cmd->fs.location);
1642                 break;
1643         case ETHTOOL_GRXCLSRLALL:
1644                 while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) {
1645                         err = mlx4_en_get_flow(dev, cmd, i);
1646                         if (!err)
1647                                 rule_locs[priority++] = i;
1648                         i++;
1649                 }
1650                 err = 0;
1651                 break;
1652         default:
1653                 err = -EOPNOTSUPP;
1654                 break;
1655         }
1656
1657         return err;
1658 }
1659
1660 static int mlx4_en_set_rxnfc(struct ether *dev, struct ethtool_rxnfc *cmd)
1661 {
1662         int err = 0;
1663         struct mlx4_en_priv *priv = netdev_priv(dev);
1664         struct mlx4_en_dev *mdev = priv->mdev;
1665
1666         if (mdev->dev->caps.steering_mode !=
1667             MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)
1668                 return -EINVAL;
1669
1670         switch (cmd->cmd) {
1671         case ETHTOOL_SRXCLSRLINS:
1672                 err = mlx4_en_flow_replace(dev, cmd);
1673                 break;
1674         case ETHTOOL_SRXCLSRLDEL:
1675                 err = mlx4_en_flow_detach(dev, cmd);
1676                 break;
1677         default:
1678                 en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd);
1679                 return -EINVAL;
1680         }
1681
1682         return err;
1683 }
1684
1685 static void mlx4_en_get_channels(struct ether *dev,
1686                                  struct ethtool_channels *channel)
1687 {
1688         struct mlx4_en_priv *priv = netdev_priv(dev);
1689
1690         memset(channel, 0, sizeof(*channel));
1691
1692         channel->max_rx = MAX_RX_RINGS;
1693         channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
1694
1695         channel->rx_count = priv->rx_ring_num;
1696         channel->tx_count = priv->tx_ring_num / MLX4_EN_NUM_UP;
1697 }
1698
1699 static int mlx4_en_set_channels(struct ether *dev,
1700                                 struct ethtool_channels *channel)
1701 {
1702         struct mlx4_en_priv *priv = netdev_priv(dev);
1703         struct mlx4_en_dev *mdev = priv->mdev;
1704         int port_up = 0;
1705         int err = 0;
1706
1707         if (channel->other_count || channel->combined_count ||
1708             channel->tx_count > MLX4_EN_MAX_TX_RING_P_UP ||
1709             channel->rx_count > MAX_RX_RINGS ||
1710             !channel->tx_count || !channel->rx_count)
1711                 return -EINVAL;
1712
1713         qlock(&mdev->state_lock);
1714         if (priv->port_up) {
1715                 port_up = 1;
1716                 mlx4_en_stop_port(dev, 1);
1717         }
1718
1719         mlx4_en_free_resources(priv);
1720
1721         priv->num_tx_rings_p_up = channel->tx_count;
1722         priv->tx_ring_num = channel->tx_count * MLX4_EN_NUM_UP;
1723         priv->rx_ring_num = channel->rx_count;
1724
1725         err = mlx4_en_alloc_resources(priv);
1726         if (err) {
1727                 en_err(priv, "Failed reallocating port resources\n");
1728                 goto out;
1729         }
1730
1731         netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
1732         netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
1733
1734         if (dev->num_tc)
1735                 mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP);
1736
1737         en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num);
1738         en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
1739
1740         if (port_up) {
1741                 err = mlx4_en_start_port(dev);
1742                 if (err)
1743                         en_err(priv, "Failed starting port\n");
1744         }
1745
1746         err = mlx4_en_moderation_update(priv);
1747
1748 out:
1749         qunlock(&mdev->state_lock);
1750         return err;
1751 }
1752
1753 static int mlx4_en_get_ts_info(struct ether *dev,
1754                                struct ethtool_ts_info *info)
1755 {
1756         struct mlx4_en_priv *priv = netdev_priv(dev);
1757         struct mlx4_en_dev *mdev = priv->mdev;
1758         int ret;
1759
1760         ret = ethtool_op_get_ts_info(dev, info);
1761         if (ret)
1762                 return ret;
1763
1764         if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1765                 info->so_timestamping |=
1766                         SOF_TIMESTAMPING_TX_HARDWARE |
1767                         SOF_TIMESTAMPING_RX_HARDWARE |
1768                         SOF_TIMESTAMPING_RAW_HARDWARE;
1769
1770                 info->tx_types =
1771                         (1 << HWTSTAMP_TX_OFF) |
1772                         (1 << HWTSTAMP_TX_ON);
1773
1774                 info->rx_filters =
1775                         (1 << HWTSTAMP_FILTER_NONE) |
1776                         (1 << HWTSTAMP_FILTER_ALL);
1777
1778                 if (mdev->ptp_clock)
1779                         info->phc_index = ptp_clock_index(mdev->ptp_clock);
1780         }
1781
1782         return ret;
1783 }
1784
1785 static int mlx4_en_set_priv_flags(struct ether *dev, uint32_t flags)
1786 {
1787         struct mlx4_en_priv *priv = netdev_priv(dev);
1788         bool bf_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1789         bool bf_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1790         int i;
1791
1792         if (bf_enabled_new == bf_enabled_old)
1793                 return 0; /* Nothing to do */
1794
1795         if (bf_enabled_new) {
1796                 bool bf_supported = true;
1797
1798                 for (i = 0; i < priv->tx_ring_num; i++)
1799                         bf_supported &= priv->tx_ring[i]->bf_alloced;
1800
1801                 if (!bf_supported) {
1802                         en_err(priv, "BlueFlame is not supported\n");
1803                         return -EINVAL;
1804                 }
1805
1806                 priv->pflags |= MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1807         } else {
1808                 priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1809         }
1810
1811         for (i = 0; i < priv->tx_ring_num; i++)
1812                 priv->tx_ring[i]->bf_enabled = bf_enabled_new;
1813
1814         en_info(priv, "BlueFlame %s\n",
1815                 bf_enabled_new ?  "Enabled" : "Disabled");
1816
1817         return 0;
1818 }
1819
1820 static uint32_t mlx4_en_get_priv_flags(struct ether *dev)
1821 {
1822         struct mlx4_en_priv *priv = netdev_priv(dev);
1823
1824         return priv->pflags;
1825 }
1826
1827 static int mlx4_en_get_tunable(struct ether *dev,
1828                                const struct ethtool_tunable *tuna,
1829                                void *data)
1830 {
1831         const struct mlx4_en_priv *priv = netdev_priv(dev);
1832         int ret = 0;
1833
1834         switch (tuna->id) {
1835         case ETHTOOL_TX_COPYBREAK:
1836                 *(uint32_t *)data = priv->prof->inline_thold;
1837                 break;
1838         default:
1839                 ret = -EINVAL;
1840                 break;
1841         }
1842
1843         return ret;
1844 }
1845
1846 static int mlx4_en_set_tunable(struct ether *dev,
1847                                const struct ethtool_tunable *tuna,
1848                                const void *data)
1849 {
1850         struct mlx4_en_priv *priv = netdev_priv(dev);
1851         int val, ret = 0;
1852
1853         switch (tuna->id) {
1854         case ETHTOOL_TX_COPYBREAK:
1855                 val = *(uint32_t *)data;
1856                 if (val < MIN_PKT_LEN || val > MAX_INLINE)
1857                         ret = -EINVAL;
1858                 else
1859                         priv->prof->inline_thold = val;
1860                 break;
1861         default:
1862                 ret = -EINVAL;
1863                 break;
1864         }
1865
1866         return ret;
1867 }
1868
1869 static int mlx4_en_get_module_info(struct ether *dev,
1870                                    struct ethtool_modinfo *modinfo)
1871 {
1872         struct mlx4_en_priv *priv = netdev_priv(dev);
1873         struct mlx4_en_dev *mdev = priv->mdev;
1874         int ret;
1875         uint8_t data[4];
1876
1877         /* Read first 2 bytes to get Module & REV ID */
1878         ret = mlx4_get_module_info(mdev->dev, priv->port,
1879                                    0/*offset*/, 2/*size*/, data);
1880         if (ret < 2)
1881                 return -EIO;
1882
1883         switch (data[0] /* identifier */) {
1884         case MLX4_MODULE_ID_QSFP:
1885                 modinfo->type = ETH_MODULE_SFF_8436;
1886                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1887                 break;
1888         case MLX4_MODULE_ID_QSFP_PLUS:
1889                 if (data[1] >= 0x3) { /* revision id */
1890                         modinfo->type = ETH_MODULE_SFF_8636;
1891                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1892                 } else {
1893                         modinfo->type = ETH_MODULE_SFF_8436;
1894                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1895                 }
1896                 break;
1897         case MLX4_MODULE_ID_QSFP28:
1898                 modinfo->type = ETH_MODULE_SFF_8636;
1899                 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1900                 break;
1901         case MLX4_MODULE_ID_SFP:
1902                 modinfo->type = ETH_MODULE_SFF_8472;
1903                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1904                 break;
1905         default:
1906                 return -ENOSYS;
1907         }
1908
1909         return 0;
1910 }
1911
1912 static int mlx4_en_get_module_eeprom(struct ether *dev,
1913                                      struct ethtool_eeprom *ee,
1914                                      uint8_t *data)
1915 {
1916         struct mlx4_en_priv *priv = netdev_priv(dev);
1917         struct mlx4_en_dev *mdev = priv->mdev;
1918         int offset = ee->offset;
1919         int i = 0, ret;
1920
1921         if (ee->len == 0)
1922                 return -EINVAL;
1923
1924         memset(data, 0, ee->len);
1925
1926         while (i < ee->len) {
1927                 en_dbg(DRV, priv,
1928                        "mlx4_get_module_info i(%d) offset(%d) len(%d)\n",
1929                        i, offset, ee->len - i);
1930
1931                 ret = mlx4_get_module_info(mdev->dev, priv->port,
1932                                            offset, ee->len - i, data + i);
1933
1934                 if (!ret) /* Done reading */
1935                         return 0;
1936
1937                 if (ret < 0) {
1938                         en_err(priv,
1939                                "mlx4_get_module_info i(%d) offset(%d) bytes_to_read(%d) - FAILED (0x%x)\n",
1940                                i, offset, ee->len - i, ret);
1941                         return 0;
1942                 }
1943
1944                 i += ret;
1945                 offset += ret;
1946         }
1947         return 0;
1948 }
1949
1950 static int mlx4_en_set_phys_id(struct ether *dev,
1951                                enum ethtool_phys_id_state state)
1952 {
1953         int err;
1954         uint16_t beacon_duration;
1955         struct mlx4_en_priv *priv = netdev_priv(dev);
1956         struct mlx4_en_dev *mdev = priv->mdev;
1957
1958         if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_BEACON))
1959                 return -EOPNOTSUPP;
1960
1961         switch (state) {
1962         case ETHTOOL_ID_ACTIVE:
1963                 beacon_duration = PORT_BEACON_MAX_LIMIT;
1964                 break;
1965         case ETHTOOL_ID_INACTIVE:
1966                 beacon_duration = 0;
1967                 break;
1968         default:
1969                 return -EOPNOTSUPP;
1970         }
1971
1972         err = mlx4_SET_PORT_BEACON(mdev->dev, priv->port, beacon_duration);
1973         return err;
1974 }
1975
1976 const struct ethtool_ops mlx4_en_ethtool_ops = {
1977         .get_drvinfo = mlx4_en_get_drvinfo,
1978         .get_settings = mlx4_en_get_settings,
1979         .set_settings = mlx4_en_set_settings,
1980         .get_link = ethtool_op_get_link,
1981         .get_strings = mlx4_en_get_strings,
1982         .get_sset_count = mlx4_en_get_sset_count,
1983         .get_ethtool_stats = mlx4_en_get_ethtool_stats,
1984         .self_test = mlx4_en_self_test,
1985         .set_phys_id = mlx4_en_set_phys_id,
1986         .get_wol = mlx4_en_get_wol,
1987         .set_wol = mlx4_en_set_wol,
1988         .get_msglevel = mlx4_en_get_msglevel,
1989         .set_msglevel = mlx4_en_set_msglevel,
1990         .get_coalesce = mlx4_en_get_coalesce,
1991         .set_coalesce = mlx4_en_set_coalesce,
1992         .get_pauseparam = mlx4_en_get_pauseparam,
1993         .set_pauseparam = mlx4_en_set_pauseparam,
1994         .get_ringparam = mlx4_en_get_ringparam,
1995         .set_ringparam = mlx4_en_set_ringparam,
1996         .get_rxnfc = mlx4_en_get_rxnfc,
1997         .set_rxnfc = mlx4_en_set_rxnfc,
1998         .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
1999         .get_rxfh_key_size = mlx4_en_get_rxfh_key_size,
2000         .get_rxfh = mlx4_en_get_rxfh,
2001         .set_rxfh = mlx4_en_set_rxfh,
2002         .get_channels = mlx4_en_get_channels,
2003         .set_channels = mlx4_en_set_channels,
2004         .get_ts_info = mlx4_en_get_ts_info,
2005         .set_priv_flags = mlx4_en_set_priv_flags,
2006         .get_priv_flags = mlx4_en_get_priv_flags,
2007         .get_tunable            = mlx4_en_get_tunable,
2008         .set_tunable            = mlx4_en_set_tunable,
2009         .get_module_info = mlx4_en_get_module_info,
2010         .get_module_eeprom = mlx4_en_get_module_eeprom
2011 };
2012
2013
2014
2015
2016