BNX2X: Spatch memory allocations
[akaros.git] / kern / drivers / net / bnx2x / bnx2x_sp.c
1 /* bnx2x_sp.c: Broadcom Everest network driver.
2  *
3  * Copyright (c) 2011-2013 Broadcom Corporation
4  *
5  * Unless you and Broadcom execute a separate written software license
6  * agreement governing use of this software, this software is licensed to you
7  * under the terms of the GNU General Public License version 2, available
8  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9  *
10  * Notwithstanding the above, under no circumstances may you combine this
11  * software in any way with any other Broadcom software provided under a
12  * license other than the GPL, without Broadcom's express prior written
13  * consent.
14  *
15  * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
16  * Written by: Vladislav Zolotarov
17  *
18  */
19
20 #include "akaros_compat.h"
21
22 #include "bnx2x.h"
23 #include "bnx2x_cmn.h"
24 #include "bnx2x_sp.h"
25
26 #define BNX2X_MAX_EMUL_MULTI            16
27
28 /**** Exe Queue interfaces ****/
29
30 /**
31  * bnx2x_exe_queue_init - init the Exe Queue object
32  *
33  * @o:          pointer to the object
34  * @exe_len:    length
35  * @owner:      pointer to the owner
36  * @validate:   validate function pointer
37  * @optimize:   optimize function pointer
38  * @exec:       execute function pointer
39  * @get:        get function pointer
40  */
41 static inline void bnx2x_exe_queue_init(struct bnx2x *bp,
42                                         struct bnx2x_exe_queue_obj *o,
43                                         int exe_len,
44                                         union bnx2x_qable_obj *owner,
45                                         exe_q_validate validate,
46                                         exe_q_remove remove,
47                                         exe_q_optimize optimize,
48                                         exe_q_execute exec,
49                                         exe_q_get get)
50 {
51         memset(o, 0, sizeof(*o));
52
53         INIT_LIST_HEAD(&o->exe_queue);
54         INIT_LIST_HEAD(&o->pending_comp);
55
56         spinlock_init_irqsave(&o->lock);
57
58         o->exe_chunk_len = exe_len;
59         o->owner         = owner;
60
61         /* Owner specific callbacks */
62         o->validate      = validate;
63         o->remove        = remove;
64         o->optimize      = optimize;
65         o->execute       = exec;
66         o->get           = get;
67
68         DP(BNX2X_MSG_SP, "Setup the execution queue with the chunk length of %d\n",
69            exe_len);
70 }
71
72 static inline void bnx2x_exe_queue_free_elem(struct bnx2x *bp,
73                                              struct bnx2x_exeq_elem *elem)
74 {
75         DP(BNX2X_MSG_SP, "Deleting an exe_queue element\n");
76         kfree(elem);
77 }
78
79 static inline int bnx2x_exe_queue_length(struct bnx2x_exe_queue_obj *o)
80 {
81         struct bnx2x_exeq_elem *elem;
82         int cnt = 0;
83
84         spin_lock(&o->lock);
85
86         list_for_each_entry(elem, &o->exe_queue, link)
87                 cnt++;
88
89         spin_unlock(&o->lock);
90
91         return cnt;
92 }
93
94 /**
95  * bnx2x_exe_queue_add - add a new element to the execution queue
96  *
97  * @bp:         driver handle
98  * @o:          queue
99  * @cmd:        new command to add
100  * @restore:    true - do not optimize the command
101  *
102  * If the element is optimized or is illegal, frees it.
103  */
104 static inline int bnx2x_exe_queue_add(struct bnx2x *bp,
105                                       struct bnx2x_exe_queue_obj *o,
106                                       struct bnx2x_exeq_elem *elem,
107                                       bool restore)
108 {
109         int rc;
110
111         spin_lock(&o->lock);
112
113         if (!restore) {
114                 /* Try to cancel this element queue */
115                 rc = o->optimize(bp, o->owner, elem);
116                 if (rc)
117                         goto free_and_exit;
118
119                 /* Check if this request is ok */
120                 rc = o->validate(bp, o->owner, elem);
121                 if (rc) {
122                         DP(BNX2X_MSG_SP, "Preamble failed: %d\n", rc);
123                         goto free_and_exit;
124                 }
125         }
126
127         /* If so, add it to the execution queue */
128         list_add_tail(&elem->link, &o->exe_queue);
129
130         spin_unlock(&o->lock);
131
132         return 0;
133
134 free_and_exit:
135         bnx2x_exe_queue_free_elem(bp, elem);
136
137         spin_unlock(&o->lock);
138
139         return rc;
140 }
141
142 static inline void __bnx2x_exe_queue_reset_pending(
143         struct bnx2x *bp,
144         struct bnx2x_exe_queue_obj *o)
145 {
146         struct bnx2x_exeq_elem *elem;
147
148         while (!list_empty(&o->pending_comp)) {
149                 elem = list_first_entry(&o->pending_comp,
150                                         struct bnx2x_exeq_elem, link);
151
152                 list_del(&elem->link);
153                 bnx2x_exe_queue_free_elem(bp, elem);
154         }
155 }
156
157 /**
158  * bnx2x_exe_queue_step - execute one execution chunk atomically
159  *
160  * @bp:                 driver handle
161  * @o:                  queue
162  * @ramrod_flags:       flags
163  *
164  * (Should be called while holding the exe_queue->lock).
165  */
166 static inline int bnx2x_exe_queue_step(struct bnx2x *bp,
167                                        struct bnx2x_exe_queue_obj *o,
168                                        unsigned long *ramrod_flags)
169 {
170         struct bnx2x_exeq_elem *elem, spacer;
171         int cur_len = 0, rc;
172
173         memset(&spacer, 0, sizeof(spacer));
174
175         /* Next step should not be performed until the current is finished,
176          * unless a DRV_CLEAR_ONLY bit is set. In this case we just want to
177          * properly clear object internals without sending any command to the FW
178          * which also implies there won't be any completion to clear the
179          * 'pending' list.
180          */
181         if (!list_empty(&o->pending_comp)) {
182                 if (test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags)) {
183                         DP(BNX2X_MSG_SP, "RAMROD_DRV_CLR_ONLY requested: resetting a pending_comp list\n");
184                         __bnx2x_exe_queue_reset_pending(bp, o);
185                 } else {
186                         return 1;
187                 }
188         }
189
190         /* Run through the pending commands list and create a next
191          * execution chunk.
192          */
193         while (!list_empty(&o->exe_queue)) {
194                 elem = list_first_entry(&o->exe_queue, struct bnx2x_exeq_elem,
195                                         link);
196                 WARN_ON(!elem->cmd_len);
197
198                 if (cur_len + elem->cmd_len <= o->exe_chunk_len) {
199                         cur_len += elem->cmd_len;
200                         /* Prevent from both lists being empty when moving an
201                          * element. This will allow the call of
202                          * bnx2x_exe_queue_empty() without locking.
203                          */
204                         list_add_tail(&spacer.link, &o->pending_comp);
205                         mb();
206                         list_move_tail(&elem->link, &o->pending_comp);
207                         list_del(&spacer.link);
208                 } else
209                         break;
210         }
211
212         /* Sanity check */
213         if (!cur_len)
214                 return 0;
215
216         rc = o->execute(bp, o->owner, &o->pending_comp, ramrod_flags);
217         if (rc < 0)
218                 /* In case of an error return the commands back to the queue
219                  * and reset the pending_comp.
220                  */
221                 list_splice_init(&o->pending_comp, &o->exe_queue);
222         else if (!rc)
223                 /* If zero is returned, means there are no outstanding pending
224                  * completions and we may dismiss the pending list.
225                  */
226                 __bnx2x_exe_queue_reset_pending(bp, o);
227
228         return rc;
229 }
230
231 static inline bool bnx2x_exe_queue_empty(struct bnx2x_exe_queue_obj *o)
232 {
233         bool empty = list_empty(&o->exe_queue);
234
235         /* Don't reorder!!! */
236         mb();
237
238         return empty && list_empty(&o->pending_comp);
239 }
240
241 static inline struct bnx2x_exeq_elem *bnx2x_exe_queue_alloc_elem(
242         struct bnx2x *bp)
243 {
244         DP(BNX2X_MSG_SP, "Allocating a new exe_queue element\n");
245         return kzmalloc(sizeof(struct bnx2x_exeq_elem), 0);
246 }
247
248 /************************ raw_obj functions ***********************************/
249 static bool bnx2x_raw_check_pending(struct bnx2x_raw_obj *o)
250 {
251         return !!test_bit(o->state, o->pstate);
252 }
253
254 static void bnx2x_raw_clear_pending(struct bnx2x_raw_obj *o)
255 {
256         cmb();
257         clear_bit(o->state, o->pstate);
258         cmb();
259 }
260
261 static void bnx2x_raw_set_pending(struct bnx2x_raw_obj *o)
262 {
263         cmb();
264         set_bit(o->state, o->pstate);
265         cmb();
266 }
267
268 /**
269  * bnx2x_state_wait - wait until the given bit(state) is cleared
270  *
271  * @bp:         device handle
272  * @state:      state which is to be cleared
273  * @state_p:    state buffer
274  *
275  */
276 static inline int bnx2x_state_wait(struct bnx2x *bp, int state,
277                                    unsigned long *pstate)
278 {
279         /* can take a while if any port is running */
280         int cnt = 5000;
281
282         if (CHIP_REV_IS_EMUL(bp))
283                 cnt *= 20;
284
285         DP(BNX2X_MSG_SP, "waiting for state to become %d\n", state);
286
287         might_sleep();
288         while (cnt--) {
289                 if (!test_bit(state, pstate)) {
290 #ifdef BNX2X_STOP_ON_ERROR
291                         DP(BNX2X_MSG_SP, "exit  (cnt %d)\n", 5000 - cnt);
292 #endif
293                         return 0;
294                 }
295
296                 kthread_usleep(1000);
297
298                 if (bp->panic)
299                         return -EIO;
300         }
301
302         /* timeout! */
303         BNX2X_ERR("timeout waiting for state %d\n", state);
304 #ifdef BNX2X_STOP_ON_ERROR
305         bnx2x_panic();
306 #endif
307
308         return -EBUSY;
309 }
310
311 static int bnx2x_raw_wait(struct bnx2x *bp, struct bnx2x_raw_obj *raw)
312 {
313         return bnx2x_state_wait(bp, raw->state, raw->pstate);
314 }
315
316 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
317 /* credit handling callbacks */
318 static bool bnx2x_get_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int *offset)
319 {
320         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
321
322         WARN_ON(!mp);
323
324         return mp->get_entry(mp, offset);
325 }
326
327 static bool bnx2x_get_credit_mac(struct bnx2x_vlan_mac_obj *o)
328 {
329         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
330
331         WARN_ON(!mp);
332
333         return mp->get(mp, 1);
334 }
335
336 static bool bnx2x_get_cam_offset_vlan(struct bnx2x_vlan_mac_obj *o, int *offset)
337 {
338         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
339
340         WARN_ON(!vp);
341
342         return vp->get_entry(vp, offset);
343 }
344
345 static bool bnx2x_get_credit_vlan(struct bnx2x_vlan_mac_obj *o)
346 {
347         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
348
349         WARN_ON(!vp);
350
351         return vp->get(vp, 1);
352 }
353 static bool bnx2x_put_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int offset)
354 {
355         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
356
357         return mp->put_entry(mp, offset);
358 }
359
360 static bool bnx2x_put_credit_mac(struct bnx2x_vlan_mac_obj *o)
361 {
362         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
363
364         return mp->put(mp, 1);
365 }
366
367 static bool bnx2x_put_cam_offset_vlan(struct bnx2x_vlan_mac_obj *o, int offset)
368 {
369         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
370
371         return vp->put_entry(vp, offset);
372 }
373
374 static bool bnx2x_put_credit_vlan(struct bnx2x_vlan_mac_obj *o)
375 {
376         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
377
378         return vp->put(vp, 1);
379 }
380
381 /**
382  * __bnx2x_vlan_mac_h_write_trylock - try getting the vlan mac writer lock
383  *
384  * @bp:         device handle
385  * @o:          vlan_mac object
386  *
387  * @details: Non-blocking implementation; should be called under execution
388  *           queue lock.
389  */
390 static int __bnx2x_vlan_mac_h_write_trylock(struct bnx2x *bp,
391                                             struct bnx2x_vlan_mac_obj *o)
392 {
393         if (o->head_reader) {
394                 DP(BNX2X_MSG_SP, "vlan_mac_lock writer - There are readers; Busy\n");
395                 return -EBUSY;
396         }
397
398         DP(BNX2X_MSG_SP, "vlan_mac_lock writer - Taken\n");
399         return 0;
400 }
401
402 /**
403  * __bnx2x_vlan_mac_h_exec_pending - execute step instead of a previous step
404  *
405  * @bp:         device handle
406  * @o:          vlan_mac object
407  *
408  * @details Should be called under execution queue lock; notice it might release
409  *          and reclaim it during its run.
410  */
411 static void __bnx2x_vlan_mac_h_exec_pending(struct bnx2x *bp,
412                                             struct bnx2x_vlan_mac_obj *o)
413 {
414         int rc;
415         unsigned long ramrod_flags = o->saved_ramrod_flags;
416
417         DP(BNX2X_MSG_SP, "vlan_mac_lock execute pending command with ramrod flags %lu\n",
418            ramrod_flags);
419         o->head_exe_request = false;
420         o->saved_ramrod_flags = 0;
421         rc = bnx2x_exe_queue_step(bp, &o->exe_queue, &ramrod_flags);
422         if (rc != 0) {
423                 BNX2X_ERR("execution of pending commands failed with rc %d\n",
424                           rc);
425 #ifdef BNX2X_STOP_ON_ERROR
426                 bnx2x_panic();
427 #endif
428         }
429 }
430
431 /**
432  * __bnx2x_vlan_mac_h_pend - Pend an execution step which couldn't run
433  *
434  * @bp:                 device handle
435  * @o:                  vlan_mac object
436  * @ramrod_flags:       ramrod flags of missed execution
437  *
438  * @details Should be called under execution queue lock.
439  */
440 static void __bnx2x_vlan_mac_h_pend(struct bnx2x *bp,
441                                     struct bnx2x_vlan_mac_obj *o,
442                                     unsigned long ramrod_flags)
443 {
444         o->head_exe_request = true;
445         o->saved_ramrod_flags = ramrod_flags;
446         DP(BNX2X_MSG_SP, "Placing pending execution with ramrod flags %lu\n",
447            ramrod_flags);
448 }
449
450 /**
451  * __bnx2x_vlan_mac_h_write_unlock - unlock the vlan mac head list writer lock
452  *
453  * @bp:                 device handle
454  * @o:                  vlan_mac object
455  *
456  * @details Should be called under execution queue lock. Notice if a pending
457  *          execution exists, it would perform it - possibly releasing and
458  *          reclaiming the execution queue lock.
459  */
460 static void __bnx2x_vlan_mac_h_write_unlock(struct bnx2x *bp,
461                                             struct bnx2x_vlan_mac_obj *o)
462 {
463         /* It's possible a new pending execution was added since this writer
464          * executed. If so, execute again. [Ad infinitum]
465          */
466         while (o->head_exe_request) {
467                 DP(BNX2X_MSG_SP, "vlan_mac_lock - writer release encountered a pending request\n");
468                 __bnx2x_vlan_mac_h_exec_pending(bp, o);
469         }
470 }
471
472
473 /**
474  * __bnx2x_vlan_mac_h_read_lock - lock the vlan mac head list reader lock
475  *
476  * @bp:                 device handle
477  * @o:                  vlan_mac object
478  *
479  * @details Should be called under the execution queue lock. May sleep. May
480  *          release and reclaim execution queue lock during its run.
481  */
482 static int __bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
483                                         struct bnx2x_vlan_mac_obj *o)
484 {
485         /* If we got here, we're holding lock --> no WRITER exists */
486         o->head_reader++;
487         DP(BNX2X_MSG_SP, "vlan_mac_lock - locked reader - number %d\n",
488            o->head_reader);
489
490         return 0;
491 }
492
493 /**
494  * bnx2x_vlan_mac_h_read_lock - lock the vlan mac head list reader lock
495  *
496  * @bp:                 device handle
497  * @o:                  vlan_mac object
498  *
499  * @details May sleep. Claims and releases execution queue lock during its run.
500  */
501 int bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
502                                struct bnx2x_vlan_mac_obj *o)
503 {
504         int rc;
505
506         spin_lock(&o->exe_queue.lock);
507         rc = __bnx2x_vlan_mac_h_read_lock(bp, o);
508         spin_unlock(&o->exe_queue.lock);
509
510         return rc;
511 }
512
513 /**
514  * __bnx2x_vlan_mac_h_read_unlock - unlock the vlan mac head list reader lock
515  *
516  * @bp:                 device handle
517  * @o:                  vlan_mac object
518  *
519  * @details Should be called under execution queue lock. Notice if a pending
520  *          execution exists, it would be performed if this was the last
521  *          reader. possibly releasing and reclaiming the execution queue lock.
522  */
523 static void __bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
524                                           struct bnx2x_vlan_mac_obj *o)
525 {
526         if (!o->head_reader) {
527                 BNX2X_ERR("Need to release vlan mac reader lock, but lock isn't taken\n");
528 #ifdef BNX2X_STOP_ON_ERROR
529                 bnx2x_panic();
530 #endif
531         } else {
532                 o->head_reader--;
533                 DP(BNX2X_MSG_SP, "vlan_mac_lock - decreased readers to %d\n",
534                    o->head_reader);
535         }
536
537         /* It's possible a new pending execution was added, and that this reader
538          * was last - if so we need to execute the command.
539          */
540         if (!o->head_reader && o->head_exe_request) {
541                 DP(BNX2X_MSG_SP, "vlan_mac_lock - reader release encountered a pending request\n");
542
543                 /* Writer release will do the trick */
544                 __bnx2x_vlan_mac_h_write_unlock(bp, o);
545         }
546 }
547
548 /**
549  * bnx2x_vlan_mac_h_read_unlock - unlock the vlan mac head list reader lock
550  *
551  * @bp:                 device handle
552  * @o:                  vlan_mac object
553  *
554  * @details Notice if a pending execution exists, it would be performed if this
555  *          was the last reader. Claims and releases the execution queue lock
556  *          during its run.
557  */
558 void bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
559                                   struct bnx2x_vlan_mac_obj *o)
560 {
561         spin_lock(&o->exe_queue.lock);
562         __bnx2x_vlan_mac_h_read_unlock(bp, o);
563         spin_unlock(&o->exe_queue.lock);
564 }
565
566 static int bnx2x_get_n_elements(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
567                                 int n, uint8_t *base, uint8_t stride,
568                                 uint8_t size)
569 {
570         struct bnx2x_vlan_mac_registry_elem *pos;
571         uint8_t *next = base;
572         int counter = 0;
573         int read_lock;
574
575         DP(BNX2X_MSG_SP, "get_n_elements - taking vlan_mac_lock (reader)\n");
576         read_lock = bnx2x_vlan_mac_h_read_lock(bp, o);
577         if (read_lock != 0)
578                 BNX2X_ERR("get_n_elements failed to get vlan mac reader lock; Access without lock\n");
579
580         /* traverse list */
581         list_for_each_entry(pos, &o->head, link) {
582                 if (counter < n) {
583                         memcpy(next, &pos->u, size);
584                         counter++;
585                         DP(BNX2X_MSG_SP, "copied element number %d to address %p element was:\n",
586                            counter, next);
587                         next += stride + size;
588                 }
589         }
590
591         if (read_lock == 0) {
592                 DP(BNX2X_MSG_SP, "get_n_elements - releasing vlan_mac_lock (reader)\n");
593                 bnx2x_vlan_mac_h_read_unlock(bp, o);
594         }
595
596         return counter * Eaddrlen;
597 }
598
599 /* check_add() callbacks */
600 static int bnx2x_check_mac_add(struct bnx2x *bp,
601                                struct bnx2x_vlan_mac_obj *o,
602                                union bnx2x_classification_ramrod_data *data)
603 {
604         struct bnx2x_vlan_mac_registry_elem *pos;
605
606         DP(BNX2X_MSG_SP, "Checking MAC %pM for ADD command\n", data->mac.mac);
607
608         if (!is_valid_ether_addr(data->mac.mac))
609                 return -EINVAL;
610
611         /* Check if a requested MAC already exists */
612         list_for_each_entry(pos, &o->head, link)
613                 if (ether_addr_equal(data->mac.mac, pos->u.mac.mac) &&
614                     (data->mac.is_inner_mac == pos->u.mac.is_inner_mac))
615                         return -EEXIST;
616
617         return 0;
618 }
619
620 static int bnx2x_check_vlan_add(struct bnx2x *bp,
621                                 struct bnx2x_vlan_mac_obj *o,
622                                 union bnx2x_classification_ramrod_data *data)
623 {
624         struct bnx2x_vlan_mac_registry_elem *pos;
625
626         DP(BNX2X_MSG_SP, "Checking VLAN %d for ADD command\n", data->vlan.vlan);
627
628         list_for_each_entry(pos, &o->head, link)
629                 if (data->vlan.vlan == pos->u.vlan.vlan)
630                         return -EEXIST;
631
632         return 0;
633 }
634
635 /* check_del() callbacks */
636 static struct bnx2x_vlan_mac_registry_elem *
637         bnx2x_check_mac_del(struct bnx2x *bp,
638                             struct bnx2x_vlan_mac_obj *o,
639                             union bnx2x_classification_ramrod_data *data)
640 {
641         struct bnx2x_vlan_mac_registry_elem *pos;
642
643         DP(BNX2X_MSG_SP, "Checking MAC %pM for DEL command\n", data->mac.mac);
644
645         list_for_each_entry(pos, &o->head, link)
646                 if (ether_addr_equal(data->mac.mac, pos->u.mac.mac) &&
647                     (data->mac.is_inner_mac == pos->u.mac.is_inner_mac))
648                         return pos;
649
650         return NULL;
651 }
652
653 static struct bnx2x_vlan_mac_registry_elem *
654         bnx2x_check_vlan_del(struct bnx2x *bp,
655                              struct bnx2x_vlan_mac_obj *o,
656                              union bnx2x_classification_ramrod_data *data)
657 {
658         struct bnx2x_vlan_mac_registry_elem *pos;
659
660         DP(BNX2X_MSG_SP, "Checking VLAN %d for DEL command\n", data->vlan.vlan);
661
662         list_for_each_entry(pos, &o->head, link)
663                 if (data->vlan.vlan == pos->u.vlan.vlan)
664                         return pos;
665
666         return NULL;
667 }
668
669 /* check_move() callback */
670 static bool bnx2x_check_move(struct bnx2x *bp,
671                              struct bnx2x_vlan_mac_obj *src_o,
672                              struct bnx2x_vlan_mac_obj *dst_o,
673                              union bnx2x_classification_ramrod_data *data)
674 {
675         struct bnx2x_vlan_mac_registry_elem *pos;
676         int rc;
677
678         /* Check if we can delete the requested configuration from the first
679          * object.
680          */
681         pos = src_o->check_del(bp, src_o, data);
682
683         /*  check if configuration can be added */
684         rc = dst_o->check_add(bp, dst_o, data);
685
686         /* If this classification can not be added (is already set)
687          * or can't be deleted - return an error.
688          */
689         if (rc || !pos)
690                 return false;
691
692         return true;
693 }
694
695 static bool bnx2x_check_move_always_err(
696         struct bnx2x *bp,
697         struct bnx2x_vlan_mac_obj *src_o,
698         struct bnx2x_vlan_mac_obj *dst_o,
699         union bnx2x_classification_ramrod_data *data)
700 {
701         return false;
702 }
703
704 static inline uint8_t bnx2x_vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o)
705 {
706         struct bnx2x_raw_obj *raw = &o->raw;
707         uint8_t rx_tx_flag = 0;
708
709         if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) ||
710             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
711                 rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_TX_CMD;
712
713         if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) ||
714             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
715                 rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_RX_CMD;
716
717         return rx_tx_flag;
718 }
719
720 static void bnx2x_set_mac_in_nig(struct bnx2x *bp,
721                                  bool add, unsigned char *dev_addr, int index)
722 {
723         uint32_t wb_data[2];
724         uint32_t reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM :
725                          NIG_REG_LLH0_FUNC_MEM;
726
727         if (!IS_MF_SI(bp) && !IS_MF_AFEX(bp))
728                 return;
729
730         if (index > BNX2X_LLH_CAM_MAX_PF_LINE)
731                 return;
732
733         DP(BNX2X_MSG_SP, "Going to %s LLH configuration at entry %d\n",
734                          (add ? "ADD" : "DELETE"), index);
735
736         if (add) {
737                 /* LLH_FUNC_MEM is a u64 WB register */
738                 reg_offset += 8*index;
739
740                 wb_data[0] = ((dev_addr[2] << 24) | (dev_addr[3] << 16) |
741                               (dev_addr[4] <<  8) |  dev_addr[5]);
742                 wb_data[1] = ((dev_addr[0] <<  8) |  dev_addr[1]);
743
744                 REG_WR_DMAE(bp, reg_offset, wb_data, 2);
745         }
746
747         REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM_ENABLE :
748                                   NIG_REG_LLH0_FUNC_MEM_ENABLE) + 4*index, add);
749 }
750
751 /**
752  * bnx2x_vlan_mac_set_cmd_hdr_e2 - set a header in a single classify ramrod
753  *
754  * @bp:         device handle
755  * @o:          queue for which we want to configure this rule
756  * @add:        if true the command is an ADD command, DEL otherwise
757  * @opcode:     CLASSIFY_RULE_OPCODE_XXX
758  * @hdr:        pointer to a header to setup
759  *
760  */
761 static inline void bnx2x_vlan_mac_set_cmd_hdr_e2(struct bnx2x *bp,
762         struct bnx2x_vlan_mac_obj *o, bool add, int opcode,
763         struct eth_classify_cmd_header *hdr)
764 {
765         struct bnx2x_raw_obj *raw = &o->raw;
766
767         hdr->client_id = raw->cl_id;
768         hdr->func_id = raw->func_id;
769
770         /* Rx or/and Tx (internal switching) configuration ? */
771         hdr->cmd_general_data |=
772                 bnx2x_vlan_mac_get_rx_tx_flag(o);
773
774         if (add)
775                 hdr->cmd_general_data |= ETH_CLASSIFY_CMD_HEADER_IS_ADD;
776
777         hdr->cmd_general_data |=
778                 (opcode << ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT);
779 }
780
781 /**
782  * bnx2x_vlan_mac_set_rdata_hdr_e2 - set the classify ramrod data header
783  *
784  * @cid:        connection id
785  * @type:       BNX2X_FILTER_XXX_PENDING
786  * @hdr:        pointer to header to setup
787  * @rule_cnt:
788  *
789  * currently we always configure one rule and echo field to contain a CID and an
790  * opcode type.
791  */
792 static inline void bnx2x_vlan_mac_set_rdata_hdr_e2(uint32_t cid, int type,
793                                 struct eth_classify_header *hdr, int rule_cnt)
794 {
795         hdr->echo = cpu_to_le32((cid & BNX2X_SWCID_MASK) |
796                                 (type << BNX2X_SWCID_SHIFT));
797         hdr->rule_cnt = (uint8_t)rule_cnt;
798 }
799
800 /* hw_config() callbacks */
801 static void bnx2x_set_one_mac_e2(struct bnx2x *bp,
802                                  struct bnx2x_vlan_mac_obj *o,
803                                  struct bnx2x_exeq_elem *elem, int rule_idx,
804                                  int cam_offset)
805 {
806         struct bnx2x_raw_obj *raw = &o->raw;
807         struct eth_classify_rules_ramrod_data *data =
808                 (struct eth_classify_rules_ramrod_data *)(raw->rdata);
809         int rule_cnt = rule_idx + 1, cmd = elem->cmd_data.vlan_mac.cmd;
810         union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx];
811         bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false;
812         unsigned long *vlan_mac_flags = &elem->cmd_data.vlan_mac.vlan_mac_flags;
813         uint8_t *mac = elem->cmd_data.vlan_mac.u.mac.mac;
814
815         /* Set LLH CAM entry: currently only iSCSI and ETH macs are
816          * relevant. In addition, current implementation is tuned for a
817          * single ETH MAC.
818          *
819          * When multiple unicast ETH MACs PF configuration in switch
820          * independent mode is required (NetQ, multiple netdev MACs,
821          * etc.), consider better utilisation of 8 per function MAC
822          * entries in the LLH register. There is also
823          * NIG_REG_P[01]_LLH_FUNC_MEM2 registers that complete the
824          * total number of CAM entries to 16.
825          *
826          * Currently we won't configure NIG for MACs other than a primary ETH
827          * MAC and iSCSI L2 MAC.
828          *
829          * If this MAC is moving from one Queue to another, no need to change
830          * NIG configuration.
831          */
832         if (cmd != BNX2X_VLAN_MAC_MOVE) {
833                 if (test_bit(BNX2X_ISCSI_ETH_MAC, vlan_mac_flags))
834                         bnx2x_set_mac_in_nig(bp, add, mac,
835                                              BNX2X_LLH_CAM_ISCSI_ETH_LINE);
836                 else if (test_bit(BNX2X_ETH_MAC, vlan_mac_flags))
837                         bnx2x_set_mac_in_nig(bp, add, mac,
838                                              BNX2X_LLH_CAM_ETH_LINE);
839         }
840
841         /* Reset the ramrod data buffer for the first rule */
842         if (rule_idx == 0)
843                 memset(data, 0, sizeof(*data));
844
845         /* Setup a command header */
846         bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_MAC,
847                                       &rule_entry->mac.header);
848
849         DP(BNX2X_MSG_SP, "About to %s MAC %pM for Queue %d\n",
850            (add ? "add" : "delete"), mac, raw->cl_id);
851
852         /* Set a MAC itself */
853         bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb,
854                               &rule_entry->mac.mac_mid,
855                               &rule_entry->mac.mac_lsb, mac);
856         rule_entry->mac.inner_mac =
857                 cpu_to_le16(elem->cmd_data.vlan_mac.u.mac.is_inner_mac);
858
859         /* MOVE: Add a rule that will add this MAC to the target Queue */
860         if (cmd == BNX2X_VLAN_MAC_MOVE) {
861                 rule_entry++;
862                 rule_cnt++;
863
864                 /* Setup ramrod data */
865                 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
866                                         elem->cmd_data.vlan_mac.target_obj,
867                                               true, CLASSIFY_RULE_OPCODE_MAC,
868                                               &rule_entry->mac.header);
869
870                 /* Set a MAC itself */
871                 bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb,
872                                       &rule_entry->mac.mac_mid,
873                                       &rule_entry->mac.mac_lsb, mac);
874                 rule_entry->mac.inner_mac =
875                         cpu_to_le16(elem->cmd_data.vlan_mac.
876                                                 u.mac.is_inner_mac);
877         }
878
879         /* Set the ramrod data header */
880         /* TODO: take this to the higher level in order to prevent multiple
881                  writing */
882         bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header,
883                                         rule_cnt);
884 }
885
886 /**
887  * bnx2x_vlan_mac_set_rdata_hdr_e1x - set a header in a single classify ramrod
888  *
889  * @bp:         device handle
890  * @o:          queue
891  * @type:
892  * @cam_offset: offset in cam memory
893  * @hdr:        pointer to a header to setup
894  *
895  * E1/E1H
896  */
897 static inline void bnx2x_vlan_mac_set_rdata_hdr_e1x(struct bnx2x *bp,
898         struct bnx2x_vlan_mac_obj *o, int type, int cam_offset,
899         struct mac_configuration_hdr *hdr)
900 {
901         struct bnx2x_raw_obj *r = &o->raw;
902
903         hdr->length = 1;
904         hdr->offset = (uint8_t)cam_offset;
905         hdr->client_id = cpu_to_le16(0xff);
906         hdr->echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) |
907                                 (type << BNX2X_SWCID_SHIFT));
908 }
909
910 static inline void bnx2x_vlan_mac_set_cfg_entry_e1x(struct bnx2x *bp,
911         struct bnx2x_vlan_mac_obj *o, bool add, int opcode, uint8_t *mac,
912         uint16_t vlan_id, struct mac_configuration_entry *cfg_entry)
913 {
914         struct bnx2x_raw_obj *r = &o->raw;
915         uint32_t cl_bit_vec = (1 << r->cl_id);
916
917         cfg_entry->clients_bit_vector = cpu_to_le32(cl_bit_vec);
918         cfg_entry->pf_id = r->func_id;
919         cfg_entry->vlan_id = cpu_to_le16(vlan_id);
920
921         if (add) {
922                 SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE,
923                          T_ETH_MAC_COMMAND_SET);
924                 SET_FLAG(cfg_entry->flags,
925                          MAC_CONFIGURATION_ENTRY_VLAN_FILTERING_MODE, opcode);
926
927                 /* Set a MAC in a ramrod data */
928                 bnx2x_set_fw_mac_addr(&cfg_entry->msb_mac_addr,
929                                       &cfg_entry->middle_mac_addr,
930                                       &cfg_entry->lsb_mac_addr, mac);
931         } else
932                 SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE,
933                          T_ETH_MAC_COMMAND_INVALIDATE);
934 }
935
936 static inline void bnx2x_vlan_mac_set_rdata_e1x(struct bnx2x *bp,
937         struct bnx2x_vlan_mac_obj *o, int type, int cam_offset, bool add,
938         uint8_t *mac, uint16_t vlan_id, int opcode,
939                                                 struct mac_configuration_cmd *config)
940 {
941         struct mac_configuration_entry *cfg_entry = &config->config_table[0];
942         struct bnx2x_raw_obj *raw = &o->raw;
943
944         bnx2x_vlan_mac_set_rdata_hdr_e1x(bp, o, type, cam_offset,
945                                          &config->hdr);
946         bnx2x_vlan_mac_set_cfg_entry_e1x(bp, o, add, opcode, mac, vlan_id,
947                                          cfg_entry);
948
949         DP(BNX2X_MSG_SP, "%s MAC %pM CLID %d CAM offset %d\n",
950                          (add ? "setting" : "clearing"),
951                          mac, raw->cl_id, cam_offset);
952 }
953
954 /**
955  * bnx2x_set_one_mac_e1x - fill a single MAC rule ramrod data
956  *
957  * @bp:         device handle
958  * @o:          bnx2x_vlan_mac_obj
959  * @elem:       bnx2x_exeq_elem
960  * @rule_idx:   rule_idx
961  * @cam_offset: cam_offset
962  */
963 static void bnx2x_set_one_mac_e1x(struct bnx2x *bp,
964                                   struct bnx2x_vlan_mac_obj *o,
965                                   struct bnx2x_exeq_elem *elem, int rule_idx,
966                                   int cam_offset)
967 {
968         struct bnx2x_raw_obj *raw = &o->raw;
969         struct mac_configuration_cmd *config =
970                 (struct mac_configuration_cmd *)(raw->rdata);
971         /* 57710 and 57711 do not support MOVE command,
972          * so it's either ADD or DEL
973          */
974         bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ?
975                 true : false;
976
977         /* Reset the ramrod data buffer */
978         memset(config, 0, sizeof(*config));
979
980         bnx2x_vlan_mac_set_rdata_e1x(bp, o, raw->state,
981                                      cam_offset, add,
982                                      elem->cmd_data.vlan_mac.u.mac.mac, 0,
983                                      ETH_VLAN_FILTER_ANY_VLAN, config);
984 }
985
986 static void bnx2x_set_one_vlan_e2(struct bnx2x *bp,
987                                   struct bnx2x_vlan_mac_obj *o,
988                                   struct bnx2x_exeq_elem *elem, int rule_idx,
989                                   int cam_offset)
990 {
991         struct bnx2x_raw_obj *raw = &o->raw;
992         struct eth_classify_rules_ramrod_data *data =
993                 (struct eth_classify_rules_ramrod_data *)(raw->rdata);
994         int rule_cnt = rule_idx + 1;
995         union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx];
996         enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd;
997         bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false;
998         uint16_t vlan = elem->cmd_data.vlan_mac.u.vlan.vlan;
999
1000         /* Reset the ramrod data buffer for the first rule */
1001         if (rule_idx == 0)
1002                 memset(data, 0, sizeof(*data));
1003
1004         /* Set a rule header */
1005         bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_VLAN,
1006                                       &rule_entry->vlan.header);
1007
1008         DP(BNX2X_MSG_SP, "About to %s VLAN %d\n", (add ? "add" : "delete"),
1009                          vlan);
1010
1011         /* Set a VLAN itself */
1012         rule_entry->vlan.vlan = cpu_to_le16(vlan);
1013
1014         /* MOVE: Add a rule that will add this MAC to the target Queue */
1015         if (cmd == BNX2X_VLAN_MAC_MOVE) {
1016                 rule_entry++;
1017                 rule_cnt++;
1018
1019                 /* Setup ramrod data */
1020                 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
1021                                         elem->cmd_data.vlan_mac.target_obj,
1022                                               true, CLASSIFY_RULE_OPCODE_VLAN,
1023                                               &rule_entry->vlan.header);
1024
1025                 /* Set a VLAN itself */
1026                 rule_entry->vlan.vlan = cpu_to_le16(vlan);
1027         }
1028
1029         /* Set the ramrod data header */
1030         /* TODO: take this to the higher level in order to prevent multiple
1031                  writing */
1032         bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header,
1033                                         rule_cnt);
1034 }
1035
1036 /**
1037  * bnx2x_vlan_mac_restore - reconfigure next MAC/VLAN/VLAN-MAC element
1038  *
1039  * @bp:         device handle
1040  * @p:          command parameters
1041  * @ppos:       pointer to the cookie
1042  *
1043  * reconfigure next MAC/VLAN/VLAN-MAC element from the
1044  * previously configured elements list.
1045  *
1046  * from command parameters only RAMROD_COMP_WAIT bit in ramrod_flags is taken
1047  * into an account
1048  *
1049  * pointer to the cookie  - that should be given back in the next call to make
1050  * function handle the next element. If *ppos is set to NULL it will restart the
1051  * iterator. If returned *ppos == NULL this means that the last element has been
1052  * handled.
1053  *
1054  */
1055 static int bnx2x_vlan_mac_restore(struct bnx2x *bp,
1056                            struct bnx2x_vlan_mac_ramrod_params *p,
1057                            struct bnx2x_vlan_mac_registry_elem **ppos)
1058 {
1059         struct bnx2x_vlan_mac_registry_elem *pos;
1060         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1061
1062         /* If list is empty - there is nothing to do here */
1063         if (list_empty(&o->head)) {
1064                 *ppos = NULL;
1065                 return 0;
1066         }
1067
1068         /* make a step... */
1069         if (*ppos == NULL)
1070                 *ppos = list_first_entry(&o->head,
1071                                          struct bnx2x_vlan_mac_registry_elem,
1072                                          link);
1073         else
1074                 *ppos = list_next_entry(*ppos, link);
1075
1076         pos = *ppos;
1077
1078         /* If it's the last step - return NULL */
1079         if (list_is_last(&pos->link, &o->head))
1080                 *ppos = NULL;
1081
1082         /* Prepare a 'user_req' */
1083         memcpy(&p->user_req.u, &pos->u, sizeof(pos->u));
1084
1085         /* Set the command */
1086         p->user_req.cmd = BNX2X_VLAN_MAC_ADD;
1087
1088         /* Set vlan_mac_flags */
1089         p->user_req.vlan_mac_flags = pos->vlan_mac_flags;
1090
1091         /* Set a restore bit */
1092         __set_bit(RAMROD_RESTORE, &p->ramrod_flags);
1093
1094         return bnx2x_config_vlan_mac(bp, p);
1095 }
1096
1097 /* bnx2x_exeq_get_mac/bnx2x_exeq_get_vlan/bnx2x_exeq_get_vlan_mac return a
1098  * pointer to an element with a specific criteria and NULL if such an element
1099  * hasn't been found.
1100  */
1101 static struct bnx2x_exeq_elem *bnx2x_exeq_get_mac(
1102         struct bnx2x_exe_queue_obj *o,
1103         struct bnx2x_exeq_elem *elem)
1104 {
1105         struct bnx2x_exeq_elem *pos;
1106         struct bnx2x_mac_ramrod_data *data = &elem->cmd_data.vlan_mac.u.mac;
1107
1108         /* Check pending for execution commands */
1109         list_for_each_entry(pos, &o->exe_queue, link)
1110                 if (!memcmp(&pos->cmd_data.vlan_mac.u.mac, data,
1111                               sizeof(*data)) &&
1112                     (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd))
1113                         return pos;
1114
1115         return NULL;
1116 }
1117
1118 static struct bnx2x_exeq_elem *bnx2x_exeq_get_vlan(
1119         struct bnx2x_exe_queue_obj *o,
1120         struct bnx2x_exeq_elem *elem)
1121 {
1122         struct bnx2x_exeq_elem *pos;
1123         struct bnx2x_vlan_ramrod_data *data = &elem->cmd_data.vlan_mac.u.vlan;
1124
1125         /* Check pending for execution commands */
1126         list_for_each_entry(pos, &o->exe_queue, link)
1127                 if (!memcmp(&pos->cmd_data.vlan_mac.u.vlan, data,
1128                               sizeof(*data)) &&
1129                     (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd))
1130                         return pos;
1131
1132         return NULL;
1133 }
1134
1135 /**
1136  * bnx2x_validate_vlan_mac_add - check if an ADD command can be executed
1137  *
1138  * @bp:         device handle
1139  * @qo:         bnx2x_qable_obj
1140  * @elem:       bnx2x_exeq_elem
1141  *
1142  * Checks that the requested configuration can be added. If yes and if
1143  * requested, consume CAM credit.
1144  *
1145  * The 'validate' is run after the 'optimize'.
1146  *
1147  */
1148 static inline int bnx2x_validate_vlan_mac_add(struct bnx2x *bp,
1149                                               union bnx2x_qable_obj *qo,
1150                                               struct bnx2x_exeq_elem *elem)
1151 {
1152         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1153         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1154         int rc;
1155
1156         /* Check the registry */
1157         rc = o->check_add(bp, o, &elem->cmd_data.vlan_mac.u);
1158         if (rc) {
1159                 DP(BNX2X_MSG_SP, "ADD command is not allowed considering current registry state.\n");
1160                 return rc;
1161         }
1162
1163         /* Check if there is a pending ADD command for this
1164          * MAC/VLAN/VLAN-MAC. Return an error if there is.
1165          */
1166         if (exeq->get(exeq, elem)) {
1167                 DP(BNX2X_MSG_SP, "There is a pending ADD command already\n");
1168                 return -EEXIST;
1169         }
1170
1171         /* TODO: Check the pending MOVE from other objects where this
1172          * object is a destination object.
1173          */
1174
1175         /* Consume the credit if not requested not to */
1176         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1177                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1178             o->get_credit(o)))
1179                 return -EINVAL;
1180
1181         return 0;
1182 }
1183
1184 /**
1185  * bnx2x_validate_vlan_mac_del - check if the DEL command can be executed
1186  *
1187  * @bp:         device handle
1188  * @qo:         quable object to check
1189  * @elem:       element that needs to be deleted
1190  *
1191  * Checks that the requested configuration can be deleted. If yes and if
1192  * requested, returns a CAM credit.
1193  *
1194  * The 'validate' is run after the 'optimize'.
1195  */
1196 static inline int bnx2x_validate_vlan_mac_del(struct bnx2x *bp,
1197                                               union bnx2x_qable_obj *qo,
1198                                               struct bnx2x_exeq_elem *elem)
1199 {
1200         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1201         struct bnx2x_vlan_mac_registry_elem *pos;
1202         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1203         struct bnx2x_exeq_elem query_elem;
1204
1205         /* If this classification can not be deleted (doesn't exist)
1206          * - return a BNX2X_EXIST.
1207          */
1208         pos = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u);
1209         if (!pos) {
1210                 DP(BNX2X_MSG_SP, "DEL command is not allowed considering current registry state\n");
1211                 return -EEXIST;
1212         }
1213
1214         /* Check if there are pending DEL or MOVE commands for this
1215          * MAC/VLAN/VLAN-MAC. Return an error if so.
1216          */
1217         memcpy(&query_elem, elem, sizeof(query_elem));
1218
1219         /* Check for MOVE commands */
1220         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_MOVE;
1221         if (exeq->get(exeq, &query_elem)) {
1222                 BNX2X_ERR("There is a pending MOVE command already\n");
1223                 return -EINVAL;
1224         }
1225
1226         /* Check for DEL commands */
1227         if (exeq->get(exeq, elem)) {
1228                 DP(BNX2X_MSG_SP, "There is a pending DEL command already\n");
1229                 return -EEXIST;
1230         }
1231
1232         /* Return the credit to the credit pool if not requested not to */
1233         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1234                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1235             o->put_credit(o))) {
1236                 BNX2X_ERR("Failed to return a credit\n");
1237                 return -EINVAL;
1238         }
1239
1240         return 0;
1241 }
1242
1243 /**
1244  * bnx2x_validate_vlan_mac_move - check if the MOVE command can be executed
1245  *
1246  * @bp:         device handle
1247  * @qo:         quable object to check (source)
1248  * @elem:       element that needs to be moved
1249  *
1250  * Checks that the requested configuration can be moved. If yes and if
1251  * requested, returns a CAM credit.
1252  *
1253  * The 'validate' is run after the 'optimize'.
1254  */
1255 static inline int bnx2x_validate_vlan_mac_move(struct bnx2x *bp,
1256                                                union bnx2x_qable_obj *qo,
1257                                                struct bnx2x_exeq_elem *elem)
1258 {
1259         struct bnx2x_vlan_mac_obj *src_o = &qo->vlan_mac;
1260         struct bnx2x_vlan_mac_obj *dest_o = elem->cmd_data.vlan_mac.target_obj;
1261         struct bnx2x_exeq_elem query_elem;
1262         struct bnx2x_exe_queue_obj *src_exeq = &src_o->exe_queue;
1263         struct bnx2x_exe_queue_obj *dest_exeq = &dest_o->exe_queue;
1264
1265         /* Check if we can perform this operation based on the current registry
1266          * state.
1267          */
1268         if (!src_o->check_move(bp, src_o, dest_o,
1269                                &elem->cmd_data.vlan_mac.u)) {
1270                 DP(BNX2X_MSG_SP, "MOVE command is not allowed considering current registry state\n");
1271                 return -EINVAL;
1272         }
1273
1274         /* Check if there is an already pending DEL or MOVE command for the
1275          * source object or ADD command for a destination object. Return an
1276          * error if so.
1277          */
1278         memcpy(&query_elem, elem, sizeof(query_elem));
1279
1280         /* Check DEL on source */
1281         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_DEL;
1282         if (src_exeq->get(src_exeq, &query_elem)) {
1283                 BNX2X_ERR("There is a pending DEL command on the source queue already\n");
1284                 return -EINVAL;
1285         }
1286
1287         /* Check MOVE on source */
1288         if (src_exeq->get(src_exeq, elem)) {
1289                 DP(BNX2X_MSG_SP, "There is a pending MOVE command already\n");
1290                 return -EEXIST;
1291         }
1292
1293         /* Check ADD on destination */
1294         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_ADD;
1295         if (dest_exeq->get(dest_exeq, &query_elem)) {
1296                 BNX2X_ERR("There is a pending ADD command on the destination queue already\n");
1297                 return -EINVAL;
1298         }
1299
1300         /* Consume the credit if not requested not to */
1301         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
1302                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1303             dest_o->get_credit(dest_o)))
1304                 return -EINVAL;
1305
1306         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1307                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1308             src_o->put_credit(src_o))) {
1309                 /* return the credit taken from dest... */
1310                 dest_o->put_credit(dest_o);
1311                 return -EINVAL;
1312         }
1313
1314         return 0;
1315 }
1316
1317 static int bnx2x_validate_vlan_mac(struct bnx2x *bp,
1318                                    union bnx2x_qable_obj *qo,
1319                                    struct bnx2x_exeq_elem *elem)
1320 {
1321         switch (elem->cmd_data.vlan_mac.cmd) {
1322         case BNX2X_VLAN_MAC_ADD:
1323                 return bnx2x_validate_vlan_mac_add(bp, qo, elem);
1324         case BNX2X_VLAN_MAC_DEL:
1325                 return bnx2x_validate_vlan_mac_del(bp, qo, elem);
1326         case BNX2X_VLAN_MAC_MOVE:
1327                 return bnx2x_validate_vlan_mac_move(bp, qo, elem);
1328         default:
1329                 return -EINVAL;
1330         }
1331 }
1332
1333 static int bnx2x_remove_vlan_mac(struct bnx2x *bp,
1334                                   union bnx2x_qable_obj *qo,
1335                                   struct bnx2x_exeq_elem *elem)
1336 {
1337         int rc = 0;
1338
1339         /* If consumption wasn't required, nothing to do */
1340         if (test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1341                      &elem->cmd_data.vlan_mac.vlan_mac_flags))
1342                 return 0;
1343
1344         switch (elem->cmd_data.vlan_mac.cmd) {
1345         case BNX2X_VLAN_MAC_ADD:
1346         case BNX2X_VLAN_MAC_MOVE:
1347                 rc = qo->vlan_mac.put_credit(&qo->vlan_mac);
1348                 break;
1349         case BNX2X_VLAN_MAC_DEL:
1350                 rc = qo->vlan_mac.get_credit(&qo->vlan_mac);
1351                 break;
1352         default:
1353                 return -EINVAL;
1354         }
1355
1356         if (rc != true)
1357                 return -EINVAL;
1358
1359         return 0;
1360 }
1361
1362 /**
1363  * bnx2x_wait_vlan_mac - passively wait for 5 seconds until all work completes.
1364  *
1365  * @bp:         device handle
1366  * @o:          bnx2x_vlan_mac_obj
1367  *
1368  */
1369 static int bnx2x_wait_vlan_mac(struct bnx2x *bp,
1370                                struct bnx2x_vlan_mac_obj *o)
1371 {
1372         int cnt = 5000, rc;
1373         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1374         struct bnx2x_raw_obj *raw = &o->raw;
1375
1376         while (cnt--) {
1377                 /* Wait for the current command to complete */
1378                 rc = raw->wait_comp(bp, raw);
1379                 if (rc)
1380                         return rc;
1381
1382                 /* Wait until there are no pending commands */
1383                 if (!bnx2x_exe_queue_empty(exeq))
1384                         kthread_usleep(1000);
1385                 else
1386                         return 0;
1387         }
1388
1389         return -EBUSY;
1390 }
1391
1392 static int __bnx2x_vlan_mac_execute_step(struct bnx2x *bp,
1393                                          struct bnx2x_vlan_mac_obj *o,
1394                                          unsigned long *ramrod_flags)
1395 {
1396         int rc = 0;
1397
1398         spin_lock(&o->exe_queue.lock);
1399
1400         DP(BNX2X_MSG_SP, "vlan_mac_execute_step - trying to take writer lock\n");
1401         rc = __bnx2x_vlan_mac_h_write_trylock(bp, o);
1402
1403         if (rc != 0) {
1404                 __bnx2x_vlan_mac_h_pend(bp, o, *ramrod_flags);
1405
1406                 /* Calling function should not diffrentiate between this case
1407                  * and the case in which there is already a pending ramrod
1408                  */
1409                 rc = 1;
1410         } else {
1411                 rc = bnx2x_exe_queue_step(bp, &o->exe_queue, ramrod_flags);
1412         }
1413         spin_unlock(&o->exe_queue.lock);
1414
1415         return rc;
1416 }
1417
1418 /**
1419  * bnx2x_complete_vlan_mac - complete one VLAN-MAC ramrod
1420  *
1421  * @bp:         device handle
1422  * @o:          bnx2x_vlan_mac_obj
1423  * @cqe:
1424  * @cont:       if true schedule next execution chunk
1425  *
1426  */
1427 static int bnx2x_complete_vlan_mac(struct bnx2x *bp,
1428                                    struct bnx2x_vlan_mac_obj *o,
1429                                    union event_ring_elem *cqe,
1430                                    unsigned long *ramrod_flags)
1431 {
1432         struct bnx2x_raw_obj *r = &o->raw;
1433         int rc;
1434
1435         /* Clearing the pending list & raw state should be made
1436          * atomically (as execution flow assumes they represent the same).
1437          */
1438         spin_lock(&o->exe_queue.lock);
1439
1440         /* Reset pending list */
1441         __bnx2x_exe_queue_reset_pending(bp, &o->exe_queue);
1442
1443         /* Clear pending */
1444         r->clear_pending(r);
1445
1446         spin_unlock(&o->exe_queue.lock);
1447
1448         /* If ramrod failed this is most likely a SW bug */
1449         if (cqe->message.error)
1450                 return -EINVAL;
1451
1452         /* Run the next bulk of pending commands if requested */
1453         if (test_bit(RAMROD_CONT, ramrod_flags)) {
1454                 rc = __bnx2x_vlan_mac_execute_step(bp, o, ramrod_flags);
1455
1456                 if (rc < 0)
1457                         return rc;
1458         }
1459
1460         /* If there is more work to do return PENDING */
1461         if (!bnx2x_exe_queue_empty(&o->exe_queue))
1462                 return 1;
1463
1464         return 0;
1465 }
1466
1467 /**
1468  * bnx2x_optimize_vlan_mac - optimize ADD and DEL commands.
1469  *
1470  * @bp:         device handle
1471  * @o:          bnx2x_qable_obj
1472  * @elem:       bnx2x_exeq_elem
1473  */
1474 static int bnx2x_optimize_vlan_mac(struct bnx2x *bp,
1475                                    union bnx2x_qable_obj *qo,
1476                                    struct bnx2x_exeq_elem *elem)
1477 {
1478         struct bnx2x_exeq_elem query, *pos;
1479         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1480         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1481
1482         memcpy(&query, elem, sizeof(query));
1483
1484         switch (elem->cmd_data.vlan_mac.cmd) {
1485         case BNX2X_VLAN_MAC_ADD:
1486                 query.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_DEL;
1487                 break;
1488         case BNX2X_VLAN_MAC_DEL:
1489                 query.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_ADD;
1490                 break;
1491         default:
1492                 /* Don't handle anything other than ADD or DEL */
1493                 return 0;
1494         }
1495
1496         /* If we found the appropriate element - delete it */
1497         pos = exeq->get(exeq, &query);
1498         if (pos) {
1499
1500                 /* Return the credit of the optimized command */
1501                 if (!test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1502                               &pos->cmd_data.vlan_mac.vlan_mac_flags)) {
1503                         if ((query.cmd_data.vlan_mac.cmd ==
1504                              BNX2X_VLAN_MAC_ADD) && !o->put_credit(o)) {
1505                                 BNX2X_ERR("Failed to return the credit for the optimized ADD command\n");
1506                                 return -EINVAL;
1507                         } else if (!o->get_credit(o)) { /* VLAN_MAC_DEL */
1508                                 BNX2X_ERR("Failed to recover the credit from the optimized DEL command\n");
1509                                 return -EINVAL;
1510                         }
1511                 }
1512
1513                 DP(BNX2X_MSG_SP, "Optimizing %s command\n",
1514                            (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ?
1515                            "ADD" : "DEL");
1516
1517                 list_del(&pos->link);
1518                 bnx2x_exe_queue_free_elem(bp, pos);
1519                 return 1;
1520         }
1521
1522         return 0;
1523 }
1524
1525 /**
1526  * bnx2x_vlan_mac_get_registry_elem - prepare a registry element
1527  *
1528  * @bp:   device handle
1529  * @o:
1530  * @elem:
1531  * @restore:
1532  * @re:
1533  *
1534  * prepare a registry element according to the current command request.
1535  */
1536 static inline int bnx2x_vlan_mac_get_registry_elem(
1537         struct bnx2x *bp,
1538         struct bnx2x_vlan_mac_obj *o,
1539         struct bnx2x_exeq_elem *elem,
1540         bool restore,
1541         struct bnx2x_vlan_mac_registry_elem **re)
1542 {
1543         enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd;
1544         struct bnx2x_vlan_mac_registry_elem *reg_elem;
1545
1546         /* Allocate a new registry element if needed. */
1547         if (!restore &&
1548             ((cmd == BNX2X_VLAN_MAC_ADD) || (cmd == BNX2X_VLAN_MAC_MOVE))) {
1549                 reg_elem = kzmalloc(sizeof(*reg_elem), 0);
1550                 if (!reg_elem)
1551                         return -ENOMEM;
1552
1553                 /* Get a new CAM offset */
1554                 if (!o->get_cam_offset(o, &reg_elem->cam_offset)) {
1555                         /* This shall never happen, because we have checked the
1556                          * CAM availability in the 'validate'.
1557                          */
1558                         WARN_ON(1);
1559                         kfree(reg_elem);
1560                         return -EINVAL;
1561                 }
1562
1563                 DP(BNX2X_MSG_SP, "Got cam offset %d\n", reg_elem->cam_offset);
1564
1565                 /* Set a VLAN-MAC data */
1566                 memcpy(&reg_elem->u, &elem->cmd_data.vlan_mac.u,
1567                           sizeof(reg_elem->u));
1568
1569                 /* Copy the flags (needed for DEL and RESTORE flows) */
1570                 reg_elem->vlan_mac_flags =
1571                         elem->cmd_data.vlan_mac.vlan_mac_flags;
1572         } else /* DEL, RESTORE */
1573                 reg_elem = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u);
1574
1575         *re = reg_elem;
1576         return 0;
1577 }
1578
1579 /**
1580  * bnx2x_execute_vlan_mac - execute vlan mac command
1581  *
1582  * @bp:                 device handle
1583  * @qo:
1584  * @exe_chunk:
1585  * @ramrod_flags:
1586  *
1587  * go and send a ramrod!
1588  */
1589 static int bnx2x_execute_vlan_mac(struct bnx2x *bp,
1590                                   union bnx2x_qable_obj *qo,
1591                                   struct list_head *exe_chunk,
1592                                   unsigned long *ramrod_flags)
1593 {
1594         struct bnx2x_exeq_elem *elem;
1595         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac, *cam_obj;
1596         struct bnx2x_raw_obj *r = &o->raw;
1597         int rc, idx = 0;
1598         bool restore = test_bit(RAMROD_RESTORE, ramrod_flags);
1599         bool drv_only = test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags);
1600         struct bnx2x_vlan_mac_registry_elem *reg_elem;
1601         enum bnx2x_vlan_mac_cmd cmd;
1602
1603         /* If DRIVER_ONLY execution is requested, cleanup a registry
1604          * and exit. Otherwise send a ramrod to FW.
1605          */
1606         if (!drv_only) {
1607                 WARN_ON(r->check_pending(r));
1608
1609                 /* Set pending */
1610                 r->set_pending(r);
1611
1612                 /* Fill the ramrod data */
1613                 list_for_each_entry(elem, exe_chunk, link) {
1614                         cmd = elem->cmd_data.vlan_mac.cmd;
1615                         /* We will add to the target object in MOVE command, so
1616                          * change the object for a CAM search.
1617                          */
1618                         if (cmd == BNX2X_VLAN_MAC_MOVE)
1619                                 cam_obj = elem->cmd_data.vlan_mac.target_obj;
1620                         else
1621                                 cam_obj = o;
1622
1623                         rc = bnx2x_vlan_mac_get_registry_elem(bp, cam_obj,
1624                                                               elem, restore,
1625                                                               &reg_elem);
1626                         if (rc)
1627                                 goto error_exit;
1628
1629                         WARN_ON(!reg_elem);
1630
1631                         /* Push a new entry into the registry */
1632                         if (!restore &&
1633                             ((cmd == BNX2X_VLAN_MAC_ADD) ||
1634                             (cmd == BNX2X_VLAN_MAC_MOVE)))
1635                                 list_add(&reg_elem->link, &cam_obj->head);
1636
1637                         /* Configure a single command in a ramrod data buffer */
1638                         o->set_one_rule(bp, o, elem, idx,
1639                                         reg_elem->cam_offset);
1640
1641                         /* MOVE command consumes 2 entries in the ramrod data */
1642                         if (cmd == BNX2X_VLAN_MAC_MOVE)
1643                                 idx += 2;
1644                         else
1645                                 idx++;
1646                 }
1647
1648                 /* No need for an explicit memory barrier here as long we would
1649                  * need to ensure the ordering of writing to the SPQ element
1650                  * and updating of the SPQ producer which involves a memory
1651                  * read and we will have to put a full memory barrier there
1652                  * (inside bnx2x_sp_post()).
1653                  */
1654
1655                 rc = bnx2x_sp_post(bp, o->ramrod_cmd, r->cid,
1656                                    U64_HI(r->rdata_mapping),
1657                                    U64_LO(r->rdata_mapping),
1658                                    ETH_CONNECTION_TYPE);
1659                 if (rc)
1660                         goto error_exit;
1661         }
1662
1663         /* Now, when we are done with the ramrod - clean up the registry */
1664         list_for_each_entry(elem, exe_chunk, link) {
1665                 cmd = elem->cmd_data.vlan_mac.cmd;
1666                 if ((cmd == BNX2X_VLAN_MAC_DEL) ||
1667                     (cmd == BNX2X_VLAN_MAC_MOVE)) {
1668                         reg_elem = o->check_del(bp, o,
1669                                                 &elem->cmd_data.vlan_mac.u);
1670
1671                         WARN_ON(!reg_elem);
1672
1673                         o->put_cam_offset(o, reg_elem->cam_offset);
1674                         list_del(&reg_elem->link);
1675                         kfree(reg_elem);
1676                 }
1677         }
1678
1679         if (!drv_only)
1680                 return 1;
1681         else
1682                 return 0;
1683
1684 error_exit:
1685         r->clear_pending(r);
1686
1687         /* Cleanup a registry in case of a failure */
1688         list_for_each_entry(elem, exe_chunk, link) {
1689                 cmd = elem->cmd_data.vlan_mac.cmd;
1690
1691                 if (cmd == BNX2X_VLAN_MAC_MOVE)
1692                         cam_obj = elem->cmd_data.vlan_mac.target_obj;
1693                 else
1694                         cam_obj = o;
1695
1696                 /* Delete all newly added above entries */
1697                 if (!restore &&
1698                     ((cmd == BNX2X_VLAN_MAC_ADD) ||
1699                     (cmd == BNX2X_VLAN_MAC_MOVE))) {
1700                         reg_elem = o->check_del(bp, cam_obj,
1701                                                 &elem->cmd_data.vlan_mac.u);
1702                         if (reg_elem) {
1703                                 list_del(&reg_elem->link);
1704                                 kfree(reg_elem);
1705                         }
1706                 }
1707         }
1708
1709         return rc;
1710 }
1711
1712 static inline int bnx2x_vlan_mac_push_new_cmd(
1713         struct bnx2x *bp,
1714         struct bnx2x_vlan_mac_ramrod_params *p)
1715 {
1716         struct bnx2x_exeq_elem *elem;
1717         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1718         bool restore = test_bit(RAMROD_RESTORE, &p->ramrod_flags);
1719
1720         /* Allocate the execution queue element */
1721         elem = bnx2x_exe_queue_alloc_elem(bp);
1722         if (!elem)
1723                 return -ENOMEM;
1724
1725         /* Set the command 'length' */
1726         switch (p->user_req.cmd) {
1727         case BNX2X_VLAN_MAC_MOVE:
1728                 elem->cmd_len = 2;
1729                 break;
1730         default:
1731                 elem->cmd_len = 1;
1732         }
1733
1734         /* Fill the object specific info */
1735         memcpy(&elem->cmd_data.vlan_mac, &p->user_req, sizeof(p->user_req));
1736
1737         /* Try to add a new command to the pending list */
1738         return bnx2x_exe_queue_add(bp, &o->exe_queue, elem, restore);
1739 }
1740
1741 /**
1742  * bnx2x_config_vlan_mac - configure VLAN/MAC/VLAN_MAC filtering rules.
1743  *
1744  * @bp:   device handle
1745  * @p:
1746  *
1747  */
1748 int bnx2x_config_vlan_mac(struct bnx2x *bp,
1749                            struct bnx2x_vlan_mac_ramrod_params *p)
1750 {
1751         int rc = 0;
1752         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1753         unsigned long *ramrod_flags = &p->ramrod_flags;
1754         bool cont = test_bit(RAMROD_CONT, ramrod_flags);
1755         struct bnx2x_raw_obj *raw = &o->raw;
1756
1757         /*
1758          * Add new elements to the execution list for commands that require it.
1759          */
1760         if (!cont) {
1761                 rc = bnx2x_vlan_mac_push_new_cmd(bp, p);
1762                 if (rc)
1763                         return rc;
1764         }
1765
1766         /* If nothing will be executed further in this iteration we want to
1767          * return PENDING if there are pending commands
1768          */
1769         if (!bnx2x_exe_queue_empty(&o->exe_queue))
1770                 rc = 1;
1771
1772         if (test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags))  {
1773                 DP(BNX2X_MSG_SP, "RAMROD_DRV_CLR_ONLY requested: clearing a pending bit.\n");
1774                 raw->clear_pending(raw);
1775         }
1776
1777         /* Execute commands if required */
1778         if (cont || test_bit(RAMROD_EXEC, ramrod_flags) ||
1779             test_bit(RAMROD_COMP_WAIT, ramrod_flags)) {
1780                 rc = __bnx2x_vlan_mac_execute_step(bp, p->vlan_mac_obj,
1781                                                    &p->ramrod_flags);
1782                 if (rc < 0)
1783                         return rc;
1784         }
1785
1786         /* RAMROD_COMP_WAIT is a superset of RAMROD_EXEC. If it was set
1787          * then user want to wait until the last command is done.
1788          */
1789         if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) {
1790                 /* Wait maximum for the current exe_queue length iterations plus
1791                  * one (for the current pending command).
1792                  */
1793                 int max_iterations = bnx2x_exe_queue_length(&o->exe_queue) + 1;
1794
1795                 while (!bnx2x_exe_queue_empty(&o->exe_queue) &&
1796                        max_iterations--) {
1797
1798                         /* Wait for the current command to complete */
1799                         rc = raw->wait_comp(bp, raw);
1800                         if (rc)
1801                                 return rc;
1802
1803                         /* Make a next step */
1804                         rc = __bnx2x_vlan_mac_execute_step(bp,
1805                                                            p->vlan_mac_obj,
1806                                                            &p->ramrod_flags);
1807                         if (rc < 0)
1808                                 return rc;
1809                 }
1810
1811                 return 0;
1812         }
1813
1814         return rc;
1815 }
1816
1817 /**
1818  * bnx2x_vlan_mac_del_all - delete elements with given vlan_mac_flags spec
1819  *
1820  * @bp:                 device handle
1821  * @o:
1822  * @vlan_mac_flags:
1823  * @ramrod_flags:       execution flags to be used for this deletion
1824  *
1825  * if the last operation has completed successfully and there are no
1826  * more elements left, positive value if the last operation has completed
1827  * successfully and there are more previously configured elements, negative
1828  * value is current operation has failed.
1829  */
1830 static int bnx2x_vlan_mac_del_all(struct bnx2x *bp,
1831                                   struct bnx2x_vlan_mac_obj *o,
1832                                   unsigned long *vlan_mac_flags,
1833                                   unsigned long *ramrod_flags)
1834 {
1835         struct bnx2x_vlan_mac_registry_elem *pos = NULL;
1836         struct bnx2x_vlan_mac_ramrod_params p;
1837         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1838         struct bnx2x_exeq_elem *exeq_pos, *exeq_pos_n;
1839         unsigned long flags;
1840         int read_lock;
1841         int rc = 0;
1842
1843         /* Clear pending commands first */
1844
1845         spin_lock(&exeq->lock);
1846
1847         list_for_each_entry_safe(exeq_pos, exeq_pos_n, &exeq->exe_queue, link) {
1848                 flags = exeq_pos->cmd_data.vlan_mac.vlan_mac_flags;
1849                 if (BNX2X_VLAN_MAC_CMP_FLAGS(flags) ==
1850                     BNX2X_VLAN_MAC_CMP_FLAGS(*vlan_mac_flags)) {
1851                         rc = exeq->remove(bp, exeq->owner, exeq_pos);
1852                         if (rc) {
1853                                 BNX2X_ERR("Failed to remove command\n");
1854                                 spin_unlock(&exeq->lock);
1855                                 return rc;
1856                         }
1857                         list_del(&exeq_pos->link);
1858                         bnx2x_exe_queue_free_elem(bp, exeq_pos);
1859                 }
1860         }
1861
1862         spin_unlock(&exeq->lock);
1863
1864         /* Prepare a command request */
1865         memset(&p, 0, sizeof(p));
1866         p.vlan_mac_obj = o;
1867         p.ramrod_flags = *ramrod_flags;
1868         p.user_req.cmd = BNX2X_VLAN_MAC_DEL;
1869
1870         /* Add all but the last VLAN-MAC to the execution queue without actually
1871          * execution anything.
1872          */
1873         __clear_bit(RAMROD_COMP_WAIT, &p.ramrod_flags);
1874         __clear_bit(RAMROD_EXEC, &p.ramrod_flags);
1875         __clear_bit(RAMROD_CONT, &p.ramrod_flags);
1876
1877         DP(BNX2X_MSG_SP, "vlan_mac_del_all -- taking vlan_mac_lock (reader)\n");
1878         read_lock = bnx2x_vlan_mac_h_read_lock(bp, o);
1879         if (read_lock != 0)
1880                 return read_lock;
1881
1882         list_for_each_entry(pos, &o->head, link) {
1883                 flags = pos->vlan_mac_flags;
1884                 if (BNX2X_VLAN_MAC_CMP_FLAGS(flags) ==
1885                     BNX2X_VLAN_MAC_CMP_FLAGS(*vlan_mac_flags)) {
1886                         p.user_req.vlan_mac_flags = pos->vlan_mac_flags;
1887                         memcpy(&p.user_req.u, &pos->u, sizeof(pos->u));
1888                         rc = bnx2x_config_vlan_mac(bp, &p);
1889                         if (rc < 0) {
1890                                 BNX2X_ERR("Failed to add a new DEL command\n");
1891                                 bnx2x_vlan_mac_h_read_unlock(bp, o);
1892                                 return rc;
1893                         }
1894                 }
1895         }
1896
1897         DP(BNX2X_MSG_SP, "vlan_mac_del_all -- releasing vlan_mac_lock (reader)\n");
1898         bnx2x_vlan_mac_h_read_unlock(bp, o);
1899
1900         p.ramrod_flags = *ramrod_flags;
1901         __set_bit(RAMROD_CONT, &p.ramrod_flags);
1902
1903         return bnx2x_config_vlan_mac(bp, &p);
1904 }
1905
1906 static inline void bnx2x_init_raw_obj(struct bnx2x_raw_obj *raw,
1907                                       uint8_t cl_id,
1908         uint32_t cid, uint8_t func_id, void *rdata,
1909                                       dma_addr_t rdata_mapping,
1910                                       int state,
1911         unsigned long *pstate, bnx2x_obj_type type)
1912 {
1913         raw->func_id = func_id;
1914         raw->cid = cid;
1915         raw->cl_id = cl_id;
1916         raw->rdata = rdata;
1917         raw->rdata_mapping = rdata_mapping;
1918         raw->state = state;
1919         raw->pstate = pstate;
1920         raw->obj_type = type;
1921         raw->check_pending = bnx2x_raw_check_pending;
1922         raw->clear_pending = bnx2x_raw_clear_pending;
1923         raw->set_pending = bnx2x_raw_set_pending;
1924         raw->wait_comp = bnx2x_raw_wait;
1925 }
1926
1927 static inline void bnx2x_init_vlan_mac_common(struct bnx2x_vlan_mac_obj *o,
1928         uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1929                                               dma_addr_t rdata_mapping,
1930         int state, unsigned long *pstate, bnx2x_obj_type type,
1931         struct bnx2x_credit_pool_obj *macs_pool,
1932         struct bnx2x_credit_pool_obj *vlans_pool)
1933 {
1934         INIT_LIST_HEAD(&o->head);
1935         o->head_reader = 0;
1936         o->head_exe_request = false;
1937         o->saved_ramrod_flags = 0;
1938
1939         o->macs_pool = macs_pool;
1940         o->vlans_pool = vlans_pool;
1941
1942         o->delete_all = bnx2x_vlan_mac_del_all;
1943         o->restore = bnx2x_vlan_mac_restore;
1944         o->complete = bnx2x_complete_vlan_mac;
1945         o->wait = bnx2x_wait_vlan_mac;
1946
1947         bnx2x_init_raw_obj(&o->raw, cl_id, cid, func_id, rdata, rdata_mapping,
1948                            state, pstate, type);
1949 }
1950
1951 void bnx2x_init_mac_obj(struct bnx2x *bp,
1952                         struct bnx2x_vlan_mac_obj *mac_obj,
1953                         uint8_t cl_id, uint32_t cid, uint8_t func_id,
1954                         void *rdata,
1955                         dma_addr_t rdata_mapping, int state,
1956                         unsigned long *pstate, bnx2x_obj_type type,
1957                         struct bnx2x_credit_pool_obj *macs_pool)
1958 {
1959         union bnx2x_qable_obj *qable_obj = (union bnx2x_qable_obj *)mac_obj;
1960
1961         bnx2x_init_vlan_mac_common(mac_obj, cl_id, cid, func_id, rdata,
1962                                    rdata_mapping, state, pstate, type,
1963                                    macs_pool, NULL);
1964
1965         /* CAM credit pool handling */
1966         mac_obj->get_credit = bnx2x_get_credit_mac;
1967         mac_obj->put_credit = bnx2x_put_credit_mac;
1968         mac_obj->get_cam_offset = bnx2x_get_cam_offset_mac;
1969         mac_obj->put_cam_offset = bnx2x_put_cam_offset_mac;
1970
1971         if (CHIP_IS_E1x(bp)) {
1972                 mac_obj->set_one_rule      = bnx2x_set_one_mac_e1x;
1973                 mac_obj->check_del         = bnx2x_check_mac_del;
1974                 mac_obj->check_add         = bnx2x_check_mac_add;
1975                 mac_obj->check_move        = bnx2x_check_move_always_err;
1976                 mac_obj->ramrod_cmd        = RAMROD_CMD_ID_ETH_SET_MAC;
1977
1978                 /* Exe Queue */
1979                 bnx2x_exe_queue_init(bp,
1980                                      &mac_obj->exe_queue, 1, qable_obj,
1981                                      bnx2x_validate_vlan_mac,
1982                                      bnx2x_remove_vlan_mac,
1983                                      bnx2x_optimize_vlan_mac,
1984                                      bnx2x_execute_vlan_mac,
1985                                      bnx2x_exeq_get_mac);
1986         } else {
1987                 mac_obj->set_one_rule      = bnx2x_set_one_mac_e2;
1988                 mac_obj->check_del         = bnx2x_check_mac_del;
1989                 mac_obj->check_add         = bnx2x_check_mac_add;
1990                 mac_obj->check_move        = bnx2x_check_move;
1991                 mac_obj->ramrod_cmd        =
1992                         RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES;
1993                 mac_obj->get_n_elements    = bnx2x_get_n_elements;
1994
1995                 /* Exe Queue */
1996                 bnx2x_exe_queue_init(bp,
1997                                      &mac_obj->exe_queue, CLASSIFY_RULES_COUNT,
1998                                      qable_obj, bnx2x_validate_vlan_mac,
1999                                      bnx2x_remove_vlan_mac,
2000                                      bnx2x_optimize_vlan_mac,
2001                                      bnx2x_execute_vlan_mac,
2002                                      bnx2x_exeq_get_mac);
2003         }
2004 }
2005
2006 void bnx2x_init_vlan_obj(struct bnx2x *bp,
2007                          struct bnx2x_vlan_mac_obj *vlan_obj,
2008                          uint8_t cl_id, uint32_t cid, uint8_t func_id,
2009                          void *rdata,
2010                          dma_addr_t rdata_mapping, int state,
2011                          unsigned long *pstate, bnx2x_obj_type type,
2012                          struct bnx2x_credit_pool_obj *vlans_pool)
2013 {
2014         union bnx2x_qable_obj *qable_obj = (union bnx2x_qable_obj *)vlan_obj;
2015
2016         bnx2x_init_vlan_mac_common(vlan_obj, cl_id, cid, func_id, rdata,
2017                                    rdata_mapping, state, pstate, type, NULL,
2018                                    vlans_pool);
2019
2020         vlan_obj->get_credit = bnx2x_get_credit_vlan;
2021         vlan_obj->put_credit = bnx2x_put_credit_vlan;
2022         vlan_obj->get_cam_offset = bnx2x_get_cam_offset_vlan;
2023         vlan_obj->put_cam_offset = bnx2x_put_cam_offset_vlan;
2024
2025         if (CHIP_IS_E1x(bp)) {
2026                 BNX2X_ERR("Do not support chips others than E2 and newer\n");
2027                 BUG();
2028         } else {
2029                 vlan_obj->set_one_rule      = bnx2x_set_one_vlan_e2;
2030                 vlan_obj->check_del         = bnx2x_check_vlan_del;
2031                 vlan_obj->check_add         = bnx2x_check_vlan_add;
2032                 vlan_obj->check_move        = bnx2x_check_move;
2033                 vlan_obj->ramrod_cmd        =
2034                         RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES;
2035                 vlan_obj->get_n_elements    = bnx2x_get_n_elements;
2036
2037                 /* Exe Queue */
2038                 bnx2x_exe_queue_init(bp,
2039                                      &vlan_obj->exe_queue, CLASSIFY_RULES_COUNT,
2040                                      qable_obj, bnx2x_validate_vlan_mac,
2041                                      bnx2x_remove_vlan_mac,
2042                                      bnx2x_optimize_vlan_mac,
2043                                      bnx2x_execute_vlan_mac,
2044                                      bnx2x_exeq_get_vlan);
2045         }
2046 }
2047
2048 /* RX_MODE verbs: DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
2049 static inline void __storm_memset_mac_filters(struct bnx2x *bp,
2050                         struct tstorm_eth_mac_filter_config *mac_filters,
2051                         uint16_t pf_id)
2052 {
2053         size_t size = sizeof(struct tstorm_eth_mac_filter_config);
2054
2055         uint32_t addr = BAR_TSTRORM_INTMEM +
2056                         TSTORM_MAC_FILTER_CONFIG_OFFSET(pf_id);
2057
2058         __storm_memset_struct(bp, addr, size, (uint32_t *)mac_filters);
2059 }
2060
2061 static int bnx2x_set_rx_mode_e1x(struct bnx2x *bp,
2062                                  struct bnx2x_rx_mode_ramrod_params *p)
2063 {
2064         /* update the bp MAC filter structure */
2065         uint32_t mask = (1 << p->cl_id);
2066
2067         struct tstorm_eth_mac_filter_config *mac_filters =
2068                 (struct tstorm_eth_mac_filter_config *)p->rdata;
2069
2070         /* initial setting is drop-all */
2071         uint8_t drop_all_ucast = 1, drop_all_mcast = 1;
2072         uint8_t accp_all_ucast = 0, accp_all_bcast = 0, accp_all_mcast = 0;
2073         uint8_t unmatched_unicast = 0;
2074
2075     /* In e1x there we only take into account rx accept flag since tx switching
2076      * isn't enabled. */
2077         if (test_bit(BNX2X_ACCEPT_UNICAST, &p->rx_accept_flags))
2078                 /* accept matched ucast */
2079                 drop_all_ucast = 0;
2080
2081         if (test_bit(BNX2X_ACCEPT_MULTICAST, &p->rx_accept_flags))
2082                 /* accept matched mcast */
2083                 drop_all_mcast = 0;
2084
2085         if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, &p->rx_accept_flags)) {
2086                 /* accept all mcast */
2087                 drop_all_ucast = 0;
2088                 accp_all_ucast = 1;
2089         }
2090         if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, &p->rx_accept_flags)) {
2091                 /* accept all mcast */
2092                 drop_all_mcast = 0;
2093                 accp_all_mcast = 1;
2094         }
2095         if (test_bit(BNX2X_ACCEPT_BROADCAST, &p->rx_accept_flags))
2096                 /* accept (all) bcast */
2097                 accp_all_bcast = 1;
2098         if (test_bit(BNX2X_ACCEPT_UNMATCHED, &p->rx_accept_flags))
2099                 /* accept unmatched unicasts */
2100                 unmatched_unicast = 1;
2101
2102         mac_filters->ucast_drop_all = drop_all_ucast ?
2103                 mac_filters->ucast_drop_all | mask :
2104                 mac_filters->ucast_drop_all & ~mask;
2105
2106         mac_filters->mcast_drop_all = drop_all_mcast ?
2107                 mac_filters->mcast_drop_all | mask :
2108                 mac_filters->mcast_drop_all & ~mask;
2109
2110         mac_filters->ucast_accept_all = accp_all_ucast ?
2111                 mac_filters->ucast_accept_all | mask :
2112                 mac_filters->ucast_accept_all & ~mask;
2113
2114         mac_filters->mcast_accept_all = accp_all_mcast ?
2115                 mac_filters->mcast_accept_all | mask :
2116                 mac_filters->mcast_accept_all & ~mask;
2117
2118         mac_filters->bcast_accept_all = accp_all_bcast ?
2119                 mac_filters->bcast_accept_all | mask :
2120                 mac_filters->bcast_accept_all & ~mask;
2121
2122         mac_filters->unmatched_unicast = unmatched_unicast ?
2123                 mac_filters->unmatched_unicast | mask :
2124                 mac_filters->unmatched_unicast & ~mask;
2125
2126         DP(BNX2X_MSG_SP, "drop_ucast 0x%x\ndrop_mcast 0x%x\n accp_ucast 0x%x\n"
2127                          "accp_mcast 0x%x\naccp_bcast 0x%x\n",
2128            mac_filters->ucast_drop_all, mac_filters->mcast_drop_all,
2129            mac_filters->ucast_accept_all, mac_filters->mcast_accept_all,
2130            mac_filters->bcast_accept_all);
2131
2132         /* write the MAC filter structure*/
2133         __storm_memset_mac_filters(bp, mac_filters, p->func_id);
2134
2135         /* The operation is completed */
2136         clear_bit(p->state, p->pstate);
2137         cmb();
2138
2139         return 0;
2140 }
2141
2142 /* Setup ramrod data */
2143 static inline void bnx2x_rx_mode_set_rdata_hdr_e2(uint32_t cid,
2144                                 struct eth_classify_header *hdr,
2145                                 uint8_t rule_cnt)
2146 {
2147         hdr->echo = cpu_to_le32(cid);
2148         hdr->rule_cnt = rule_cnt;
2149 }
2150
2151 static inline void bnx2x_rx_mode_set_cmd_state_e2(struct bnx2x *bp,
2152                                 unsigned long *accept_flags,
2153                                 struct eth_filter_rules_cmd *cmd,
2154                                 bool clear_accept_all)
2155 {
2156         uint16_t state;
2157
2158         /* start with 'drop-all' */
2159         state = ETH_FILTER_RULES_CMD_UCAST_DROP_ALL |
2160                 ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2161
2162         if (test_bit(BNX2X_ACCEPT_UNICAST, accept_flags))
2163                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2164
2165         if (test_bit(BNX2X_ACCEPT_MULTICAST, accept_flags))
2166                 state &= ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2167
2168         if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, accept_flags)) {
2169                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2170                 state |= ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL;
2171         }
2172
2173         if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, accept_flags)) {
2174                 state |= ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL;
2175                 state &= ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2176         }
2177
2178         if (test_bit(BNX2X_ACCEPT_BROADCAST, accept_flags))
2179                 state |= ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL;
2180
2181         if (test_bit(BNX2X_ACCEPT_UNMATCHED, accept_flags)) {
2182                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2183                 state |= ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED;
2184         }
2185
2186         if (test_bit(BNX2X_ACCEPT_ANY_VLAN, accept_flags))
2187                 state |= ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN;
2188
2189         /* Clear ACCEPT_ALL_XXX flags for FCoE L2 Queue */
2190         if (clear_accept_all) {
2191                 state &= ~ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL;
2192                 state &= ~ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL;
2193                 state &= ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL;
2194                 state &= ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED;
2195         }
2196
2197         cmd->state = cpu_to_le16(state);
2198 }
2199
2200 static int bnx2x_set_rx_mode_e2(struct bnx2x *bp,
2201                                 struct bnx2x_rx_mode_ramrod_params *p)
2202 {
2203         struct eth_filter_rules_ramrod_data *data = p->rdata;
2204         int rc;
2205         uint8_t rule_idx = 0;
2206
2207         /* Reset the ramrod data buffer */
2208         memset(data, 0, sizeof(*data));
2209
2210         /* Setup ramrod data */
2211
2212         /* Tx (internal switching) */
2213         if (test_bit(RAMROD_TX, &p->ramrod_flags)) {
2214                 data->rules[rule_idx].client_id = p->cl_id;
2215                 data->rules[rule_idx].func_id = p->func_id;
2216
2217                 data->rules[rule_idx].cmd_general_data =
2218                         ETH_FILTER_RULES_CMD_TX_CMD;
2219
2220                 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags,
2221                                                &(data->rules[rule_idx++]),
2222                                                false);
2223         }
2224
2225         /* Rx */
2226         if (test_bit(RAMROD_RX, &p->ramrod_flags)) {
2227                 data->rules[rule_idx].client_id = p->cl_id;
2228                 data->rules[rule_idx].func_id = p->func_id;
2229
2230                 data->rules[rule_idx].cmd_general_data =
2231                         ETH_FILTER_RULES_CMD_RX_CMD;
2232
2233                 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags,
2234                                                &(data->rules[rule_idx++]),
2235                                                false);
2236         }
2237
2238         /* If FCoE Queue configuration has been requested configure the Rx and
2239          * internal switching modes for this queue in separate rules.
2240          *
2241          * FCoE queue shell never be set to ACCEPT_ALL packets of any sort:
2242          * MCAST_ALL, UCAST_ALL, BCAST_ALL and UNMATCHED.
2243          */
2244         if (test_bit(BNX2X_RX_MODE_FCOE_ETH, &p->rx_mode_flags)) {
2245                 /*  Tx (internal switching) */
2246                 if (test_bit(RAMROD_TX, &p->ramrod_flags)) {
2247                         data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id);
2248                         data->rules[rule_idx].func_id = p->func_id;
2249
2250                         data->rules[rule_idx].cmd_general_data =
2251                                                 ETH_FILTER_RULES_CMD_TX_CMD;
2252
2253                         bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags,
2254                                                        &(data->rules[rule_idx]),
2255                                                        true);
2256                         rule_idx++;
2257                 }
2258
2259                 /* Rx */
2260                 if (test_bit(RAMROD_RX, &p->ramrod_flags)) {
2261                         data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id);
2262                         data->rules[rule_idx].func_id = p->func_id;
2263
2264                         data->rules[rule_idx].cmd_general_data =
2265                                                 ETH_FILTER_RULES_CMD_RX_CMD;
2266
2267                         bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags,
2268                                                        &(data->rules[rule_idx]),
2269                                                        true);
2270                         rule_idx++;
2271                 }
2272         }
2273
2274         /* Set the ramrod header (most importantly - number of rules to
2275          * configure).
2276          */
2277         bnx2x_rx_mode_set_rdata_hdr_e2(p->cid, &data->header, rule_idx);
2278
2279         DP(BNX2X_MSG_SP, "About to configure %d rules, rx_accept_flags 0x%lx, tx_accept_flags 0x%lx\n",
2280                          data->header.rule_cnt, p->rx_accept_flags,
2281                          p->tx_accept_flags);
2282
2283         /* No need for an explicit memory barrier here as long as we
2284          * ensure the ordering of writing to the SPQ element
2285          * and updating of the SPQ producer which involves a memory
2286          * read. If the memory read is removed we will have to put a
2287          * full memory barrier there (inside bnx2x_sp_post()).
2288          */
2289
2290         /* Send a ramrod */
2291         rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_FILTER_RULES, p->cid,
2292                            U64_HI(p->rdata_mapping),
2293                            U64_LO(p->rdata_mapping),
2294                            ETH_CONNECTION_TYPE);
2295         if (rc)
2296                 return rc;
2297
2298         /* Ramrod completion is pending */
2299         return 1;
2300 }
2301
2302 static int bnx2x_wait_rx_mode_comp_e2(struct bnx2x *bp,
2303                                       struct bnx2x_rx_mode_ramrod_params *p)
2304 {
2305         return bnx2x_state_wait(bp, p->state, p->pstate);
2306 }
2307
2308 static int bnx2x_empty_rx_mode_wait(struct bnx2x *bp,
2309                                     struct bnx2x_rx_mode_ramrod_params *p)
2310 {
2311         /* Do nothing */
2312         return 0;
2313 }
2314
2315 int bnx2x_config_rx_mode(struct bnx2x *bp,
2316                          struct bnx2x_rx_mode_ramrod_params *p)
2317 {
2318         int rc;
2319
2320         /* Configure the new classification in the chip */
2321         rc = p->rx_mode_obj->config_rx_mode(bp, p);
2322         if (rc < 0)
2323                 return rc;
2324
2325         /* Wait for a ramrod completion if was requested */
2326         if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) {
2327                 rc = p->rx_mode_obj->wait_comp(bp, p);
2328                 if (rc)
2329                         return rc;
2330         }
2331
2332         return rc;
2333 }
2334
2335 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
2336                             struct bnx2x_rx_mode_obj *o)
2337 {
2338         if (CHIP_IS_E1x(bp)) {
2339                 o->wait_comp      = bnx2x_empty_rx_mode_wait;
2340                 o->config_rx_mode = bnx2x_set_rx_mode_e1x;
2341         } else {
2342                 o->wait_comp      = bnx2x_wait_rx_mode_comp_e2;
2343                 o->config_rx_mode = bnx2x_set_rx_mode_e2;
2344         }
2345 }
2346
2347 /********************* Multicast verbs: SET, CLEAR ****************************/
2348 static inline uint8_t bnx2x_mcast_bin_from_mac(uint8_t *mac)
2349 {
2350         return (crc32c_le(0, mac, Eaddrlen) >> 24) & 0xff;
2351 }
2352
2353 struct bnx2x_mcast_mac_elem {
2354         struct list_head link;
2355         uint8_t mac[Eaddrlen];
2356         uint8_t pad[2]; /* For a natural alignment of the following buffer */
2357 };
2358
2359 struct bnx2x_pending_mcast_cmd {
2360         struct list_head link;
2361         int type; /* BNX2X_MCAST_CMD_X */
2362         union {
2363                 struct list_head macs_head;
2364                 uint32_t macs_num; /* Needed for DEL command */
2365                 int next_bin; /* Needed for RESTORE flow with aprox match */
2366         } data;
2367
2368         bool done; /* set to true, when the command has been handled,
2369                     * practically used in 57712 handling only, where one pending
2370                     * command may be handled in a few operations. As long as for
2371                     * other chips every operation handling is completed in a
2372                     * single ramrod, there is no need to utilize this field.
2373                     */
2374 };
2375
2376 static int bnx2x_mcast_wait(struct bnx2x *bp,
2377                             struct bnx2x_mcast_obj *o)
2378 {
2379         if (bnx2x_state_wait(bp, o->sched_state, o->raw.pstate) ||
2380                         o->raw.wait_comp(bp, &o->raw))
2381                 return -EBUSY;
2382
2383         return 0;
2384 }
2385
2386 static int bnx2x_mcast_enqueue_cmd(struct bnx2x *bp,
2387                                    struct bnx2x_mcast_obj *o,
2388                                    struct bnx2x_mcast_ramrod_params *p,
2389                                    enum bnx2x_mcast_cmd cmd)
2390 {
2391         int total_sz;
2392         struct bnx2x_pending_mcast_cmd *new_cmd;
2393         struct bnx2x_mcast_mac_elem *cur_mac = NULL;
2394         struct bnx2x_mcast_list_elem *pos;
2395         int macs_list_len = ((cmd == BNX2X_MCAST_CMD_ADD) ?
2396                              p->mcast_list_len : 0);
2397
2398         /* If the command is empty ("handle pending commands only"), break */
2399         if (!p->mcast_list_len)
2400                 return 0;
2401
2402         total_sz = sizeof(*new_cmd) +
2403                 macs_list_len * sizeof(struct bnx2x_mcast_mac_elem);
2404
2405         /* Add mcast is called under spin_lock, thus calling with GFP_ATOMIC */
2406         new_cmd = kzmalloc(total_sz, 0);
2407
2408         if (!new_cmd)
2409                 return -ENOMEM;
2410
2411         DP(BNX2X_MSG_SP, "About to enqueue a new %d command. macs_list_len=%d\n",
2412            cmd, macs_list_len);
2413
2414         INIT_LIST_HEAD(&new_cmd->data.macs_head);
2415
2416         new_cmd->type = cmd;
2417         new_cmd->done = false;
2418
2419         switch (cmd) {
2420         case BNX2X_MCAST_CMD_ADD:
2421                 cur_mac = (struct bnx2x_mcast_mac_elem *)
2422                           ((uint8_t *)new_cmd + sizeof(*new_cmd));
2423
2424                 /* Push the MACs of the current command into the pending command
2425                  * MACs list: FIFO
2426                  */
2427                 list_for_each_entry(pos, &p->mcast_list, link) {
2428                         memcpy(cur_mac->mac, pos->mac, Eaddrlen);
2429                         list_add_tail(&cur_mac->link, &new_cmd->data.macs_head);
2430                         cur_mac++;
2431                 }
2432
2433                 break;
2434
2435         case BNX2X_MCAST_CMD_DEL:
2436                 new_cmd->data.macs_num = p->mcast_list_len;
2437                 break;
2438
2439         case BNX2X_MCAST_CMD_RESTORE:
2440                 new_cmd->data.next_bin = 0;
2441                 break;
2442
2443         default:
2444                 kfree(new_cmd);
2445                 BNX2X_ERR("Unknown command: %d\n", cmd);
2446                 return -EINVAL;
2447         }
2448
2449         /* Push the new pending command to the tail of the pending list: FIFO */
2450         list_add_tail(&new_cmd->link, &o->pending_cmds_head);
2451
2452         o->set_sched(o);
2453
2454         return 1;
2455 }
2456
2457 /**
2458  * bnx2x_mcast_get_next_bin - get the next set bin (index)
2459  *
2460  * @o:
2461  * @last:       index to start looking from (including)
2462  *
2463  * returns the next found (set) bin or a negative value if none is found.
2464  */
2465 static inline int bnx2x_mcast_get_next_bin(struct bnx2x_mcast_obj *o, int last)
2466 {
2467         int i, j, inner_start = last % BIT_VEC64_ELEM_SZ;
2468
2469         for (i = last / BIT_VEC64_ELEM_SZ; i < BNX2X_MCAST_VEC_SZ; i++) {
2470                 if (o->registry.aprox_match.vec[i])
2471                         for (j = inner_start; j < BIT_VEC64_ELEM_SZ; j++) {
2472                                 int cur_bit = j + BIT_VEC64_ELEM_SZ * i;
2473                                 if (BIT_VEC64_TEST_BIT(o->registry.aprox_match.
2474                                                        vec, cur_bit)) {
2475                                         return cur_bit;
2476                                 }
2477                         }
2478                 inner_start = 0;
2479         }
2480
2481         /* None found */
2482         return -1;
2483 }
2484
2485 /**
2486  * bnx2x_mcast_clear_first_bin - find the first set bin and clear it
2487  *
2488  * @o:
2489  *
2490  * returns the index of the found bin or -1 if none is found
2491  */
2492 static inline int bnx2x_mcast_clear_first_bin(struct bnx2x_mcast_obj *o)
2493 {
2494         int cur_bit = bnx2x_mcast_get_next_bin(o, 0);
2495
2496         if (cur_bit >= 0)
2497                 BIT_VEC64_CLEAR_BIT(o->registry.aprox_match.vec, cur_bit);
2498
2499         return cur_bit;
2500 }
2501
2502 static inline uint8_t bnx2x_mcast_get_rx_tx_flag(struct bnx2x_mcast_obj *o)
2503 {
2504         struct bnx2x_raw_obj *raw = &o->raw;
2505         uint8_t rx_tx_flag = 0;
2506
2507         if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) ||
2508             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
2509                 rx_tx_flag |= ETH_MULTICAST_RULES_CMD_TX_CMD;
2510
2511         if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) ||
2512             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
2513                 rx_tx_flag |= ETH_MULTICAST_RULES_CMD_RX_CMD;
2514
2515         return rx_tx_flag;
2516 }
2517
2518 static void bnx2x_mcast_set_one_rule_e2(struct bnx2x *bp,
2519                                         struct bnx2x_mcast_obj *o, int idx,
2520                                         union bnx2x_mcast_config_data *cfg_data,
2521                                         enum bnx2x_mcast_cmd cmd)
2522 {
2523         struct bnx2x_raw_obj *r = &o->raw;
2524         struct eth_multicast_rules_ramrod_data *data =
2525                 (struct eth_multicast_rules_ramrod_data *)(r->rdata);
2526         uint8_t func_id = r->func_id;
2527         uint8_t rx_tx_add_flag = bnx2x_mcast_get_rx_tx_flag(o);
2528         int bin;
2529
2530         if ((cmd == BNX2X_MCAST_CMD_ADD) || (cmd == BNX2X_MCAST_CMD_RESTORE))
2531                 rx_tx_add_flag |= ETH_MULTICAST_RULES_CMD_IS_ADD;
2532
2533         data->rules[idx].cmd_general_data |= rx_tx_add_flag;
2534
2535         /* Get a bin and update a bins' vector */
2536         switch (cmd) {
2537         case BNX2X_MCAST_CMD_ADD:
2538                 bin = bnx2x_mcast_bin_from_mac(cfg_data->mac);
2539                 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec, bin);
2540                 break;
2541
2542         case BNX2X_MCAST_CMD_DEL:
2543                 /* If there were no more bins to clear
2544                  * (bnx2x_mcast_clear_first_bin() returns -1) then we would
2545                  * clear any (0xff) bin.
2546                  * See bnx2x_mcast_validate_e2() for explanation when it may
2547                  * happen.
2548                  */
2549                 bin = bnx2x_mcast_clear_first_bin(o);
2550                 break;
2551
2552         case BNX2X_MCAST_CMD_RESTORE:
2553                 bin = cfg_data->bin;
2554                 break;
2555
2556         default:
2557                 BNX2X_ERR("Unknown command: %d\n", cmd);
2558                 return;
2559         }
2560
2561         DP(BNX2X_MSG_SP, "%s bin %d\n",
2562                          ((rx_tx_add_flag & ETH_MULTICAST_RULES_CMD_IS_ADD) ?
2563                          "Setting"  : "Clearing"), bin);
2564
2565         data->rules[idx].bin_id    = (uint8_t)bin;
2566         data->rules[idx].func_id   = func_id;
2567         data->rules[idx].engine_id = o->engine_id;
2568 }
2569
2570 /**
2571  * bnx2x_mcast_handle_restore_cmd_e2 - restore configuration from the registry
2572  *
2573  * @bp:         device handle
2574  * @o:
2575  * @start_bin:  index in the registry to start from (including)
2576  * @rdata_idx:  index in the ramrod data to start from
2577  *
2578  * returns last handled bin index or -1 if all bins have been handled
2579  */
2580 static inline int bnx2x_mcast_handle_restore_cmd_e2(
2581         struct bnx2x *bp, struct bnx2x_mcast_obj *o , int start_bin,
2582         int *rdata_idx)
2583 {
2584         int cur_bin, cnt = *rdata_idx;
2585         union bnx2x_mcast_config_data cfg_data = {NULL};
2586
2587         /* go through the registry and configure the bins from it */
2588         for (cur_bin = bnx2x_mcast_get_next_bin(o, start_bin); cur_bin >= 0;
2589             cur_bin = bnx2x_mcast_get_next_bin(o, cur_bin + 1)) {
2590
2591                 cfg_data.bin = (uint8_t)cur_bin;
2592                 o->set_one_rule(bp, o, cnt, &cfg_data,
2593                                 BNX2X_MCAST_CMD_RESTORE);
2594
2595                 cnt++;
2596
2597                 DP(BNX2X_MSG_SP, "About to configure a bin %d\n", cur_bin);
2598
2599                 /* Break if we reached the maximum number
2600                  * of rules.
2601                  */
2602                 if (cnt >= o->max_cmd_len)
2603                         break;
2604         }
2605
2606         *rdata_idx = cnt;
2607
2608         return cur_bin;
2609 }
2610
2611 static inline void bnx2x_mcast_hdl_pending_add_e2(struct bnx2x *bp,
2612         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2613         int *line_idx)
2614 {
2615         struct bnx2x_mcast_mac_elem *pmac_pos, *pmac_pos_n;
2616         int cnt = *line_idx;
2617         union bnx2x_mcast_config_data cfg_data = {NULL};
2618
2619         list_for_each_entry_safe(pmac_pos, pmac_pos_n, &cmd_pos->data.macs_head,
2620                                  link) {
2621
2622                 cfg_data.mac = &pmac_pos->mac[0];
2623                 o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type);
2624
2625                 cnt++;
2626
2627                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n",
2628                    pmac_pos->mac);
2629
2630                 list_del(&pmac_pos->link);
2631
2632                 /* Break if we reached the maximum number
2633                  * of rules.
2634                  */
2635                 if (cnt >= o->max_cmd_len)
2636                         break;
2637         }
2638
2639         *line_idx = cnt;
2640
2641         /* if no more MACs to configure - we are done */
2642         if (list_empty(&cmd_pos->data.macs_head))
2643                 cmd_pos->done = true;
2644 }
2645
2646 static inline void bnx2x_mcast_hdl_pending_del_e2(struct bnx2x *bp,
2647         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2648         int *line_idx)
2649 {
2650         int cnt = *line_idx;
2651
2652         while (cmd_pos->data.macs_num) {
2653                 o->set_one_rule(bp, o, cnt, NULL, cmd_pos->type);
2654
2655                 cnt++;
2656
2657                 cmd_pos->data.macs_num--;
2658
2659                   DP(BNX2X_MSG_SP, "Deleting MAC. %d left,cnt is %d\n",
2660                                    cmd_pos->data.macs_num, cnt);
2661
2662                 /* Break if we reached the maximum
2663                  * number of rules.
2664                  */
2665                 if (cnt >= o->max_cmd_len)
2666                         break;
2667         }
2668
2669         *line_idx = cnt;
2670
2671         /* If we cleared all bins - we are done */
2672         if (!cmd_pos->data.macs_num)
2673                 cmd_pos->done = true;
2674 }
2675
2676 static inline void bnx2x_mcast_hdl_pending_restore_e2(struct bnx2x *bp,
2677         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2678         int *line_idx)
2679 {
2680         cmd_pos->data.next_bin = o->hdl_restore(bp, o, cmd_pos->data.next_bin,
2681                                                 line_idx);
2682
2683         if (cmd_pos->data.next_bin < 0)
2684                 /* If o->set_restore returned -1 we are done */
2685                 cmd_pos->done = true;
2686         else
2687                 /* Start from the next bin next time */
2688                 cmd_pos->data.next_bin++;
2689 }
2690
2691 static inline int bnx2x_mcast_handle_pending_cmds_e2(struct bnx2x *bp,
2692                                 struct bnx2x_mcast_ramrod_params *p)
2693 {
2694         struct bnx2x_pending_mcast_cmd *cmd_pos, *cmd_pos_n;
2695         int cnt = 0;
2696         struct bnx2x_mcast_obj *o = p->mcast_obj;
2697
2698         list_for_each_entry_safe(cmd_pos, cmd_pos_n, &o->pending_cmds_head,
2699                                  link) {
2700                 switch (cmd_pos->type) {
2701                 case BNX2X_MCAST_CMD_ADD:
2702                         bnx2x_mcast_hdl_pending_add_e2(bp, o, cmd_pos, &cnt);
2703                         break;
2704
2705                 case BNX2X_MCAST_CMD_DEL:
2706                         bnx2x_mcast_hdl_pending_del_e2(bp, o, cmd_pos, &cnt);
2707                         break;
2708
2709                 case BNX2X_MCAST_CMD_RESTORE:
2710                         bnx2x_mcast_hdl_pending_restore_e2(bp, o, cmd_pos,
2711                                                            &cnt);
2712                         break;
2713
2714                 default:
2715                         BNX2X_ERR("Unknown command: %d\n", cmd_pos->type);
2716                         return -EINVAL;
2717                 }
2718
2719                 /* If the command has been completed - remove it from the list
2720                  * and free the memory
2721                  */
2722                 if (cmd_pos->done) {
2723                         list_del(&cmd_pos->link);
2724                         kfree(cmd_pos);
2725                 }
2726
2727                 /* Break if we reached the maximum number of rules */
2728                 if (cnt >= o->max_cmd_len)
2729                         break;
2730         }
2731
2732         return cnt;
2733 }
2734
2735 static inline void bnx2x_mcast_hdl_add(struct bnx2x *bp,
2736         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
2737         int *line_idx)
2738 {
2739         struct bnx2x_mcast_list_elem *mlist_pos;
2740         union bnx2x_mcast_config_data cfg_data = {NULL};
2741         int cnt = *line_idx;
2742
2743         list_for_each_entry(mlist_pos, &p->mcast_list, link) {
2744                 cfg_data.mac = mlist_pos->mac;
2745                 o->set_one_rule(bp, o, cnt, &cfg_data, BNX2X_MCAST_CMD_ADD);
2746
2747                 cnt++;
2748
2749                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n",
2750                    mlist_pos->mac);
2751         }
2752
2753         *line_idx = cnt;
2754 }
2755
2756 static inline void bnx2x_mcast_hdl_del(struct bnx2x *bp,
2757         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
2758         int *line_idx)
2759 {
2760         int cnt = *line_idx, i;
2761
2762         for (i = 0; i < p->mcast_list_len; i++) {
2763                 o->set_one_rule(bp, o, cnt, NULL, BNX2X_MCAST_CMD_DEL);
2764
2765                 cnt++;
2766
2767                 DP(BNX2X_MSG_SP, "Deleting MAC. %d left\n",
2768                                  p->mcast_list_len - i - 1);
2769         }
2770
2771         *line_idx = cnt;
2772 }
2773
2774 /**
2775  * bnx2x_mcast_handle_current_cmd -
2776  *
2777  * @bp:         device handle
2778  * @p:
2779  * @cmd:
2780  * @start_cnt:  first line in the ramrod data that may be used
2781  *
2782  * This function is called iff there is enough place for the current command in
2783  * the ramrod data.
2784  * Returns number of lines filled in the ramrod data in total.
2785  */
2786 static inline int bnx2x_mcast_handle_current_cmd(struct bnx2x *bp,
2787                         struct bnx2x_mcast_ramrod_params *p,
2788                         enum bnx2x_mcast_cmd cmd,
2789                         int start_cnt)
2790 {
2791         struct bnx2x_mcast_obj *o = p->mcast_obj;
2792         int cnt = start_cnt;
2793
2794         DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len);
2795
2796         switch (cmd) {
2797         case BNX2X_MCAST_CMD_ADD:
2798                 bnx2x_mcast_hdl_add(bp, o, p, &cnt);
2799                 break;
2800
2801         case BNX2X_MCAST_CMD_DEL:
2802                 bnx2x_mcast_hdl_del(bp, o, p, &cnt);
2803                 break;
2804
2805         case BNX2X_MCAST_CMD_RESTORE:
2806                 o->hdl_restore(bp, o, 0, &cnt);
2807                 break;
2808
2809         default:
2810                 BNX2X_ERR("Unknown command: %d\n", cmd);
2811                 return -EINVAL;
2812         }
2813
2814         /* The current command has been handled */
2815         p->mcast_list_len = 0;
2816
2817         return cnt;
2818 }
2819
2820 static int bnx2x_mcast_validate_e2(struct bnx2x *bp,
2821                                    struct bnx2x_mcast_ramrod_params *p,
2822                                    enum bnx2x_mcast_cmd cmd)
2823 {
2824         struct bnx2x_mcast_obj *o = p->mcast_obj;
2825         int reg_sz = o->get_registry_size(o);
2826
2827         switch (cmd) {
2828         /* DEL command deletes all currently configured MACs */
2829         case BNX2X_MCAST_CMD_DEL:
2830                 o->set_registry_size(o, 0);
2831                 /* Don't break */
2832
2833         /* RESTORE command will restore the entire multicast configuration */
2834         case BNX2X_MCAST_CMD_RESTORE:
2835                 /* Here we set the approximate amount of work to do, which in
2836                  * fact may be only less as some MACs in postponed ADD
2837                  * command(s) scheduled before this command may fall into
2838                  * the same bin and the actual number of bins set in the
2839                  * registry would be less than we estimated here. See
2840                  * bnx2x_mcast_set_one_rule_e2() for further details.
2841                  */
2842                 p->mcast_list_len = reg_sz;
2843                 break;
2844
2845         case BNX2X_MCAST_CMD_ADD:
2846         case BNX2X_MCAST_CMD_CONT:
2847                 /* Here we assume that all new MACs will fall into new bins.
2848                  * However we will correct the real registry size after we
2849                  * handle all pending commands.
2850                  */
2851                 o->set_registry_size(o, reg_sz + p->mcast_list_len);
2852                 break;
2853
2854         default:
2855                 BNX2X_ERR("Unknown command: %d\n", cmd);
2856                 return -EINVAL;
2857         }
2858
2859         /* Increase the total number of MACs pending to be configured */
2860         o->total_pending_num += p->mcast_list_len;
2861
2862         return 0;
2863 }
2864
2865 static void bnx2x_mcast_revert_e2(struct bnx2x *bp,
2866                                       struct bnx2x_mcast_ramrod_params *p,
2867                                       int old_num_bins)
2868 {
2869         struct bnx2x_mcast_obj *o = p->mcast_obj;
2870
2871         o->set_registry_size(o, old_num_bins);
2872         o->total_pending_num -= p->mcast_list_len;
2873 }
2874
2875 /**
2876  * bnx2x_mcast_set_rdata_hdr_e2 - sets a header values
2877  *
2878  * @bp:         device handle
2879  * @p:
2880  * @len:        number of rules to handle
2881  */
2882 static inline void bnx2x_mcast_set_rdata_hdr_e2(struct bnx2x *bp,
2883                                         struct bnx2x_mcast_ramrod_params *p,
2884                                         uint8_t len)
2885 {
2886         struct bnx2x_raw_obj *r = &p->mcast_obj->raw;
2887         struct eth_multicast_rules_ramrod_data *data =
2888                 (struct eth_multicast_rules_ramrod_data *)(r->rdata);
2889
2890         data->header.echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) |
2891                                         (BNX2X_FILTER_MCAST_PENDING <<
2892                                          BNX2X_SWCID_SHIFT));
2893         data->header.rule_cnt = len;
2894 }
2895
2896 /**
2897  * bnx2x_mcast_refresh_registry_e2 - recalculate the actual number of set bins
2898  *
2899  * @bp:         device handle
2900  * @o:
2901  *
2902  * Recalculate the actual number of set bins in the registry using Brian
2903  * Kernighan's algorithm: it's execution complexity is as a number of set bins.
2904  *
2905  * returns 0 for the compliance with bnx2x_mcast_refresh_registry_e1().
2906  */
2907 static inline int bnx2x_mcast_refresh_registry_e2(struct bnx2x *bp,
2908                                                   struct bnx2x_mcast_obj *o)
2909 {
2910         int i, cnt = 0;
2911         uint64_t elem;
2912
2913         for (i = 0; i < BNX2X_MCAST_VEC_SZ; i++) {
2914                 elem = o->registry.aprox_match.vec[i];
2915                 for (; elem; cnt++)
2916                         elem &= elem - 1;
2917         }
2918
2919         o->set_registry_size(o, cnt);
2920
2921         return 0;
2922 }
2923
2924 static int bnx2x_mcast_setup_e2(struct bnx2x *bp,
2925                                 struct bnx2x_mcast_ramrod_params *p,
2926                                 enum bnx2x_mcast_cmd cmd)
2927 {
2928         struct bnx2x_raw_obj *raw = &p->mcast_obj->raw;
2929         struct bnx2x_mcast_obj *o = p->mcast_obj;
2930         struct eth_multicast_rules_ramrod_data *data =
2931                 (struct eth_multicast_rules_ramrod_data *)(raw->rdata);
2932         int cnt = 0, rc;
2933
2934         /* Reset the ramrod data buffer */
2935         memset(data, 0, sizeof(*data));
2936
2937         cnt = bnx2x_mcast_handle_pending_cmds_e2(bp, p);
2938
2939         /* If there are no more pending commands - clear SCHEDULED state */
2940         if (list_empty(&o->pending_cmds_head))
2941                 o->clear_sched(o);
2942
2943         /* The below may be true iff there was enough room in ramrod
2944          * data for all pending commands and for the current
2945          * command. Otherwise the current command would have been added
2946          * to the pending commands and p->mcast_list_len would have been
2947          * zeroed.
2948          */
2949         if (p->mcast_list_len > 0)
2950                 cnt = bnx2x_mcast_handle_current_cmd(bp, p, cmd, cnt);
2951
2952         /* We've pulled out some MACs - update the total number of
2953          * outstanding.
2954          */
2955         o->total_pending_num -= cnt;
2956
2957         /* send a ramrod */
2958         WARN_ON(o->total_pending_num < 0);
2959         WARN_ON(cnt > o->max_cmd_len);
2960
2961         bnx2x_mcast_set_rdata_hdr_e2(bp, p, (uint8_t)cnt);
2962
2963         /* Update a registry size if there are no more pending operations.
2964          *
2965          * We don't want to change the value of the registry size if there are
2966          * pending operations because we want it to always be equal to the
2967          * exact or the approximate number (see bnx2x_mcast_validate_e2()) of
2968          * set bins after the last requested operation in order to properly
2969          * evaluate the size of the next DEL/RESTORE operation.
2970          *
2971          * Note that we update the registry itself during command(s) handling
2972          * - see bnx2x_mcast_set_one_rule_e2(). That's because for 57712 we
2973          * aggregate multiple commands (ADD/DEL/RESTORE) into one ramrod but
2974          * with a limited amount of update commands (per MAC/bin) and we don't
2975          * know in this scope what the actual state of bins configuration is
2976          * going to be after this ramrod.
2977          */
2978         if (!o->total_pending_num)
2979                 bnx2x_mcast_refresh_registry_e2(bp, o);
2980
2981         /* If CLEAR_ONLY was requested - don't send a ramrod and clear
2982          * RAMROD_PENDING status immediately.
2983          */
2984         if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) {
2985                 raw->clear_pending(raw);
2986                 return 0;
2987         } else {
2988                 /* No need for an explicit memory barrier here as long as we
2989                  * ensure the ordering of writing to the SPQ element
2990                  * and updating of the SPQ producer which involves a memory
2991                  * read. If the memory read is removed we will have to put a
2992                  * full memory barrier there (inside bnx2x_sp_post()).
2993                  */
2994
2995                 /* Send a ramrod */
2996                 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_MULTICAST_RULES,
2997                                    raw->cid, U64_HI(raw->rdata_mapping),
2998                                    U64_LO(raw->rdata_mapping),
2999                                    ETH_CONNECTION_TYPE);
3000                 if (rc)
3001                         return rc;
3002
3003                 /* Ramrod completion is pending */
3004                 return 1;
3005         }
3006 }
3007
3008 static int bnx2x_mcast_validate_e1h(struct bnx2x *bp,
3009                                     struct bnx2x_mcast_ramrod_params *p,
3010                                     enum bnx2x_mcast_cmd cmd)
3011 {
3012         /* Mark, that there is a work to do */
3013         if ((cmd == BNX2X_MCAST_CMD_DEL) || (cmd == BNX2X_MCAST_CMD_RESTORE))
3014                 p->mcast_list_len = 1;
3015
3016         return 0;
3017 }
3018
3019 static void bnx2x_mcast_revert_e1h(struct bnx2x *bp,
3020                                        struct bnx2x_mcast_ramrod_params *p,
3021                                        int old_num_bins)
3022 {
3023         /* Do nothing */
3024 }
3025
3026 #define BNX2X_57711_SET_MC_FILTER(filter, bit) \
3027 do { \
3028         (filter)[(bit) >> 5] |= (1 << ((bit) & 0x1f)); \
3029 } while (0)
3030
3031 static inline void bnx2x_mcast_hdl_add_e1h(struct bnx2x *bp,
3032                                            struct bnx2x_mcast_obj *o,
3033                                            struct bnx2x_mcast_ramrod_params *p,
3034                                            uint32_t *mc_filter)
3035 {
3036         struct bnx2x_mcast_list_elem *mlist_pos;
3037         int bit;
3038
3039         list_for_each_entry(mlist_pos, &p->mcast_list, link) {
3040                 bit = bnx2x_mcast_bin_from_mac(mlist_pos->mac);
3041                 BNX2X_57711_SET_MC_FILTER(mc_filter, bit);
3042
3043                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC, bin %d\n",
3044                    mlist_pos->mac, bit);
3045
3046                 /* bookkeeping... */
3047                 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec,
3048                                   bit);
3049         }
3050 }
3051
3052 static inline void bnx2x_mcast_hdl_restore_e1h(struct bnx2x *bp,
3053         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
3054         uint32_t *mc_filter)
3055 {
3056         int bit;
3057
3058         for (bit = bnx2x_mcast_get_next_bin(o, 0);
3059              bit >= 0;
3060              bit = bnx2x_mcast_get_next_bin(o, bit + 1)) {
3061                 BNX2X_57711_SET_MC_FILTER(mc_filter, bit);
3062                 DP(BNX2X_MSG_SP, "About to set bin %d\n", bit);
3063         }
3064 }
3065
3066 /* On 57711 we write the multicast MACs' approximate match
3067  * table by directly into the TSTORM's internal RAM. So we don't
3068  * really need to handle any tricks to make it work.
3069  */
3070 static int bnx2x_mcast_setup_e1h(struct bnx2x *bp,
3071                                  struct bnx2x_mcast_ramrod_params *p,
3072                                  enum bnx2x_mcast_cmd cmd)
3073 {
3074         int i;
3075         struct bnx2x_mcast_obj *o = p->mcast_obj;
3076         struct bnx2x_raw_obj *r = &o->raw;
3077
3078         /* If CLEAR_ONLY has been requested - clear the registry
3079          * and clear a pending bit.
3080          */
3081         if (!test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) {
3082                 uint32_t mc_filter[MC_HASH_SIZE] = {0};
3083
3084                 /* Set the multicast filter bits before writing it into
3085                  * the internal memory.
3086                  */
3087                 switch (cmd) {
3088                 case BNX2X_MCAST_CMD_ADD:
3089                         bnx2x_mcast_hdl_add_e1h(bp, o, p, mc_filter);
3090                         break;
3091
3092                 case BNX2X_MCAST_CMD_DEL:
3093                         DP(BNX2X_MSG_SP,
3094                            "Invalidating multicast MACs configuration\n");
3095
3096                         /* clear the registry */
3097                         memset(o->registry.aprox_match.vec, 0,
3098                                sizeof(o->registry.aprox_match.vec));
3099                         break;
3100
3101                 case BNX2X_MCAST_CMD_RESTORE:
3102                         bnx2x_mcast_hdl_restore_e1h(bp, o, p, mc_filter);
3103                         break;
3104
3105                 default:
3106                         BNX2X_ERR("Unknown command: %d\n", cmd);
3107                         return -EINVAL;
3108                 }
3109
3110                 /* Set the mcast filter in the internal memory */
3111                 for (i = 0; i < MC_HASH_SIZE; i++)
3112                         REG_WR(bp, MC_HASH_OFFSET(bp, i), mc_filter[i]);
3113         } else
3114                 /* clear the registry */
3115                 memset(o->registry.aprox_match.vec, 0,
3116                        sizeof(o->registry.aprox_match.vec));
3117
3118         /* We are done */
3119         r->clear_pending(r);
3120
3121         return 0;
3122 }
3123
3124 static int bnx2x_mcast_validate_e1(struct bnx2x *bp,
3125                                    struct bnx2x_mcast_ramrod_params *p,
3126                                    enum bnx2x_mcast_cmd cmd)
3127 {
3128         struct bnx2x_mcast_obj *o = p->mcast_obj;
3129         int reg_sz = o->get_registry_size(o);
3130
3131         switch (cmd) {
3132         /* DEL command deletes all currently configured MACs */
3133         case BNX2X_MCAST_CMD_DEL:
3134                 o->set_registry_size(o, 0);
3135                 /* Don't break */
3136
3137         /* RESTORE command will restore the entire multicast configuration */
3138         case BNX2X_MCAST_CMD_RESTORE:
3139                 p->mcast_list_len = reg_sz;
3140                   DP(BNX2X_MSG_SP, "Command %d, p->mcast_list_len=%d\n",
3141                                    cmd, p->mcast_list_len);
3142                 break;
3143
3144         case BNX2X_MCAST_CMD_ADD:
3145         case BNX2X_MCAST_CMD_CONT:
3146                 /* Multicast MACs on 57710 are configured as unicast MACs and
3147                  * there is only a limited number of CAM entries for that
3148                  * matter.
3149                  */
3150                 if (p->mcast_list_len > o->max_cmd_len) {
3151                         BNX2X_ERR("Can't configure more than %d multicast MACs on 57710\n",
3152                                   o->max_cmd_len);
3153                         return -EINVAL;
3154                 }
3155                 /* Every configured MAC should be cleared if DEL command is
3156                  * called. Only the last ADD command is relevant as long as
3157                  * every ADD commands overrides the previous configuration.
3158                  */
3159                 DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len);
3160                 if (p->mcast_list_len > 0)
3161                         o->set_registry_size(o, p->mcast_list_len);
3162
3163                 break;
3164
3165         default:
3166                 BNX2X_ERR("Unknown command: %d\n", cmd);
3167                 return -EINVAL;
3168         }
3169
3170         /* We want to ensure that commands are executed one by one for 57710.
3171          * Therefore each none-empty command will consume o->max_cmd_len.
3172          */
3173         if (p->mcast_list_len)
3174                 o->total_pending_num += o->max_cmd_len;
3175
3176         return 0;
3177 }
3178
3179 static void bnx2x_mcast_revert_e1(struct bnx2x *bp,
3180                                       struct bnx2x_mcast_ramrod_params *p,
3181                                       int old_num_macs)
3182 {
3183         struct bnx2x_mcast_obj *o = p->mcast_obj;
3184
3185         o->set_registry_size(o, old_num_macs);
3186
3187         /* If current command hasn't been handled yet and we are
3188          * here means that it's meant to be dropped and we have to
3189          * update the number of outstanding MACs accordingly.
3190          */
3191         if (p->mcast_list_len)
3192                 o->total_pending_num -= o->max_cmd_len;
3193 }
3194
3195 static void bnx2x_mcast_set_one_rule_e1(struct bnx2x *bp,
3196                                         struct bnx2x_mcast_obj *o, int idx,
3197                                         union bnx2x_mcast_config_data *cfg_data,
3198                                         enum bnx2x_mcast_cmd cmd)
3199 {
3200         struct bnx2x_raw_obj *r = &o->raw;
3201         struct mac_configuration_cmd *data =
3202                 (struct mac_configuration_cmd *)(r->rdata);
3203
3204         /* copy mac */
3205         if ((cmd == BNX2X_MCAST_CMD_ADD) || (cmd == BNX2X_MCAST_CMD_RESTORE)) {
3206                 bnx2x_set_fw_mac_addr(&data->config_table[idx].msb_mac_addr,
3207                                       &data->config_table[idx].middle_mac_addr,
3208                                       &data->config_table[idx].lsb_mac_addr,
3209                                       cfg_data->mac);
3210
3211                 data->config_table[idx].vlan_id = 0;
3212                 data->config_table[idx].pf_id = r->func_id;
3213                 data->config_table[idx].clients_bit_vector =
3214                         cpu_to_le32(1 << r->cl_id);
3215
3216                 SET_FLAG(data->config_table[idx].flags,
3217                          MAC_CONFIGURATION_ENTRY_ACTION_TYPE,
3218                          T_ETH_MAC_COMMAND_SET);
3219         }
3220 }
3221
3222 /**
3223  * bnx2x_mcast_set_rdata_hdr_e1  - set header values in mac_configuration_cmd
3224  *
3225  * @bp:         device handle
3226  * @p:
3227  * @len:        number of rules to handle
3228  */
3229 static inline void bnx2x_mcast_set_rdata_hdr_e1(struct bnx2x *bp,
3230                                         struct bnx2x_mcast_ramrod_params *p,
3231                                         uint8_t len)
3232 {
3233         struct bnx2x_raw_obj *r = &p->mcast_obj->raw;
3234         struct mac_configuration_cmd *data =
3235                 (struct mac_configuration_cmd *)(r->rdata);
3236
3237         uint8_t offset = (CHIP_REV_IS_SLOW(bp) ?
3238                      BNX2X_MAX_EMUL_MULTI*(1 + r->func_id) :
3239                      BNX2X_MAX_MULTICAST*(1 + r->func_id));
3240
3241         data->hdr.offset = offset;
3242         data->hdr.client_id = cpu_to_le16(0xff);
3243         data->hdr.echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) |
3244                                      (BNX2X_FILTER_MCAST_PENDING <<
3245                                       BNX2X_SWCID_SHIFT));
3246         data->hdr.length = len;
3247 }
3248
3249 /**
3250  * bnx2x_mcast_handle_restore_cmd_e1 - restore command for 57710
3251  *
3252  * @bp:         device handle
3253  * @o:
3254  * @start_idx:  index in the registry to start from
3255  * @rdata_idx:  index in the ramrod data to start from
3256  *
3257  * restore command for 57710 is like all other commands - always a stand alone
3258  * command - start_idx and rdata_idx will always be 0. This function will always
3259  * succeed.
3260  * returns -1 to comply with 57712 variant.
3261  */
3262 static inline int bnx2x_mcast_handle_restore_cmd_e1(
3263         struct bnx2x *bp, struct bnx2x_mcast_obj *o , int start_idx,
3264         int *rdata_idx)
3265 {
3266         struct bnx2x_mcast_mac_elem *elem;
3267         int i = 0;
3268         union bnx2x_mcast_config_data cfg_data = {NULL};
3269
3270         /* go through the registry and configure the MACs from it. */
3271         list_for_each_entry(elem, &o->registry.exact_match.macs, link) {
3272                 cfg_data.mac = &elem->mac[0];
3273                 o->set_one_rule(bp, o, i, &cfg_data, BNX2X_MCAST_CMD_RESTORE);
3274
3275                 i++;
3276
3277                   DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n",
3278                      cfg_data.mac);
3279         }
3280
3281         *rdata_idx = i;
3282
3283         return -1;
3284 }
3285
3286 static inline int bnx2x_mcast_handle_pending_cmds_e1(
3287         struct bnx2x *bp, struct bnx2x_mcast_ramrod_params *p)
3288 {
3289         struct bnx2x_pending_mcast_cmd *cmd_pos;
3290         struct bnx2x_mcast_mac_elem *pmac_pos;
3291         struct bnx2x_mcast_obj *o = p->mcast_obj;
3292         union bnx2x_mcast_config_data cfg_data = {NULL};
3293         int cnt = 0;
3294
3295         /* If nothing to be done - return */
3296         if (list_empty(&o->pending_cmds_head))
3297                 return 0;
3298
3299         /* Handle the first command */
3300         cmd_pos = list_first_entry(&o->pending_cmds_head,
3301                                    struct bnx2x_pending_mcast_cmd, link);
3302
3303         switch (cmd_pos->type) {
3304         case BNX2X_MCAST_CMD_ADD:
3305                 list_for_each_entry(pmac_pos, &cmd_pos->data.macs_head, link) {
3306                         cfg_data.mac = &pmac_pos->mac[0];
3307                         o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type);
3308
3309                         cnt++;
3310
3311                         DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n",
3312                            pmac_pos->mac);
3313                 }
3314                 break;
3315
3316         case BNX2X_MCAST_CMD_DEL:
3317                 cnt = cmd_pos->data.macs_num;
3318                 DP(BNX2X_MSG_SP, "About to delete %d multicast MACs\n", cnt);
3319                 break;
3320
3321         case BNX2X_MCAST_CMD_RESTORE:
3322                 o->hdl_restore(bp, o, 0, &cnt);
3323                 break;
3324
3325         default:
3326                 BNX2X_ERR("Unknown command: %d\n", cmd_pos->type);
3327                 return -EINVAL;
3328         }
3329
3330         list_del(&cmd_pos->link);
3331         kfree(cmd_pos);
3332
3333         return cnt;
3334 }
3335
3336 /**
3337  * bnx2x_get_fw_mac_addr - revert the bnx2x_set_fw_mac_addr().
3338  *
3339  * @fw_hi:
3340  * @fw_mid:
3341  * @fw_lo:
3342  * @mac:
3343  */
3344 static inline void bnx2x_get_fw_mac_addr(__le16 *fw_hi, __le16 *fw_mid,
3345                                          __le16 *fw_lo, uint8_t *mac)
3346 {
3347         mac[1] = ((uint8_t *)fw_hi)[0];
3348         mac[0] = ((uint8_t *)fw_hi)[1];
3349         mac[3] = ((uint8_t *)fw_mid)[0];
3350         mac[2] = ((uint8_t *)fw_mid)[1];
3351         mac[5] = ((uint8_t *)fw_lo)[0];
3352         mac[4] = ((uint8_t *)fw_lo)[1];
3353 }
3354
3355 /**
3356  * bnx2x_mcast_refresh_registry_e1 -
3357  *
3358  * @bp:         device handle
3359  * @cnt:
3360  *
3361  * Check the ramrod data first entry flag to see if it's a DELETE or ADD command
3362  * and update the registry correspondingly: if ADD - allocate a memory and add
3363  * the entries to the registry (list), if DELETE - clear the registry and free
3364  * the memory.
3365  */
3366 static inline int bnx2x_mcast_refresh_registry_e1(struct bnx2x *bp,
3367                                                   struct bnx2x_mcast_obj *o)
3368 {
3369         struct bnx2x_raw_obj *raw = &o->raw;
3370         struct bnx2x_mcast_mac_elem *elem;
3371         struct mac_configuration_cmd *data =
3372                         (struct mac_configuration_cmd *)(raw->rdata);
3373
3374         /* If first entry contains a SET bit - the command was ADD,
3375          * otherwise - DEL_ALL
3376          */
3377         if (GET_FLAG(data->config_table[0].flags,
3378                         MAC_CONFIGURATION_ENTRY_ACTION_TYPE)) {
3379                 int i, len = data->hdr.length;
3380
3381                 /* Break if it was a RESTORE command */
3382                 if (!list_empty(&o->registry.exact_match.macs))
3383                         return 0;
3384
3385                 elem = kzmalloc((len) * (sizeof(*elem)), 0);
3386                 if (!elem) {
3387                         BNX2X_ERR("Failed to allocate registry memory\n");
3388                         return -ENOMEM;
3389                 }
3390
3391                 for (i = 0; i < len; i++, elem++) {
3392                         bnx2x_get_fw_mac_addr(
3393                                 &data->config_table[i].msb_mac_addr,
3394                                 &data->config_table[i].middle_mac_addr,
3395                                 &data->config_table[i].lsb_mac_addr,
3396                                 elem->mac);
3397                         DP(BNX2X_MSG_SP, "Adding registry entry for [%pM]\n",
3398                            elem->mac);
3399                         list_add_tail(&elem->link,
3400                                       &o->registry.exact_match.macs);
3401                 }
3402         } else {
3403                 elem = list_first_entry(&o->registry.exact_match.macs,
3404                                         struct bnx2x_mcast_mac_elem, link);
3405                 DP(BNX2X_MSG_SP, "Deleting a registry\n");
3406                 kfree(elem);
3407                 INIT_LIST_HEAD(&o->registry.exact_match.macs);
3408         }
3409
3410         return 0;
3411 }
3412
3413 static int bnx2x_mcast_setup_e1(struct bnx2x *bp,
3414                                 struct bnx2x_mcast_ramrod_params *p,
3415                                 enum bnx2x_mcast_cmd cmd)
3416 {
3417         struct bnx2x_mcast_obj *o = p->mcast_obj;
3418         struct bnx2x_raw_obj *raw = &o->raw;
3419         struct mac_configuration_cmd *data =
3420                 (struct mac_configuration_cmd *)(raw->rdata);
3421         int cnt = 0, i, rc;
3422
3423         /* Reset the ramrod data buffer */
3424         memset(data, 0, sizeof(*data));
3425
3426         /* First set all entries as invalid */
3427         for (i = 0; i < o->max_cmd_len ; i++)
3428                 SET_FLAG(data->config_table[i].flags,
3429                          MAC_CONFIGURATION_ENTRY_ACTION_TYPE,
3430                          T_ETH_MAC_COMMAND_INVALIDATE);
3431
3432         /* Handle pending commands first */
3433         cnt = bnx2x_mcast_handle_pending_cmds_e1(bp, p);
3434
3435         /* If there are no more pending commands - clear SCHEDULED state */
3436         if (list_empty(&o->pending_cmds_head))
3437                 o->clear_sched(o);
3438
3439         /* The below may be true iff there were no pending commands */
3440         if (!cnt)
3441                 cnt = bnx2x_mcast_handle_current_cmd(bp, p, cmd, 0);
3442
3443         /* For 57710 every command has o->max_cmd_len length to ensure that
3444          * commands are done one at a time.
3445          */
3446         o->total_pending_num -= o->max_cmd_len;
3447
3448         /* send a ramrod */
3449
3450         WARN_ON(cnt > o->max_cmd_len);
3451
3452         /* Set ramrod header (in particular, a number of entries to update) */
3453         bnx2x_mcast_set_rdata_hdr_e1(bp, p, (uint8_t)cnt);
3454
3455         /* update a registry: we need the registry contents to be always up
3456          * to date in order to be able to execute a RESTORE opcode. Here
3457          * we use the fact that for 57710 we sent one command at a time
3458          * hence we may take the registry update out of the command handling
3459          * and do it in a simpler way here.
3460          */
3461         rc = bnx2x_mcast_refresh_registry_e1(bp, o);
3462         if (rc)
3463                 return rc;
3464
3465         /* If CLEAR_ONLY was requested - don't send a ramrod and clear
3466          * RAMROD_PENDING status immediately.
3467          */
3468         if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) {
3469                 raw->clear_pending(raw);
3470                 return 0;
3471         } else {
3472                 /* No need for an explicit memory barrier here as long as we
3473                  * ensure the ordering of writing to the SPQ element
3474                  * and updating of the SPQ producer which involves a memory
3475                  * read. If the memory read is removed we will have to put a
3476                  * full memory barrier there (inside bnx2x_sp_post()).
3477                  */
3478
3479                 /* Send a ramrod */
3480                 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, raw->cid,
3481                                    U64_HI(raw->rdata_mapping),
3482                                    U64_LO(raw->rdata_mapping),
3483                                    ETH_CONNECTION_TYPE);
3484                 if (rc)
3485                         return rc;
3486
3487                 /* Ramrod completion is pending */
3488                 return 1;
3489         }
3490 }
3491
3492 static int bnx2x_mcast_get_registry_size_exact(struct bnx2x_mcast_obj *o)
3493 {
3494         return o->registry.exact_match.num_macs_set;
3495 }
3496
3497 static int bnx2x_mcast_get_registry_size_aprox(struct bnx2x_mcast_obj *o)
3498 {
3499         return o->registry.aprox_match.num_bins_set;
3500 }
3501
3502 static void bnx2x_mcast_set_registry_size_exact(struct bnx2x_mcast_obj *o,
3503                                                 int n)
3504 {
3505         o->registry.exact_match.num_macs_set = n;
3506 }
3507
3508 static void bnx2x_mcast_set_registry_size_aprox(struct bnx2x_mcast_obj *o,
3509                                                 int n)
3510 {
3511         o->registry.aprox_match.num_bins_set = n;
3512 }
3513
3514 int bnx2x_config_mcast(struct bnx2x *bp,
3515                        struct bnx2x_mcast_ramrod_params *p,
3516                        enum bnx2x_mcast_cmd cmd)
3517 {
3518         struct bnx2x_mcast_obj *o = p->mcast_obj;
3519         struct bnx2x_raw_obj *r = &o->raw;
3520         int rc = 0, old_reg_size;
3521
3522         /* This is needed to recover number of currently configured mcast macs
3523          * in case of failure.
3524          */
3525         old_reg_size = o->get_registry_size(o);
3526
3527         /* Do some calculations and checks */
3528         rc = o->validate(bp, p, cmd);
3529         if (rc)
3530                 return rc;
3531
3532         /* Return if there is no work to do */
3533         if ((!p->mcast_list_len) && (!o->check_sched(o)))
3534                 return 0;
3535
3536         DP(BNX2X_MSG_SP, "o->total_pending_num=%d p->mcast_list_len=%d o->max_cmd_len=%d\n",
3537            o->total_pending_num, p->mcast_list_len, o->max_cmd_len);
3538
3539         /* Enqueue the current command to the pending list if we can't complete
3540          * it in the current iteration
3541          */
3542         if (r->check_pending(r) ||
3543             ((o->max_cmd_len > 0) && (o->total_pending_num > o->max_cmd_len))) {
3544                 rc = o->enqueue_cmd(bp, p->mcast_obj, p, cmd);
3545                 if (rc < 0)
3546                         goto error_exit1;
3547
3548                 /* As long as the current command is in a command list we
3549                  * don't need to handle it separately.
3550                  */
3551                 p->mcast_list_len = 0;
3552         }
3553
3554         if (!r->check_pending(r)) {
3555
3556                 /* Set 'pending' state */
3557                 r->set_pending(r);
3558
3559                 /* Configure the new classification in the chip */
3560                 rc = o->config_mcast(bp, p, cmd);
3561                 if (rc < 0)
3562                         goto error_exit2;
3563
3564                 /* Wait for a ramrod completion if was requested */
3565                 if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags))
3566                         rc = o->wait_comp(bp, o);
3567         }
3568
3569         return rc;
3570
3571 error_exit2:
3572         r->clear_pending(r);
3573
3574 error_exit1:
3575         o->revert(bp, p, old_reg_size);
3576
3577         return rc;
3578 }
3579
3580 static void bnx2x_mcast_clear_sched(struct bnx2x_mcast_obj *o)
3581 {
3582         cmb();
3583         clear_bit(o->sched_state, o->raw.pstate);
3584         cmb();
3585 }
3586
3587 static void bnx2x_mcast_set_sched(struct bnx2x_mcast_obj *o)
3588 {
3589         cmb();
3590         set_bit(o->sched_state, o->raw.pstate);
3591         cmb();
3592 }
3593
3594 static bool bnx2x_mcast_check_sched(struct bnx2x_mcast_obj *o)
3595 {
3596         return !!test_bit(o->sched_state, o->raw.pstate);
3597 }
3598
3599 static bool bnx2x_mcast_check_pending(struct bnx2x_mcast_obj *o)
3600 {
3601         return o->raw.check_pending(&o->raw) || o->check_sched(o);
3602 }
3603
3604 void bnx2x_init_mcast_obj(struct bnx2x *bp,
3605                           struct bnx2x_mcast_obj *mcast_obj,
3606                           uint8_t mcast_cl_id, uint32_t mcast_cid,
3607                           uint8_t func_id,
3608                           uint8_t engine_id, void *rdata,
3609                           dma_addr_t rdata_mapping,
3610                           int state, unsigned long *pstate, bnx2x_obj_type type)
3611 {
3612         memset(mcast_obj, 0, sizeof(*mcast_obj));
3613
3614         bnx2x_init_raw_obj(&mcast_obj->raw, mcast_cl_id, mcast_cid, func_id,
3615                            rdata, rdata_mapping, state, pstate, type);
3616
3617         mcast_obj->engine_id = engine_id;
3618
3619         INIT_LIST_HEAD(&mcast_obj->pending_cmds_head);
3620
3621         mcast_obj->sched_state = BNX2X_FILTER_MCAST_SCHED;
3622         mcast_obj->check_sched = bnx2x_mcast_check_sched;
3623         mcast_obj->set_sched = bnx2x_mcast_set_sched;
3624         mcast_obj->clear_sched = bnx2x_mcast_clear_sched;
3625
3626         if (CHIP_IS_E1(bp)) {
3627                 mcast_obj->config_mcast      = bnx2x_mcast_setup_e1;
3628                 mcast_obj->enqueue_cmd       = bnx2x_mcast_enqueue_cmd;
3629                 mcast_obj->hdl_restore       =
3630                         bnx2x_mcast_handle_restore_cmd_e1;
3631                 mcast_obj->check_pending     = bnx2x_mcast_check_pending;
3632
3633                 if (CHIP_REV_IS_SLOW(bp))
3634                         mcast_obj->max_cmd_len = BNX2X_MAX_EMUL_MULTI;
3635                 else
3636                         mcast_obj->max_cmd_len = BNX2X_MAX_MULTICAST;
3637
3638                 mcast_obj->wait_comp         = bnx2x_mcast_wait;
3639                 mcast_obj->set_one_rule      = bnx2x_mcast_set_one_rule_e1;
3640                 mcast_obj->validate          = bnx2x_mcast_validate_e1;
3641                 mcast_obj->revert            = bnx2x_mcast_revert_e1;
3642                 mcast_obj->get_registry_size =
3643                         bnx2x_mcast_get_registry_size_exact;
3644                 mcast_obj->set_registry_size =
3645                         bnx2x_mcast_set_registry_size_exact;
3646
3647                 /* 57710 is the only chip that uses the exact match for mcast
3648                  * at the moment.
3649                  */
3650                 INIT_LIST_HEAD(&mcast_obj->registry.exact_match.macs);
3651
3652         } else if (CHIP_IS_E1H(bp)) {
3653                 mcast_obj->config_mcast  = bnx2x_mcast_setup_e1h;
3654                 mcast_obj->enqueue_cmd   = NULL;
3655                 mcast_obj->hdl_restore   = NULL;
3656                 mcast_obj->check_pending = bnx2x_mcast_check_pending;
3657
3658                 /* 57711 doesn't send a ramrod, so it has unlimited credit
3659                  * for one command.
3660                  */
3661                 mcast_obj->max_cmd_len       = -1;
3662                 mcast_obj->wait_comp         = bnx2x_mcast_wait;
3663                 mcast_obj->set_one_rule      = NULL;
3664                 mcast_obj->validate          = bnx2x_mcast_validate_e1h;
3665                 mcast_obj->revert            = bnx2x_mcast_revert_e1h;
3666                 mcast_obj->get_registry_size =
3667                         bnx2x_mcast_get_registry_size_aprox;
3668                 mcast_obj->set_registry_size =
3669                         bnx2x_mcast_set_registry_size_aprox;
3670         } else {
3671                 mcast_obj->config_mcast      = bnx2x_mcast_setup_e2;
3672                 mcast_obj->enqueue_cmd       = bnx2x_mcast_enqueue_cmd;
3673                 mcast_obj->hdl_restore       =
3674                         bnx2x_mcast_handle_restore_cmd_e2;
3675                 mcast_obj->check_pending     = bnx2x_mcast_check_pending;
3676                 /* TODO: There should be a proper HSI define for this number!!!
3677                  */
3678                 mcast_obj->max_cmd_len       = 16;
3679                 mcast_obj->wait_comp         = bnx2x_mcast_wait;
3680                 mcast_obj->set_one_rule      = bnx2x_mcast_set_one_rule_e2;
3681                 mcast_obj->validate          = bnx2x_mcast_validate_e2;
3682                 mcast_obj->revert            = bnx2x_mcast_revert_e2;
3683                 mcast_obj->get_registry_size =
3684                         bnx2x_mcast_get_registry_size_aprox;
3685                 mcast_obj->set_registry_size =
3686                         bnx2x_mcast_set_registry_size_aprox;
3687         }
3688 }
3689
3690 /*************************** Credit handling **********************************/
3691
3692 /**
3693  * atomic_add_ifless - add if the result is less than a given value.
3694  *
3695  * @v:  pointer of type atomic_t
3696  * @a:  the amount to add to v...
3697  * @u:  ...if (v + a) is less than u.
3698  *
3699  * returns true if (v + a) was less than u, and false otherwise.
3700  *
3701  */
3702 static inline bool __atomic_add_ifless(atomic_t *v, int a, int u)
3703 {
3704         int c, old;
3705
3706         c = atomic_read(v);
3707         for (;;) {
3708                 if (unlikely(c + a >= u))
3709                         return false;
3710
3711                 old = atomic_cmpxchg((v), c, c + a);
3712                 if (likely(old == c))
3713                         break;
3714                 c = old;
3715         }