BNX2X: spatch changes for BUG and WARN
[akaros.git] / kern / drivers / net / bnx2x / bnx2x_sp.c
1 /* bnx2x_sp.c: Broadcom Everest network driver.
2  *
3  * Copyright (c) 2011-2013 Broadcom Corporation
4  *
5  * Unless you and Broadcom execute a separate written software license
6  * agreement governing use of this software, this software is licensed to you
7  * under the terms of the GNU General Public License version 2, available
8  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9  *
10  * Notwithstanding the above, under no circumstances may you combine this
11  * software in any way with any other Broadcom software provided under a
12  * license other than the GPL, without Broadcom's express prior written
13  * consent.
14  *
15  * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
16  * Written by: Vladislav Zolotarov
17  *
18  */
19
20 #include "akaros_compat.h"
21
22 #include "bnx2x.h"
23 #include "bnx2x_cmn.h"
24 #include "bnx2x_sp.h"
25
26 #define BNX2X_MAX_EMUL_MULTI            16
27
28 /**** Exe Queue interfaces ****/
29
30 /**
31  * bnx2x_exe_queue_init - init the Exe Queue object
32  *
33  * @o:          pointer to the object
34  * @exe_len:    length
35  * @owner:      pointer to the owner
36  * @validate:   validate function pointer
37  * @optimize:   optimize function pointer
38  * @exec:       execute function pointer
39  * @get:        get function pointer
40  */
41 static inline void bnx2x_exe_queue_init(struct bnx2x *bp,
42                                         struct bnx2x_exe_queue_obj *o,
43                                         int exe_len,
44                                         union bnx2x_qable_obj *owner,
45                                         exe_q_validate validate,
46                                         exe_q_remove remove,
47                                         exe_q_optimize optimize,
48                                         exe_q_execute exec,
49                                         exe_q_get get)
50 {
51         memset(o, 0, sizeof(*o));
52
53         INIT_LIST_HEAD(&o->exe_queue);
54         INIT_LIST_HEAD(&o->pending_comp);
55
56         spinlock_init_irqsave(&o->lock);
57
58         o->exe_chunk_len = exe_len;
59         o->owner         = owner;
60
61         /* Owner specific callbacks */
62         o->validate      = validate;
63         o->remove        = remove;
64         o->optimize      = optimize;
65         o->execute       = exec;
66         o->get           = get;
67
68         DP(BNX2X_MSG_SP, "Setup the execution queue with the chunk length of %d\n",
69            exe_len);
70 }
71
72 static inline void bnx2x_exe_queue_free_elem(struct bnx2x *bp,
73                                              struct bnx2x_exeq_elem *elem)
74 {
75         DP(BNX2X_MSG_SP, "Deleting an exe_queue element\n");
76         kfree(elem);
77 }
78
79 static inline int bnx2x_exe_queue_length(struct bnx2x_exe_queue_obj *o)
80 {
81         struct bnx2x_exeq_elem *elem;
82         int cnt = 0;
83
84         spin_lock(&o->lock);
85
86         list_for_each_entry(elem, &o->exe_queue, link)
87                 cnt++;
88
89         spin_unlock(&o->lock);
90
91         return cnt;
92 }
93
94 /**
95  * bnx2x_exe_queue_add - add a new element to the execution queue
96  *
97  * @bp:         driver handle
98  * @o:          queue
99  * @cmd:        new command to add
100  * @restore:    true - do not optimize the command
101  *
102  * If the element is optimized or is illegal, frees it.
103  */
104 static inline int bnx2x_exe_queue_add(struct bnx2x *bp,
105                                       struct bnx2x_exe_queue_obj *o,
106                                       struct bnx2x_exeq_elem *elem,
107                                       bool restore)
108 {
109         int rc;
110
111         spin_lock(&o->lock);
112
113         if (!restore) {
114                 /* Try to cancel this element queue */
115                 rc = o->optimize(bp, o->owner, elem);
116                 if (rc)
117                         goto free_and_exit;
118
119                 /* Check if this request is ok */
120                 rc = o->validate(bp, o->owner, elem);
121                 if (rc) {
122                         DP(BNX2X_MSG_SP, "Preamble failed: %d\n", rc);
123                         goto free_and_exit;
124                 }
125         }
126
127         /* If so, add it to the execution queue */
128         list_add_tail(&elem->link, &o->exe_queue);
129
130         spin_unlock(&o->lock);
131
132         return 0;
133
134 free_and_exit:
135         bnx2x_exe_queue_free_elem(bp, elem);
136
137         spin_unlock(&o->lock);
138
139         return rc;
140 }
141
142 static inline void __bnx2x_exe_queue_reset_pending(
143         struct bnx2x *bp,
144         struct bnx2x_exe_queue_obj *o)
145 {
146         struct bnx2x_exeq_elem *elem;
147
148         while (!list_empty(&o->pending_comp)) {
149                 elem = list_first_entry(&o->pending_comp,
150                                         struct bnx2x_exeq_elem, link);
151
152                 list_del(&elem->link);
153                 bnx2x_exe_queue_free_elem(bp, elem);
154         }
155 }
156
157 /**
158  * bnx2x_exe_queue_step - execute one execution chunk atomically
159  *
160  * @bp:                 driver handle
161  * @o:                  queue
162  * @ramrod_flags:       flags
163  *
164  * (Should be called while holding the exe_queue->lock).
165  */
166 static inline int bnx2x_exe_queue_step(struct bnx2x *bp,
167                                        struct bnx2x_exe_queue_obj *o,
168                                        unsigned long *ramrod_flags)
169 {
170         struct bnx2x_exeq_elem *elem, spacer;
171         int cur_len = 0, rc;
172
173         memset(&spacer, 0, sizeof(spacer));
174
175         /* Next step should not be performed until the current is finished,
176          * unless a DRV_CLEAR_ONLY bit is set. In this case we just want to
177          * properly clear object internals without sending any command to the FW
178          * which also implies there won't be any completion to clear the
179          * 'pending' list.
180          */
181         if (!list_empty(&o->pending_comp)) {
182                 if (test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags)) {
183                         DP(BNX2X_MSG_SP, "RAMROD_DRV_CLR_ONLY requested: resetting a pending_comp list\n");
184                         __bnx2x_exe_queue_reset_pending(bp, o);
185                 } else {
186                         return 1;
187                 }
188         }
189
190         /* Run through the pending commands list and create a next
191          * execution chunk.
192          */
193         while (!list_empty(&o->exe_queue)) {
194                 elem = list_first_entry(&o->exe_queue, struct bnx2x_exeq_elem,
195                                         link);
196                 warn_on(!elem->cmd_len);
197
198                 if (cur_len + elem->cmd_len <= o->exe_chunk_len) {
199                         cur_len += elem->cmd_len;
200                         /* Prevent from both lists being empty when moving an
201                          * element. This will allow the call of
202                          * bnx2x_exe_queue_empty() without locking.
203                          */
204                         list_add_tail(&spacer.link, &o->pending_comp);
205                         mb();
206                         list_move_tail(&elem->link, &o->pending_comp);
207                         list_del(&spacer.link);
208                 } else
209                         break;
210         }
211
212         /* Sanity check */
213         if (!cur_len)
214                 return 0;
215
216         rc = o->execute(bp, o->owner, &o->pending_comp, ramrod_flags);
217         if (rc < 0)
218                 /* In case of an error return the commands back to the queue
219                  * and reset the pending_comp.
220                  */
221                 list_splice_init(&o->pending_comp, &o->exe_queue);
222         else if (!rc)
223                 /* If zero is returned, means there are no outstanding pending
224                  * completions and we may dismiss the pending list.
225                  */
226                 __bnx2x_exe_queue_reset_pending(bp, o);
227
228         return rc;
229 }
230
231 static inline bool bnx2x_exe_queue_empty(struct bnx2x_exe_queue_obj *o)
232 {
233         bool empty = list_empty(&o->exe_queue);
234
235         /* Don't reorder!!! */
236         mb();
237
238         return empty && list_empty(&o->pending_comp);
239 }
240
241 static inline struct bnx2x_exeq_elem *bnx2x_exe_queue_alloc_elem(
242         struct bnx2x *bp)
243 {
244         DP(BNX2X_MSG_SP, "Allocating a new exe_queue element\n");
245         return kzmalloc(sizeof(struct bnx2x_exeq_elem), 0);
246 }
247
248 /************************ raw_obj functions ***********************************/
249 static bool bnx2x_raw_check_pending(struct bnx2x_raw_obj *o)
250 {
251         return !!test_bit(o->state, o->pstate);
252 }
253
254 static void bnx2x_raw_clear_pending(struct bnx2x_raw_obj *o)
255 {
256         cmb();
257         clear_bit(o->state, o->pstate);
258         cmb();
259 }
260
261 static void bnx2x_raw_set_pending(struct bnx2x_raw_obj *o)
262 {
263         cmb();
264         set_bit(o->state, o->pstate);
265         cmb();
266 }
267
268 /**
269  * bnx2x_state_wait - wait until the given bit(state) is cleared
270  *
271  * @bp:         device handle
272  * @state:      state which is to be cleared
273  * @state_p:    state buffer
274  *
275  */
276 static inline int bnx2x_state_wait(struct bnx2x *bp, int state,
277                                    unsigned long *pstate)
278 {
279         /* can take a while if any port is running */
280         int cnt = 5000;
281
282         if (CHIP_REV_IS_EMUL(bp))
283                 cnt *= 20;
284
285         DP(BNX2X_MSG_SP, "waiting for state to become %d\n", state);
286
287         might_sleep();
288         while (cnt--) {
289                 if (!test_bit(state, pstate)) {
290 #ifdef BNX2X_STOP_ON_ERROR
291                         DP(BNX2X_MSG_SP, "exit  (cnt %d)\n", 5000 - cnt);
292 #endif
293                         return 0;
294                 }
295
296                 kthread_usleep(1000);
297
298                 if (bp->panic)
299                         return -EIO;
300         }
301
302         /* timeout! */
303         BNX2X_ERR("timeout waiting for state %d\n", state);
304 #ifdef BNX2X_STOP_ON_ERROR
305         bnx2x_panic();
306 #endif
307
308         return -EBUSY;
309 }
310
311 static int bnx2x_raw_wait(struct bnx2x *bp, struct bnx2x_raw_obj *raw)
312 {
313         return bnx2x_state_wait(bp, raw->state, raw->pstate);
314 }
315
316 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
317 /* credit handling callbacks */
318 static bool bnx2x_get_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int *offset)
319 {
320         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
321
322         warn_on(!mp);
323
324         return mp->get_entry(mp, offset);
325 }
326
327 static bool bnx2x_get_credit_mac(struct bnx2x_vlan_mac_obj *o)
328 {
329         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
330
331         warn_on(!mp);
332
333         return mp->get(mp, 1);
334 }
335
336 static bool bnx2x_get_cam_offset_vlan(struct bnx2x_vlan_mac_obj *o, int *offset)
337 {
338         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
339
340         warn_on(!vp);
341
342         return vp->get_entry(vp, offset);
343 }
344
345 static bool bnx2x_get_credit_vlan(struct bnx2x_vlan_mac_obj *o)
346 {
347         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
348
349         warn_on(!vp);
350
351         return vp->get(vp, 1);
352 }
353 static bool bnx2x_put_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int offset)
354 {
355         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
356
357         return mp->put_entry(mp, offset);
358 }
359
360 static bool bnx2x_put_credit_mac(struct bnx2x_vlan_mac_obj *o)
361 {
362         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
363
364         return mp->put(mp, 1);
365 }
366
367 static bool bnx2x_put_cam_offset_vlan(struct bnx2x_vlan_mac_obj *o, int offset)
368 {
369         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
370
371         return vp->put_entry(vp, offset);
372 }
373
374 static bool bnx2x_put_credit_vlan(struct bnx2x_vlan_mac_obj *o)
375 {
376         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
377
378         return vp->put(vp, 1);
379 }
380
381 /**
382  * __bnx2x_vlan_mac_h_write_trylock - try getting the vlan mac writer lock
383  *
384  * @bp:         device handle
385  * @o:          vlan_mac object
386  *
387  * @details: Non-blocking implementation; should be called under execution
388  *           queue lock.
389  */
390 static int __bnx2x_vlan_mac_h_write_trylock(struct bnx2x *bp,
391                                             struct bnx2x_vlan_mac_obj *o)
392 {
393         if (o->head_reader) {
394                 DP(BNX2X_MSG_SP, "vlan_mac_lock writer - There are readers; Busy\n");
395                 return -EBUSY;
396         }
397
398         DP(BNX2X_MSG_SP, "vlan_mac_lock writer - Taken\n");
399         return 0;
400 }
401
402 /**
403  * __bnx2x_vlan_mac_h_exec_pending - execute step instead of a previous step
404  *
405  * @bp:         device handle
406  * @o:          vlan_mac object
407  *
408  * @details Should be called under execution queue lock; notice it might release
409  *          and reclaim it during its run.
410  */
411 static void __bnx2x_vlan_mac_h_exec_pending(struct bnx2x *bp,
412                                             struct bnx2x_vlan_mac_obj *o)
413 {
414         int rc;
415         unsigned long ramrod_flags = o->saved_ramrod_flags;
416
417         DP(BNX2X_MSG_SP, "vlan_mac_lock execute pending command with ramrod flags %lu\n",
418            ramrod_flags);
419         o->head_exe_request = false;
420         o->saved_ramrod_flags = 0;
421         rc = bnx2x_exe_queue_step(bp, &o->exe_queue, &ramrod_flags);
422         if (rc != 0) {
423                 BNX2X_ERR("execution of pending commands failed with rc %d\n",
424                           rc);
425 #ifdef BNX2X_STOP_ON_ERROR
426                 bnx2x_panic();
427 #endif
428         }
429 }
430
431 /**
432  * __bnx2x_vlan_mac_h_pend - Pend an execution step which couldn't run
433  *
434  * @bp:                 device handle
435  * @o:                  vlan_mac object
436  * @ramrod_flags:       ramrod flags of missed execution
437  *
438  * @details Should be called under execution queue lock.
439  */
440 static void __bnx2x_vlan_mac_h_pend(struct bnx2x *bp,
441                                     struct bnx2x_vlan_mac_obj *o,
442                                     unsigned long ramrod_flags)
443 {
444         o->head_exe_request = true;
445         o->saved_ramrod_flags = ramrod_flags;
446         DP(BNX2X_MSG_SP, "Placing pending execution with ramrod flags %lu\n",
447            ramrod_flags);
448 }
449
450 /**
451  * __bnx2x_vlan_mac_h_write_unlock - unlock the vlan mac head list writer lock
452  *
453  * @bp:                 device handle
454  * @o:                  vlan_mac object
455  *
456  * @details Should be called under execution queue lock. Notice if a pending
457  *          execution exists, it would perform it - possibly releasing and
458  *          reclaiming the execution queue lock.
459  */
460 static void __bnx2x_vlan_mac_h_write_unlock(struct bnx2x *bp,
461                                             struct bnx2x_vlan_mac_obj *o)
462 {
463         /* It's possible a new pending execution was added since this writer
464          * executed. If so, execute again. [Ad infinitum]
465          */
466         while (o->head_exe_request) {
467                 DP(BNX2X_MSG_SP, "vlan_mac_lock - writer release encountered a pending request\n");
468                 __bnx2x_vlan_mac_h_exec_pending(bp, o);
469         }
470 }
471
472
473 /**
474  * __bnx2x_vlan_mac_h_read_lock - lock the vlan mac head list reader lock
475  *
476  * @bp:                 device handle
477  * @o:                  vlan_mac object
478  *
479  * @details Should be called under the execution queue lock. May sleep. May
480  *          release and reclaim execution queue lock during its run.
481  */
482 static int __bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
483                                         struct bnx2x_vlan_mac_obj *o)
484 {
485         /* If we got here, we're holding lock --> no WRITER exists */
486         o->head_reader++;
487         DP(BNX2X_MSG_SP, "vlan_mac_lock - locked reader - number %d\n",
488            o->head_reader);
489
490         return 0;
491 }
492
493 /**
494  * bnx2x_vlan_mac_h_read_lock - lock the vlan mac head list reader lock
495  *
496  * @bp:                 device handle
497  * @o:                  vlan_mac object
498  *
499  * @details May sleep. Claims and releases execution queue lock during its run.
500  */
501 int bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
502                                struct bnx2x_vlan_mac_obj *o)
503 {
504         int rc;
505
506         spin_lock(&o->exe_queue.lock);
507         rc = __bnx2x_vlan_mac_h_read_lock(bp, o);
508         spin_unlock(&o->exe_queue.lock);
509
510         return rc;
511 }
512
513 /**
514  * __bnx2x_vlan_mac_h_read_unlock - unlock the vlan mac head list reader lock
515  *
516  * @bp:                 device handle
517  * @o:                  vlan_mac object
518  *
519  * @details Should be called under execution queue lock. Notice if a pending
520  *          execution exists, it would be performed if this was the last
521  *          reader. possibly releasing and reclaiming the execution queue lock.
522  */
523 static void __bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
524                                           struct bnx2x_vlan_mac_obj *o)
525 {
526         if (!o->head_reader) {
527                 BNX2X_ERR("Need to release vlan mac reader lock, but lock isn't taken\n");
528 #ifdef BNX2X_STOP_ON_ERROR
529                 bnx2x_panic();
530 #endif
531         } else {
532                 o->head_reader--;
533                 DP(BNX2X_MSG_SP, "vlan_mac_lock - decreased readers to %d\n",
534                    o->head_reader);
535         }
536
537         /* It's possible a new pending execution was added, and that this reader
538          * was last - if so we need to execute the command.
539          */
540         if (!o->head_reader && o->head_exe_request) {
541                 DP(BNX2X_MSG_SP, "vlan_mac_lock - reader release encountered a pending request\n");
542
543                 /* Writer release will do the trick */
544                 __bnx2x_vlan_mac_h_write_unlock(bp, o);
545         }
546 }
547
548 /**
549  * bnx2x_vlan_mac_h_read_unlock - unlock the vlan mac head list reader lock
550  *
551  * @bp:                 device handle
552  * @o:                  vlan_mac object
553  *
554  * @details Notice if a pending execution exists, it would be performed if this
555  *          was the last reader. Claims and releases the execution queue lock
556  *          during its run.
557  */
558 void bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
559                                   struct bnx2x_vlan_mac_obj *o)
560 {
561         spin_lock(&o->exe_queue.lock);
562         __bnx2x_vlan_mac_h_read_unlock(bp, o);
563         spin_unlock(&o->exe_queue.lock);
564 }
565
566 static int bnx2x_get_n_elements(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
567                                 int n, uint8_t *base, uint8_t stride,
568                                 uint8_t size)
569 {
570         struct bnx2x_vlan_mac_registry_elem *pos;
571         uint8_t *next = base;
572         int counter = 0;
573         int read_lock;
574
575         DP(BNX2X_MSG_SP, "get_n_elements - taking vlan_mac_lock (reader)\n");
576         read_lock = bnx2x_vlan_mac_h_read_lock(bp, o);
577         if (read_lock != 0)
578                 BNX2X_ERR("get_n_elements failed to get vlan mac reader lock; Access without lock\n");
579
580         /* traverse list */
581         list_for_each_entry(pos, &o->head, link) {
582                 if (counter < n) {
583                         memcpy(next, &pos->u, size);
584                         counter++;
585                         DP(BNX2X_MSG_SP, "copied element number %d to address %p element was:\n",
586                            counter, next);
587                         next += stride + size;
588                 }
589         }
590
591         if (read_lock == 0) {
592                 DP(BNX2X_MSG_SP, "get_n_elements - releasing vlan_mac_lock (reader)\n");
593                 bnx2x_vlan_mac_h_read_unlock(bp, o);
594         }
595
596         return counter * Eaddrlen;
597 }
598
599 /* check_add() callbacks */
600 static int bnx2x_check_mac_add(struct bnx2x *bp,
601                                struct bnx2x_vlan_mac_obj *o,
602                                union bnx2x_classification_ramrod_data *data)
603 {
604 panic("Not implemented");
605 #if 0 // AKAROS_PORT
606         struct bnx2x_vlan_mac_registry_elem *pos;
607
608         DP(BNX2X_MSG_SP, "Checking MAC %pM for ADD command\n", data->mac.mac);
609
610         if (!is_valid_ether_addr(data->mac.mac))
611                 return -EINVAL;
612
613         /* Check if a requested MAC already exists */
614         list_for_each_entry(pos, &o->head, link)
615                 if (ether_addr_equal(data->mac.mac, pos->u.mac.mac) &&
616                     (data->mac.is_inner_mac == pos->u.mac.is_inner_mac))
617                         return -EEXIST;
618
619         return 0;
620 #endif
621 }
622
623 static int bnx2x_check_vlan_add(struct bnx2x *bp,
624                                 struct bnx2x_vlan_mac_obj *o,
625                                 union bnx2x_classification_ramrod_data *data)
626 {
627         struct bnx2x_vlan_mac_registry_elem *pos;
628
629         DP(BNX2X_MSG_SP, "Checking VLAN %d for ADD command\n", data->vlan.vlan);
630
631         list_for_each_entry(pos, &o->head, link)
632                 if (data->vlan.vlan == pos->u.vlan.vlan)
633                         return -EEXIST;
634
635         return 0;
636 }
637
638 /* check_del() callbacks */
639 static struct bnx2x_vlan_mac_registry_elem *
640         bnx2x_check_mac_del(struct bnx2x *bp,
641                             struct bnx2x_vlan_mac_obj *o,
642                             union bnx2x_classification_ramrod_data *data)
643 {
644 panic("Not implemented");
645 #if 0 // AKAROS_PORT
646         struct bnx2x_vlan_mac_registry_elem *pos;
647
648         DP(BNX2X_MSG_SP, "Checking MAC %pM for DEL command\n", data->mac.mac);
649
650         list_for_each_entry(pos, &o->head, link)
651                 if (ether_addr_equal(data->mac.mac, pos->u.mac.mac) &&
652                     (data->mac.is_inner_mac == pos->u.mac.is_inner_mac))
653                         return pos;
654
655         return NULL;
656 #endif
657 }
658
659 static struct bnx2x_vlan_mac_registry_elem *
660         bnx2x_check_vlan_del(struct bnx2x *bp,
661                              struct bnx2x_vlan_mac_obj *o,
662                              union bnx2x_classification_ramrod_data *data)
663 {
664         struct bnx2x_vlan_mac_registry_elem *pos;
665
666         DP(BNX2X_MSG_SP, "Checking VLAN %d for DEL command\n", data->vlan.vlan);
667
668         list_for_each_entry(pos, &o->head, link)
669                 if (data->vlan.vlan == pos->u.vlan.vlan)
670                         return pos;
671
672         return NULL;
673 }
674
675 /* check_move() callback */
676 static bool bnx2x_check_move(struct bnx2x *bp,
677                              struct bnx2x_vlan_mac_obj *src_o,
678                              struct bnx2x_vlan_mac_obj *dst_o,
679                              union bnx2x_classification_ramrod_data *data)
680 {
681         struct bnx2x_vlan_mac_registry_elem *pos;
682         int rc;
683
684         /* Check if we can delete the requested configuration from the first
685          * object.
686          */
687         pos = src_o->check_del(bp, src_o, data);
688
689         /*  check if configuration can be added */
690         rc = dst_o->check_add(bp, dst_o, data);
691
692         /* If this classification can not be added (is already set)
693          * or can't be deleted - return an error.
694          */
695         if (rc || !pos)
696                 return false;
697
698         return true;
699 }
700
701 static bool bnx2x_check_move_always_err(
702         struct bnx2x *bp,
703         struct bnx2x_vlan_mac_obj *src_o,
704         struct bnx2x_vlan_mac_obj *dst_o,
705         union bnx2x_classification_ramrod_data *data)
706 {
707         return false;
708 }
709
710 static inline uint8_t bnx2x_vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o)
711 {
712         struct bnx2x_raw_obj *raw = &o->raw;
713         uint8_t rx_tx_flag = 0;
714
715         if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) ||
716             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
717                 rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_TX_CMD;
718
719         if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) ||
720             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
721                 rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_RX_CMD;
722
723         return rx_tx_flag;
724 }
725
726 static void bnx2x_set_mac_in_nig(struct bnx2x *bp,
727                                  bool add, unsigned char *dev_addr, int index)
728 {
729         uint32_t wb_data[2];
730         uint32_t reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM :
731                          NIG_REG_LLH0_FUNC_MEM;
732
733         if (!IS_MF_SI(bp) && !IS_MF_AFEX(bp))
734                 return;
735
736         if (index > BNX2X_LLH_CAM_MAX_PF_LINE)
737                 return;
738
739         DP(BNX2X_MSG_SP, "Going to %s LLH configuration at entry %d\n",
740                          (add ? "ADD" : "DELETE"), index);
741
742         if (add) {
743                 /* LLH_FUNC_MEM is a u64 WB register */
744                 reg_offset += 8*index;
745
746                 wb_data[0] = ((dev_addr[2] << 24) | (dev_addr[3] << 16) |
747                               (dev_addr[4] <<  8) |  dev_addr[5]);
748                 wb_data[1] = ((dev_addr[0] <<  8) |  dev_addr[1]);
749
750                 REG_WR_DMAE(bp, reg_offset, wb_data, 2);
751         }
752
753         REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM_ENABLE :
754                                   NIG_REG_LLH0_FUNC_MEM_ENABLE) + 4*index, add);
755 }
756
757 /**
758  * bnx2x_vlan_mac_set_cmd_hdr_e2 - set a header in a single classify ramrod
759  *
760  * @bp:         device handle
761  * @o:          queue for which we want to configure this rule
762  * @add:        if true the command is an ADD command, DEL otherwise
763  * @opcode:     CLASSIFY_RULE_OPCODE_XXX
764  * @hdr:        pointer to a header to setup
765  *
766  */
767 static inline void bnx2x_vlan_mac_set_cmd_hdr_e2(struct bnx2x *bp,
768         struct bnx2x_vlan_mac_obj *o, bool add, int opcode,
769         struct eth_classify_cmd_header *hdr)
770 {
771         struct bnx2x_raw_obj *raw = &o->raw;
772
773         hdr->client_id = raw->cl_id;
774         hdr->func_id = raw->func_id;
775
776         /* Rx or/and Tx (internal switching) configuration ? */
777         hdr->cmd_general_data |=
778                 bnx2x_vlan_mac_get_rx_tx_flag(o);
779
780         if (add)
781                 hdr->cmd_general_data |= ETH_CLASSIFY_CMD_HEADER_IS_ADD;
782
783         hdr->cmd_general_data |=
784                 (opcode << ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT);
785 }
786
787 /**
788  * bnx2x_vlan_mac_set_rdata_hdr_e2 - set the classify ramrod data header
789  *
790  * @cid:        connection id
791  * @type:       BNX2X_FILTER_XXX_PENDING
792  * @hdr:        pointer to header to setup
793  * @rule_cnt:
794  *
795  * currently we always configure one rule and echo field to contain a CID and an
796  * opcode type.
797  */
798 static inline void bnx2x_vlan_mac_set_rdata_hdr_e2(uint32_t cid, int type,
799                                 struct eth_classify_header *hdr, int rule_cnt)
800 {
801         hdr->echo = cpu_to_le32((cid & BNX2X_SWCID_MASK) |
802                                 (type << BNX2X_SWCID_SHIFT));
803         hdr->rule_cnt = (uint8_t)rule_cnt;
804 }
805
806 /* hw_config() callbacks */
807 static void bnx2x_set_one_mac_e2(struct bnx2x *bp,
808                                  struct bnx2x_vlan_mac_obj *o,
809                                  struct bnx2x_exeq_elem *elem, int rule_idx,
810                                  int cam_offset)
811 {
812         struct bnx2x_raw_obj *raw = &o->raw;
813         struct eth_classify_rules_ramrod_data *data =
814                 (struct eth_classify_rules_ramrod_data *)(raw->rdata);
815         int rule_cnt = rule_idx + 1, cmd = elem->cmd_data.vlan_mac.cmd;
816         union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx];
817         bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false;
818         unsigned long *vlan_mac_flags = &elem->cmd_data.vlan_mac.vlan_mac_flags;
819         uint8_t *mac = elem->cmd_data.vlan_mac.u.mac.mac;
820
821         /* Set LLH CAM entry: currently only iSCSI and ETH macs are
822          * relevant. In addition, current implementation is tuned for a
823          * single ETH MAC.
824          *
825          * When multiple unicast ETH MACs PF configuration in switch
826          * independent mode is required (NetQ, multiple netdev MACs,
827          * etc.), consider better utilisation of 8 per function MAC
828          * entries in the LLH register. There is also
829          * NIG_REG_P[01]_LLH_FUNC_MEM2 registers that complete the
830          * total number of CAM entries to 16.
831          *
832          * Currently we won't configure NIG for MACs other than a primary ETH
833          * MAC and iSCSI L2 MAC.
834          *
835          * If this MAC is moving from one Queue to another, no need to change
836          * NIG configuration.
837          */
838         if (cmd != BNX2X_VLAN_MAC_MOVE) {
839                 if (test_bit(BNX2X_ISCSI_ETH_MAC, vlan_mac_flags))
840                         bnx2x_set_mac_in_nig(bp, add, mac,
841                                              BNX2X_LLH_CAM_ISCSI_ETH_LINE);
842                 else if (test_bit(BNX2X_ETH_MAC, vlan_mac_flags))
843                         bnx2x_set_mac_in_nig(bp, add, mac,
844                                              BNX2X_LLH_CAM_ETH_LINE);
845         }
846
847         /* Reset the ramrod data buffer for the first rule */
848         if (rule_idx == 0)
849                 memset(data, 0, sizeof(*data));
850
851         /* Setup a command header */
852         bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_MAC,
853                                       &rule_entry->mac.header);
854
855         DP(BNX2X_MSG_SP, "About to %s MAC %pM for Queue %d\n",
856            (add ? "add" : "delete"), mac, raw->cl_id);
857
858         /* Set a MAC itself */
859         bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb,
860                               &rule_entry->mac.mac_mid,
861                               &rule_entry->mac.mac_lsb, mac);
862         rule_entry->mac.inner_mac =
863                 cpu_to_le16(elem->cmd_data.vlan_mac.u.mac.is_inner_mac);
864
865         /* MOVE: Add a rule that will add this MAC to the target Queue */
866         if (cmd == BNX2X_VLAN_MAC_MOVE) {
867                 rule_entry++;
868                 rule_cnt++;
869
870                 /* Setup ramrod data */
871                 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
872                                         elem->cmd_data.vlan_mac.target_obj,
873                                               true, CLASSIFY_RULE_OPCODE_MAC,
874                                               &rule_entry->mac.header);
875
876                 /* Set a MAC itself */
877                 bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb,
878                                       &rule_entry->mac.mac_mid,
879                                       &rule_entry->mac.mac_lsb, mac);
880                 rule_entry->mac.inner_mac =
881                         cpu_to_le16(elem->cmd_data.vlan_mac.
882                                                 u.mac.is_inner_mac);
883         }
884
885         /* Set the ramrod data header */
886         /* TODO: take this to the higher level in order to prevent multiple
887                  writing */
888         bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header,
889                                         rule_cnt);
890 }
891
892 /**
893  * bnx2x_vlan_mac_set_rdata_hdr_e1x - set a header in a single classify ramrod
894  *
895  * @bp:         device handle
896  * @o:          queue
897  * @type:
898  * @cam_offset: offset in cam memory
899  * @hdr:        pointer to a header to setup
900  *
901  * E1/E1H
902  */
903 static inline void bnx2x_vlan_mac_set_rdata_hdr_e1x(struct bnx2x *bp,
904         struct bnx2x_vlan_mac_obj *o, int type, int cam_offset,
905         struct mac_configuration_hdr *hdr)
906 {
907         struct bnx2x_raw_obj *r = &o->raw;
908
909         hdr->length = 1;
910         hdr->offset = (uint8_t)cam_offset;
911         hdr->client_id = cpu_to_le16(0xff);
912         hdr->echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) |
913                                 (type << BNX2X_SWCID_SHIFT));
914 }
915
916 static inline void bnx2x_vlan_mac_set_cfg_entry_e1x(struct bnx2x *bp,
917         struct bnx2x_vlan_mac_obj *o, bool add, int opcode, uint8_t *mac,
918         uint16_t vlan_id, struct mac_configuration_entry *cfg_entry)
919 {
920         struct bnx2x_raw_obj *r = &o->raw;
921         uint32_t cl_bit_vec = (1 << r->cl_id);
922
923         cfg_entry->clients_bit_vector = cpu_to_le32(cl_bit_vec);
924         cfg_entry->pf_id = r->func_id;
925         cfg_entry->vlan_id = cpu_to_le16(vlan_id);
926
927         if (add) {
928                 SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE,
929                          T_ETH_MAC_COMMAND_SET);
930                 SET_FLAG(cfg_entry->flags,
931                          MAC_CONFIGURATION_ENTRY_VLAN_FILTERING_MODE, opcode);
932
933                 /* Set a MAC in a ramrod data */
934                 bnx2x_set_fw_mac_addr(&cfg_entry->msb_mac_addr,
935                                       &cfg_entry->middle_mac_addr,
936                                       &cfg_entry->lsb_mac_addr, mac);
937         } else
938                 SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE,
939                          T_ETH_MAC_COMMAND_INVALIDATE);
940 }
941
942 static inline void bnx2x_vlan_mac_set_rdata_e1x(struct bnx2x *bp,
943         struct bnx2x_vlan_mac_obj *o, int type, int cam_offset, bool add,
944         uint8_t *mac, uint16_t vlan_id, int opcode,
945                                                 struct mac_configuration_cmd *config)
946 {
947         struct mac_configuration_entry *cfg_entry = &config->config_table[0];
948         struct bnx2x_raw_obj *raw = &o->raw;
949
950         bnx2x_vlan_mac_set_rdata_hdr_e1x(bp, o, type, cam_offset,
951                                          &config->hdr);
952         bnx2x_vlan_mac_set_cfg_entry_e1x(bp, o, add, opcode, mac, vlan_id,
953                                          cfg_entry);
954
955         DP(BNX2X_MSG_SP, "%s MAC %pM CLID %d CAM offset %d\n",
956                          (add ? "setting" : "clearing"),
957                          mac, raw->cl_id, cam_offset);
958 }
959
960 /**
961  * bnx2x_set_one_mac_e1x - fill a single MAC rule ramrod data
962  *
963  * @bp:         device handle
964  * @o:          bnx2x_vlan_mac_obj
965  * @elem:       bnx2x_exeq_elem
966  * @rule_idx:   rule_idx
967  * @cam_offset: cam_offset
968  */
969 static void bnx2x_set_one_mac_e1x(struct bnx2x *bp,
970                                   struct bnx2x_vlan_mac_obj *o,
971                                   struct bnx2x_exeq_elem *elem, int rule_idx,
972                                   int cam_offset)
973 {
974         struct bnx2x_raw_obj *raw = &o->raw;
975         struct mac_configuration_cmd *config =
976                 (struct mac_configuration_cmd *)(raw->rdata);
977         /* 57710 and 57711 do not support MOVE command,
978          * so it's either ADD or DEL
979          */
980         bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ?
981                 true : false;
982
983         /* Reset the ramrod data buffer */
984         memset(config, 0, sizeof(*config));
985
986         bnx2x_vlan_mac_set_rdata_e1x(bp, o, raw->state,
987                                      cam_offset, add,
988                                      elem->cmd_data.vlan_mac.u.mac.mac, 0,
989                                      ETH_VLAN_FILTER_ANY_VLAN, config);
990 }
991
992 static void bnx2x_set_one_vlan_e2(struct bnx2x *bp,
993                                   struct bnx2x_vlan_mac_obj *o,
994                                   struct bnx2x_exeq_elem *elem, int rule_idx,
995                                   int cam_offset)
996 {
997         struct bnx2x_raw_obj *raw = &o->raw;
998         struct eth_classify_rules_ramrod_data *data =
999                 (struct eth_classify_rules_ramrod_data *)(raw->rdata);
1000         int rule_cnt = rule_idx + 1;
1001         union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx];
1002         enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd;
1003         bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false;
1004         uint16_t vlan = elem->cmd_data.vlan_mac.u.vlan.vlan;
1005
1006         /* Reset the ramrod data buffer for the first rule */
1007         if (rule_idx == 0)
1008                 memset(data, 0, sizeof(*data));
1009
1010         /* Set a rule header */
1011         bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_VLAN,
1012                                       &rule_entry->vlan.header);
1013
1014         DP(BNX2X_MSG_SP, "About to %s VLAN %d\n", (add ? "add" : "delete"),
1015                          vlan);
1016
1017         /* Set a VLAN itself */
1018         rule_entry->vlan.vlan = cpu_to_le16(vlan);
1019
1020         /* MOVE: Add a rule that will add this MAC to the target Queue */
1021         if (cmd == BNX2X_VLAN_MAC_MOVE) {
1022                 rule_entry++;
1023                 rule_cnt++;
1024
1025                 /* Setup ramrod data */
1026                 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
1027                                         elem->cmd_data.vlan_mac.target_obj,
1028                                               true, CLASSIFY_RULE_OPCODE_VLAN,
1029                                               &rule_entry->vlan.header);
1030
1031                 /* Set a VLAN itself */
1032                 rule_entry->vlan.vlan = cpu_to_le16(vlan);
1033         }
1034
1035         /* Set the ramrod data header */
1036         /* TODO: take this to the higher level in order to prevent multiple
1037                  writing */
1038         bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header,
1039                                         rule_cnt);
1040 }
1041
1042 /**
1043  * bnx2x_vlan_mac_restore - reconfigure next MAC/VLAN/VLAN-MAC element
1044  *
1045  * @bp:         device handle
1046  * @p:          command parameters
1047  * @ppos:       pointer to the cookie
1048  *
1049  * reconfigure next MAC/VLAN/VLAN-MAC element from the
1050  * previously configured elements list.
1051  *
1052  * from command parameters only RAMROD_COMP_WAIT bit in ramrod_flags is taken
1053  * into an account
1054  *
1055  * pointer to the cookie  - that should be given back in the next call to make
1056  * function handle the next element. If *ppos is set to NULL it will restart the
1057  * iterator. If returned *ppos == NULL this means that the last element has been
1058  * handled.
1059  *
1060  */
1061 static int bnx2x_vlan_mac_restore(struct bnx2x *bp,
1062                            struct bnx2x_vlan_mac_ramrod_params *p,
1063                            struct bnx2x_vlan_mac_registry_elem **ppos)
1064 {
1065         struct bnx2x_vlan_mac_registry_elem *pos;
1066         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1067
1068         /* If list is empty - there is nothing to do here */
1069         if (list_empty(&o->head)) {
1070                 *ppos = NULL;
1071                 return 0;
1072         }
1073
1074         /* make a step... */
1075         if (*ppos == NULL)
1076                 *ppos = list_first_entry(&o->head,
1077                                          struct bnx2x_vlan_mac_registry_elem,
1078                                          link);
1079         else
1080                 *ppos = list_next_entry(*ppos, link);
1081
1082         pos = *ppos;
1083
1084         /* If it's the last step - return NULL */
1085         if (list_is_last(&pos->link, &o->head))
1086                 *ppos = NULL;
1087
1088         /* Prepare a 'user_req' */
1089         memcpy(&p->user_req.u, &pos->u, sizeof(pos->u));
1090
1091         /* Set the command */
1092         p->user_req.cmd = BNX2X_VLAN_MAC_ADD;
1093
1094         /* Set vlan_mac_flags */
1095         p->user_req.vlan_mac_flags = pos->vlan_mac_flags;
1096
1097         /* Set a restore bit */
1098         __set_bit(RAMROD_RESTORE, &p->ramrod_flags);
1099
1100         return bnx2x_config_vlan_mac(bp, p);
1101 }
1102
1103 /* bnx2x_exeq_get_mac/bnx2x_exeq_get_vlan/bnx2x_exeq_get_vlan_mac return a
1104  * pointer to an element with a specific criteria and NULL if such an element
1105  * hasn't been found.
1106  */
1107 static struct bnx2x_exeq_elem *bnx2x_exeq_get_mac(
1108         struct bnx2x_exe_queue_obj *o,
1109         struct bnx2x_exeq_elem *elem)
1110 {
1111         struct bnx2x_exeq_elem *pos;
1112         struct bnx2x_mac_ramrod_data *data = &elem->cmd_data.vlan_mac.u.mac;
1113
1114         /* Check pending for execution commands */
1115         list_for_each_entry(pos, &o->exe_queue, link)
1116                 if (!memcmp(&pos->cmd_data.vlan_mac.u.mac, data,
1117                               sizeof(*data)) &&
1118                     (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd))
1119                         return pos;
1120
1121         return NULL;
1122 }
1123
1124 static struct bnx2x_exeq_elem *bnx2x_exeq_get_vlan(
1125         struct bnx2x_exe_queue_obj *o,
1126         struct bnx2x_exeq_elem *elem)
1127 {
1128         struct bnx2x_exeq_elem *pos;
1129         struct bnx2x_vlan_ramrod_data *data = &elem->cmd_data.vlan_mac.u.vlan;
1130
1131         /* Check pending for execution commands */
1132         list_for_each_entry(pos, &o->exe_queue, link)
1133                 if (!memcmp(&pos->cmd_data.vlan_mac.u.vlan, data,
1134                               sizeof(*data)) &&
1135                     (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd))
1136                         return pos;
1137
1138         return NULL;
1139 }
1140
1141 /**
1142  * bnx2x_validate_vlan_mac_add - check if an ADD command can be executed
1143  *
1144  * @bp:         device handle
1145  * @qo:         bnx2x_qable_obj
1146  * @elem:       bnx2x_exeq_elem
1147  *
1148  * Checks that the requested configuration can be added. If yes and if
1149  * requested, consume CAM credit.
1150  *
1151  * The 'validate' is run after the 'optimize'.
1152  *
1153  */
1154 static inline int bnx2x_validate_vlan_mac_add(struct bnx2x *bp,
1155                                               union bnx2x_qable_obj *qo,
1156                                               struct bnx2x_exeq_elem *elem)
1157 {
1158         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1159         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1160         int rc;
1161
1162         /* Check the registry */
1163         rc = o->check_add(bp, o, &elem->cmd_data.vlan_mac.u);
1164         if (rc) {
1165                 DP(BNX2X_MSG_SP, "ADD command is not allowed considering current registry state.\n");
1166                 return rc;
1167         }
1168
1169         /* Check if there is a pending ADD command for this
1170          * MAC/VLAN/VLAN-MAC. Return an error if there is.
1171          */
1172         if (exeq->get(exeq, elem)) {
1173                 DP(BNX2X_MSG_SP, "There is a pending ADD command already\n");
1174                 return -EEXIST;
1175         }
1176
1177         /* TODO: Check the pending MOVE from other objects where this
1178          * object is a destination object.
1179          */
1180
1181         /* Consume the credit if not requested not to */
1182         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1183                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1184             o->get_credit(o)))
1185                 return -EINVAL;
1186
1187         return 0;
1188 }
1189
1190 /**
1191  * bnx2x_validate_vlan_mac_del - check if the DEL command can be executed
1192  *
1193  * @bp:         device handle
1194  * @qo:         quable object to check
1195  * @elem:       element that needs to be deleted
1196  *
1197  * Checks that the requested configuration can be deleted. If yes and if
1198  * requested, returns a CAM credit.
1199  *
1200  * The 'validate' is run after the 'optimize'.
1201  */
1202 static inline int bnx2x_validate_vlan_mac_del(struct bnx2x *bp,
1203                                               union bnx2x_qable_obj *qo,
1204                                               struct bnx2x_exeq_elem *elem)
1205 {
1206         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1207         struct bnx2x_vlan_mac_registry_elem *pos;
1208         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1209         struct bnx2x_exeq_elem query_elem;
1210
1211         /* If this classification can not be deleted (doesn't exist)
1212          * - return a BNX2X_EXIST.
1213          */
1214         pos = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u);
1215         if (!pos) {
1216                 DP(BNX2X_MSG_SP, "DEL command is not allowed considering current registry state\n");
1217                 return -EEXIST;
1218         }
1219
1220         /* Check if there are pending DEL or MOVE commands for this
1221          * MAC/VLAN/VLAN-MAC. Return an error if so.
1222          */
1223         memcpy(&query_elem, elem, sizeof(query_elem));
1224
1225         /* Check for MOVE commands */
1226         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_MOVE;
1227         if (exeq->get(exeq, &query_elem)) {
1228                 BNX2X_ERR("There is a pending MOVE command already\n");
1229                 return -EINVAL;
1230         }
1231
1232         /* Check for DEL commands */
1233         if (exeq->get(exeq, elem)) {
1234                 DP(BNX2X_MSG_SP, "There is a pending DEL command already\n");
1235                 return -EEXIST;
1236         }
1237
1238         /* Return the credit to the credit pool if not requested not to */
1239         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1240                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1241             o->put_credit(o))) {
1242                 BNX2X_ERR("Failed to return a credit\n");
1243                 return -EINVAL;
1244         }
1245
1246         return 0;
1247 }
1248
1249 /**
1250  * bnx2x_validate_vlan_mac_move - check if the MOVE command can be executed
1251  *
1252  * @bp:         device handle
1253  * @qo:         quable object to check (source)
1254  * @elem:       element that needs to be moved
1255  *
1256  * Checks that the requested configuration can be moved. If yes and if
1257  * requested, returns a CAM credit.
1258  *
1259  * The 'validate' is run after the 'optimize'.
1260  */
1261 static inline int bnx2x_validate_vlan_mac_move(struct bnx2x *bp,
1262                                                union bnx2x_qable_obj *qo,
1263                                                struct bnx2x_exeq_elem *elem)
1264 {
1265         struct bnx2x_vlan_mac_obj *src_o = &qo->vlan_mac;
1266         struct bnx2x_vlan_mac_obj *dest_o = elem->cmd_data.vlan_mac.target_obj;
1267         struct bnx2x_exeq_elem query_elem;
1268         struct bnx2x_exe_queue_obj *src_exeq = &src_o->exe_queue;
1269         struct bnx2x_exe_queue_obj *dest_exeq = &dest_o->exe_queue;
1270
1271         /* Check if we can perform this operation based on the current registry
1272          * state.
1273          */
1274         if (!src_o->check_move(bp, src_o, dest_o,
1275                                &elem->cmd_data.vlan_mac.u)) {
1276                 DP(BNX2X_MSG_SP, "MOVE command is not allowed considering current registry state\n");
1277                 return -EINVAL;
1278         }
1279
1280         /* Check if there is an already pending DEL or MOVE command for the
1281          * source object or ADD command for a destination object. Return an
1282          * error if so.
1283          */
1284         memcpy(&query_elem, elem, sizeof(query_elem));
1285
1286         /* Check DEL on source */
1287         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_DEL;
1288         if (src_exeq->get(src_exeq, &query_elem)) {
1289                 BNX2X_ERR("There is a pending DEL command on the source queue already\n");
1290                 return -EINVAL;
1291         }
1292
1293         /* Check MOVE on source */
1294         if (src_exeq->get(src_exeq, elem)) {
1295                 DP(BNX2X_MSG_SP, "There is a pending MOVE command already\n");
1296                 return -EEXIST;
1297         }
1298
1299         /* Check ADD on destination */
1300         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_ADD;
1301         if (dest_exeq->get(dest_exeq, &query_elem)) {
1302                 BNX2X_ERR("There is a pending ADD command on the destination queue already\n");
1303                 return -EINVAL;
1304         }
1305
1306         /* Consume the credit if not requested not to */
1307         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
1308                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1309             dest_o->get_credit(dest_o)))
1310                 return -EINVAL;
1311
1312         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1313                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1314             src_o->put_credit(src_o))) {
1315                 /* return the credit taken from dest... */
1316                 dest_o->put_credit(dest_o);
1317                 return -EINVAL;
1318         }
1319
1320         return 0;
1321 }
1322
1323 static int bnx2x_validate_vlan_mac(struct bnx2x *bp,
1324                                    union bnx2x_qable_obj *qo,
1325                                    struct bnx2x_exeq_elem *elem)
1326 {
1327         switch (elem->cmd_data.vlan_mac.cmd) {
1328         case BNX2X_VLAN_MAC_ADD:
1329                 return bnx2x_validate_vlan_mac_add(bp, qo, elem);
1330         case BNX2X_VLAN_MAC_DEL:
1331                 return bnx2x_validate_vlan_mac_del(bp, qo, elem);
1332         case BNX2X_VLAN_MAC_MOVE:
1333                 return bnx2x_validate_vlan_mac_move(bp, qo, elem);
1334         default:
1335                 return -EINVAL;
1336         }
1337 }
1338
1339 static int bnx2x_remove_vlan_mac(struct bnx2x *bp,
1340                                   union bnx2x_qable_obj *qo,
1341                                   struct bnx2x_exeq_elem *elem)
1342 {
1343         int rc = 0;
1344
1345         /* If consumption wasn't required, nothing to do */
1346         if (test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1347                      &elem->cmd_data.vlan_mac.vlan_mac_flags))
1348                 return 0;
1349
1350         switch (elem->cmd_data.vlan_mac.cmd) {
1351         case BNX2X_VLAN_MAC_ADD:
1352         case BNX2X_VLAN_MAC_MOVE:
1353                 rc = qo->vlan_mac.put_credit(&qo->vlan_mac);
1354                 break;
1355         case BNX2X_VLAN_MAC_DEL:
1356                 rc = qo->vlan_mac.get_credit(&qo->vlan_mac);
1357                 break;
1358         default:
1359                 return -EINVAL;
1360         }
1361
1362         if (rc != true)
1363                 return -EINVAL;
1364
1365         return 0;
1366 }
1367
1368 /**
1369  * bnx2x_wait_vlan_mac - passively wait for 5 seconds until all work completes.
1370  *
1371  * @bp:         device handle
1372  * @o:          bnx2x_vlan_mac_obj
1373  *
1374  */
1375 static int bnx2x_wait_vlan_mac(struct bnx2x *bp,
1376                                struct bnx2x_vlan_mac_obj *o)
1377 {
1378         int cnt = 5000, rc;
1379         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1380         struct bnx2x_raw_obj *raw = &o->raw;
1381
1382         while (cnt--) {
1383                 /* Wait for the current command to complete */
1384                 rc = raw->wait_comp(bp, raw);
1385                 if (rc)
1386                         return rc;
1387
1388                 /* Wait until there are no pending commands */
1389                 if (!bnx2x_exe_queue_empty(exeq))
1390                         kthread_usleep(1000);
1391                 else
1392                         return 0;
1393         }
1394
1395         return -EBUSY;
1396 }
1397
1398 static int __bnx2x_vlan_mac_execute_step(struct bnx2x *bp,
1399                                          struct bnx2x_vlan_mac_obj *o,
1400                                          unsigned long *ramrod_flags)
1401 {
1402         int rc = 0;
1403
1404         spin_lock(&o->exe_queue.lock);
1405
1406         DP(BNX2X_MSG_SP, "vlan_mac_execute_step - trying to take writer lock\n");
1407         rc = __bnx2x_vlan_mac_h_write_trylock(bp, o);
1408
1409         if (rc != 0) {
1410                 __bnx2x_vlan_mac_h_pend(bp, o, *ramrod_flags);
1411
1412                 /* Calling function should not diffrentiate between this case
1413                  * and the case in which there is already a pending ramrod
1414                  */
1415                 rc = 1;
1416         } else {
1417                 rc = bnx2x_exe_queue_step(bp, &o->exe_queue, ramrod_flags);
1418         }
1419         spin_unlock(&o->exe_queue.lock);
1420
1421         return rc;
1422 }
1423
1424 /**
1425  * bnx2x_complete_vlan_mac - complete one VLAN-MAC ramrod
1426  *
1427  * @bp:         device handle
1428  * @o:          bnx2x_vlan_mac_obj
1429  * @cqe:
1430  * @cont:       if true schedule next execution chunk
1431  *
1432  */
1433 static int bnx2x_complete_vlan_mac(struct bnx2x *bp,
1434                                    struct bnx2x_vlan_mac_obj *o,
1435                                    union event_ring_elem *cqe,
1436                                    unsigned long *ramrod_flags)
1437 {
1438         struct bnx2x_raw_obj *r = &o->raw;
1439         int rc;
1440
1441         /* Clearing the pending list & raw state should be made
1442          * atomically (as execution flow assumes they represent the same).
1443          */
1444         spin_lock(&o->exe_queue.lock);
1445
1446         /* Reset pending list */
1447         __bnx2x_exe_queue_reset_pending(bp, &o->exe_queue);
1448
1449         /* Clear pending */
1450         r->clear_pending(r);
1451
1452         spin_unlock(&o->exe_queue.lock);
1453
1454         /* If ramrod failed this is most likely a SW bug */
1455         if (cqe->message.error)
1456                 return -EINVAL;
1457
1458         /* Run the next bulk of pending commands if requested */
1459         if (test_bit(RAMROD_CONT, ramrod_flags)) {
1460                 rc = __bnx2x_vlan_mac_execute_step(bp, o, ramrod_flags);
1461
1462                 if (rc < 0)
1463                         return rc;
1464         }
1465
1466         /* If there is more work to do return PENDING */
1467         if (!bnx2x_exe_queue_empty(&o->exe_queue))
1468                 return 1;
1469
1470         return 0;
1471 }
1472
1473 /**
1474  * bnx2x_optimize_vlan_mac - optimize ADD and DEL commands.
1475  *
1476  * @bp:         device handle
1477  * @o:          bnx2x_qable_obj
1478  * @elem:       bnx2x_exeq_elem
1479  */
1480 static int bnx2x_optimize_vlan_mac(struct bnx2x *bp,
1481                                    union bnx2x_qable_obj *qo,
1482                                    struct bnx2x_exeq_elem *elem)
1483 {
1484         struct bnx2x_exeq_elem query, *pos;
1485         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1486         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1487
1488         memcpy(&query, elem, sizeof(query));
1489
1490         switch (elem->cmd_data.vlan_mac.cmd) {
1491         case BNX2X_VLAN_MAC_ADD:
1492                 query.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_DEL;
1493                 break;
1494         case BNX2X_VLAN_MAC_DEL:
1495                 query.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_ADD;
1496                 break;
1497         default:
1498                 /* Don't handle anything other than ADD or DEL */
1499                 return 0;
1500         }
1501
1502         /* If we found the appropriate element - delete it */
1503         pos = exeq->get(exeq, &query);
1504         if (pos) {
1505
1506                 /* Return the credit of the optimized command */
1507                 if (!test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1508                               &pos->cmd_data.vlan_mac.vlan_mac_flags)) {
1509                         if ((query.cmd_data.vlan_mac.cmd ==
1510                              BNX2X_VLAN_MAC_ADD) && !o->put_credit(o)) {
1511                                 BNX2X_ERR("Failed to return the credit for the optimized ADD command\n");
1512                                 return -EINVAL;
1513                         } else if (!o->get_credit(o)) { /* VLAN_MAC_DEL */
1514                                 BNX2X_ERR("Failed to recover the credit from the optimized DEL command\n");
1515                                 return -EINVAL;
1516                         }
1517                 }
1518
1519                 DP(BNX2X_MSG_SP, "Optimizing %s command\n",
1520                            (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ?
1521                            "ADD" : "DEL");
1522
1523                 list_del(&pos->link);
1524                 bnx2x_exe_queue_free_elem(bp, pos);
1525                 return 1;
1526         }
1527
1528         return 0;
1529 }
1530
1531 /**
1532  * bnx2x_vlan_mac_get_registry_elem - prepare a registry element
1533  *
1534  * @bp:   device handle
1535  * @o:
1536  * @elem:
1537  * @restore:
1538  * @re:
1539  *
1540  * prepare a registry element according to the current command request.
1541  */
1542 static inline int bnx2x_vlan_mac_get_registry_elem(
1543         struct bnx2x *bp,
1544         struct bnx2x_vlan_mac_obj *o,
1545         struct bnx2x_exeq_elem *elem,
1546         bool restore,
1547         struct bnx2x_vlan_mac_registry_elem **re)
1548 {
1549         enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd;
1550         struct bnx2x_vlan_mac_registry_elem *reg_elem;
1551
1552         /* Allocate a new registry element if needed. */
1553         if (!restore &&
1554             ((cmd == BNX2X_VLAN_MAC_ADD) || (cmd == BNX2X_VLAN_MAC_MOVE))) {
1555                 reg_elem = kzmalloc(sizeof(*reg_elem), 0);
1556                 if (!reg_elem)
1557                         return -ENOMEM;
1558
1559                 /* Get a new CAM offset */
1560                 if (!o->get_cam_offset(o, &reg_elem->cam_offset)) {
1561                         /* This shall never happen, because we have checked the
1562                          * CAM availability in the 'validate'.
1563                          */
1564                         warn_on(1);
1565                         kfree(reg_elem);
1566                         return -EINVAL;
1567                 }
1568
1569                 DP(BNX2X_MSG_SP, "Got cam offset %d\n", reg_elem->cam_offset);
1570
1571                 /* Set a VLAN-MAC data */
1572                 memcpy(&reg_elem->u, &elem->cmd_data.vlan_mac.u,
1573                           sizeof(reg_elem->u));
1574
1575                 /* Copy the flags (needed for DEL and RESTORE flows) */
1576                 reg_elem->vlan_mac_flags =
1577                         elem->cmd_data.vlan_mac.vlan_mac_flags;
1578         } else /* DEL, RESTORE */
1579                 reg_elem = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u);
1580
1581         *re = reg_elem;
1582         return 0;
1583 }
1584
1585 /**
1586  * bnx2x_execute_vlan_mac - execute vlan mac command
1587  *
1588  * @bp:                 device handle
1589  * @qo:
1590  * @exe_chunk:
1591  * @ramrod_flags:
1592  *
1593  * go and send a ramrod!
1594  */
1595 static int bnx2x_execute_vlan_mac(struct bnx2x *bp,
1596                                   union bnx2x_qable_obj *qo,
1597                                   struct list_head *exe_chunk,
1598                                   unsigned long *ramrod_flags)
1599 {
1600         struct bnx2x_exeq_elem *elem;
1601         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac, *cam_obj;
1602         struct bnx2x_raw_obj *r = &o->raw;
1603         int rc, idx = 0;
1604         bool restore = test_bit(RAMROD_RESTORE, ramrod_flags);
1605         bool drv_only = test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags);
1606         struct bnx2x_vlan_mac_registry_elem *reg_elem;
1607         enum bnx2x_vlan_mac_cmd cmd;
1608
1609         /* If DRIVER_ONLY execution is requested, cleanup a registry
1610          * and exit. Otherwise send a ramrod to FW.
1611          */
1612         if (!drv_only) {
1613                 warn_on(r->check_pending(r));
1614
1615                 /* Set pending */
1616                 r->set_pending(r);
1617
1618                 /* Fill the ramrod data */
1619                 list_for_each_entry(elem, exe_chunk, link) {
1620                         cmd = elem->cmd_data.vlan_mac.cmd;
1621                         /* We will add to the target object in MOVE command, so
1622                          * change the object for a CAM search.
1623                          */
1624                         if (cmd == BNX2X_VLAN_MAC_MOVE)
1625                                 cam_obj = elem->cmd_data.vlan_mac.target_obj;
1626                         else
1627                                 cam_obj = o;
1628
1629                         rc = bnx2x_vlan_mac_get_registry_elem(bp, cam_obj,
1630                                                               elem, restore,
1631                                                               &reg_elem);
1632                         if (rc)
1633                                 goto error_exit;
1634
1635                         warn_on(!reg_elem);
1636
1637                         /* Push a new entry into the registry */
1638                         if (!restore &&
1639                             ((cmd == BNX2X_VLAN_MAC_ADD) ||
1640                             (cmd == BNX2X_VLAN_MAC_MOVE)))
1641                                 list_add(&reg_elem->link, &cam_obj->head);
1642
1643                         /* Configure a single command in a ramrod data buffer */
1644                         o->set_one_rule(bp, o, elem, idx,
1645                                         reg_elem->cam_offset);
1646
1647                         /* MOVE command consumes 2 entries in the ramrod data */
1648                         if (cmd == BNX2X_VLAN_MAC_MOVE)
1649                                 idx += 2;
1650                         else
1651                                 idx++;
1652                 }
1653
1654                 /* No need for an explicit memory barrier here as long we would
1655                  * need to ensure the ordering of writing to the SPQ element
1656                  * and updating of the SPQ producer which involves a memory
1657                  * read and we will have to put a full memory barrier there
1658                  * (inside bnx2x_sp_post()).
1659                  */
1660
1661                 rc = bnx2x_sp_post(bp, o->ramrod_cmd, r->cid,
1662                                    U64_HI(r->rdata_mapping),
1663                                    U64_LO(r->rdata_mapping),
1664                                    ETH_CONNECTION_TYPE);
1665                 if (rc)
1666                         goto error_exit;
1667         }
1668
1669         /* Now, when we are done with the ramrod - clean up the registry */
1670         list_for_each_entry(elem, exe_chunk, link) {
1671                 cmd = elem->cmd_data.vlan_mac.cmd;
1672                 if ((cmd == BNX2X_VLAN_MAC_DEL) ||
1673                     (cmd == BNX2X_VLAN_MAC_MOVE)) {
1674                         reg_elem = o->check_del(bp, o,
1675                                                 &elem->cmd_data.vlan_mac.u);
1676
1677                         warn_on(!reg_elem);
1678
1679                         o->put_cam_offset(o, reg_elem->cam_offset);
1680                         list_del(&reg_elem->link);
1681                         kfree(reg_elem);
1682                 }
1683         }
1684
1685         if (!drv_only)
1686                 return 1;
1687         else
1688                 return 0;
1689
1690 error_exit:
1691         r->clear_pending(r);
1692
1693         /* Cleanup a registry in case of a failure */
1694         list_for_each_entry(elem, exe_chunk, link) {
1695                 cmd = elem->cmd_data.vlan_mac.cmd;
1696
1697                 if (cmd == BNX2X_VLAN_MAC_MOVE)
1698                         cam_obj = elem->cmd_data.vlan_mac.target_obj;
1699                 else
1700                         cam_obj = o;
1701
1702                 /* Delete all newly added above entries */
1703                 if (!restore &&
1704                     ((cmd == BNX2X_VLAN_MAC_ADD) ||
1705                     (cmd == BNX2X_VLAN_MAC_MOVE))) {
1706                         reg_elem = o->check_del(bp, cam_obj,
1707                                                 &elem->cmd_data.vlan_mac.u);
1708                         if (reg_elem) {
1709                                 list_del(&reg_elem->link);
1710                                 kfree(reg_elem);
1711                         }
1712                 }
1713         }
1714
1715         return rc;
1716 }
1717
1718 static inline int bnx2x_vlan_mac_push_new_cmd(
1719         struct bnx2x *bp,
1720         struct bnx2x_vlan_mac_ramrod_params *p)
1721 {
1722         struct bnx2x_exeq_elem *elem;
1723         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1724         bool restore = test_bit(RAMROD_RESTORE, &p->ramrod_flags);
1725
1726         /* Allocate the execution queue element */
1727         elem = bnx2x_exe_queue_alloc_elem(bp);
1728         if (!elem)
1729                 return -ENOMEM;
1730
1731         /* Set the command 'length' */
1732         switch (p->user_req.cmd) {
1733         case BNX2X_VLAN_MAC_MOVE:
1734                 elem->cmd_len = 2;
1735                 break;
1736         default:
1737                 elem->cmd_len = 1;
1738         }
1739
1740         /* Fill the object specific info */
1741         memcpy(&elem->cmd_data.vlan_mac, &p->user_req, sizeof(p->user_req));
1742
1743         /* Try to add a new command to the pending list */
1744         return bnx2x_exe_queue_add(bp, &o->exe_queue, elem, restore);
1745 }
1746
1747 /**
1748  * bnx2x_config_vlan_mac - configure VLAN/MAC/VLAN_MAC filtering rules.
1749  *
1750  * @bp:   device handle
1751  * @p:
1752  *
1753  */
1754 int bnx2x_config_vlan_mac(struct bnx2x *bp,
1755                            struct bnx2x_vlan_mac_ramrod_params *p)
1756 {
1757         int rc = 0;
1758         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1759         unsigned long *ramrod_flags = &p->ramrod_flags;
1760         bool cont = test_bit(RAMROD_CONT, ramrod_flags);
1761         struct bnx2x_raw_obj *raw = &o->raw;
1762
1763         /*
1764          * Add new elements to the execution list for commands that require it.
1765          */
1766         if (!cont) {
1767                 rc = bnx2x_vlan_mac_push_new_cmd(bp, p);
1768                 if (rc)
1769                         return rc;
1770         }
1771
1772         /* If nothing will be executed further in this iteration we want to
1773          * return PENDING if there are pending commands
1774          */
1775         if (!bnx2x_exe_queue_empty(&o->exe_queue))
1776                 rc = 1;
1777
1778         if (test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags))  {
1779                 DP(BNX2X_MSG_SP, "RAMROD_DRV_CLR_ONLY requested: clearing a pending bit.\n");
1780                 raw->clear_pending(raw);
1781         }
1782
1783         /* Execute commands if required */
1784         if (cont || test_bit(RAMROD_EXEC, ramrod_flags) ||
1785             test_bit(RAMROD_COMP_WAIT, ramrod_flags)) {
1786                 rc = __bnx2x_vlan_mac_execute_step(bp, p->vlan_mac_obj,
1787                                                    &p->ramrod_flags);
1788                 if (rc < 0)
1789                         return rc;
1790         }
1791
1792         /* RAMROD_COMP_WAIT is a superset of RAMROD_EXEC. If it was set
1793          * then user want to wait until the last command is done.
1794          */
1795         if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) {
1796                 /* Wait maximum for the current exe_queue length iterations plus
1797                  * one (for the current pending command).
1798                  */
1799                 int max_iterations = bnx2x_exe_queue_length(&o->exe_queue) + 1;
1800
1801                 while (!bnx2x_exe_queue_empty(&o->exe_queue) &&
1802                        max_iterations--) {
1803
1804                         /* Wait for the current command to complete */
1805                         rc = raw->wait_comp(bp, raw);
1806                         if (rc)
1807                                 return rc;
1808
1809                         /* Make a next step */
1810                         rc = __bnx2x_vlan_mac_execute_step(bp,
1811                                                            p->vlan_mac_obj,
1812                                                            &p->ramrod_flags);
1813                         if (rc < 0)
1814                                 return rc;
1815                 }
1816
1817                 return 0;
1818         }
1819
1820         return rc;
1821 }
1822
1823 /**
1824  * bnx2x_vlan_mac_del_all - delete elements with given vlan_mac_flags spec
1825  *
1826  * @bp:                 device handle
1827  * @o:
1828  * @vlan_mac_flags:
1829  * @ramrod_flags:       execution flags to be used for this deletion
1830  *
1831  * if the last operation has completed successfully and there are no
1832  * more elements left, positive value if the last operation has completed
1833  * successfully and there are more previously configured elements, negative
1834  * value is current operation has failed.
1835  */
1836 static int bnx2x_vlan_mac_del_all(struct bnx2x *bp,
1837                                   struct bnx2x_vlan_mac_obj *o,
1838                                   unsigned long *vlan_mac_flags,
1839                                   unsigned long *ramrod_flags)
1840 {
1841         struct bnx2x_vlan_mac_registry_elem *pos = NULL;
1842         struct bnx2x_vlan_mac_ramrod_params p;
1843         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1844         struct bnx2x_exeq_elem *exeq_pos, *exeq_pos_n;
1845         unsigned long flags;
1846         int read_lock;
1847         int rc = 0;
1848
1849         /* Clear pending commands first */
1850
1851         spin_lock(&exeq->lock);
1852
1853         list_for_each_entry_safe(exeq_pos, exeq_pos_n, &exeq->exe_queue, link) {
1854                 flags = exeq_pos->cmd_data.vlan_mac.vlan_mac_flags;
1855                 if (BNX2X_VLAN_MAC_CMP_FLAGS(flags) ==
1856                     BNX2X_VLAN_MAC_CMP_FLAGS(*vlan_mac_flags)) {
1857                         rc = exeq->remove(bp, exeq->owner, exeq_pos);
1858                         if (rc) {
1859                                 BNX2X_ERR("Failed to remove command\n");
1860                                 spin_unlock(&exeq->lock);
1861                                 return rc;
1862                         }
1863                         list_del(&exeq_pos->link);
1864                         bnx2x_exe_queue_free_elem(bp, exeq_pos);
1865                 }
1866         }
1867
1868         spin_unlock(&exeq->lock);
1869
1870         /* Prepare a command request */
1871         memset(&p, 0, sizeof(p));
1872         p.vlan_mac_obj = o;
1873         p.ramrod_flags = *ramrod_flags;
1874         p.user_req.cmd = BNX2X_VLAN_MAC_DEL;
1875
1876         /* Add all but the last VLAN-MAC to the execution queue without actually
1877          * execution anything.
1878          */
1879         __clear_bit(RAMROD_COMP_WAIT, &p.ramrod_flags);
1880         __clear_bit(RAMROD_EXEC, &p.ramrod_flags);
1881         __clear_bit(RAMROD_CONT, &p.ramrod_flags);
1882
1883         DP(BNX2X_MSG_SP, "vlan_mac_del_all -- taking vlan_mac_lock (reader)\n");
1884         read_lock = bnx2x_vlan_mac_h_read_lock(bp, o);
1885         if (read_lock != 0)
1886                 return read_lock;
1887
1888         list_for_each_entry(pos, &o->head, link) {
1889                 flags = pos->vlan_mac_flags;
1890                 if (BNX2X_VLAN_MAC_CMP_FLAGS(flags) ==
1891                     BNX2X_VLAN_MAC_CMP_FLAGS(*vlan_mac_flags)) {
1892                         p.user_req.vlan_mac_flags = pos->vlan_mac_flags;
1893                         memcpy(&p.user_req.u, &pos->u, sizeof(pos->u));
1894                         rc = bnx2x_config_vlan_mac(bp, &p);
1895                         if (rc < 0) {
1896                                 BNX2X_ERR("Failed to add a new DEL command\n");
1897                                 bnx2x_vlan_mac_h_read_unlock(bp, o);
1898                                 return rc;
1899                         }
1900                 }
1901         }
1902
1903         DP(BNX2X_MSG_SP, "vlan_mac_del_all -- releasing vlan_mac_lock (reader)\n");
1904         bnx2x_vlan_mac_h_read_unlock(bp, o);
1905
1906         p.ramrod_flags = *ramrod_flags;
1907         __set_bit(RAMROD_CONT, &p.ramrod_flags);
1908
1909         return bnx2x_config_vlan_mac(bp, &p);
1910 }
1911
1912 static inline void bnx2x_init_raw_obj(struct bnx2x_raw_obj *raw,
1913                                       uint8_t cl_id,
1914         uint32_t cid, uint8_t func_id, void *rdata,
1915                                       dma_addr_t rdata_mapping,
1916                                       int state,
1917         unsigned long *pstate, bnx2x_obj_type type)
1918 {
1919         raw->func_id = func_id;
1920         raw->cid = cid;
1921         raw->cl_id = cl_id;
1922         raw->rdata = rdata;
1923         raw->rdata_mapping = rdata_mapping;
1924         raw->state = state;
1925         raw->pstate = pstate;
1926         raw->obj_type = type;
1927         raw->check_pending = bnx2x_raw_check_pending;
1928         raw->clear_pending = bnx2x_raw_clear_pending;
1929         raw->set_pending = bnx2x_raw_set_pending;
1930         raw->wait_comp = bnx2x_raw_wait;
1931 }
1932
1933 static inline void bnx2x_init_vlan_mac_common(struct bnx2x_vlan_mac_obj *o,
1934         uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1935                                               dma_addr_t rdata_mapping,
1936         int state, unsigned long *pstate, bnx2x_obj_type type,
1937         struct bnx2x_credit_pool_obj *macs_pool,
1938         struct bnx2x_credit_pool_obj *vlans_pool)
1939 {
1940         INIT_LIST_HEAD(&o->head);
1941         o->head_reader = 0;
1942         o->head_exe_request = false;
1943         o->saved_ramrod_flags = 0;
1944
1945         o->macs_pool = macs_pool;
1946         o->vlans_pool = vlans_pool;
1947
1948         o->delete_all = bnx2x_vlan_mac_del_all;
1949         o->restore = bnx2x_vlan_mac_restore;
1950         o->complete = bnx2x_complete_vlan_mac;
1951         o->wait = bnx2x_wait_vlan_mac;
1952
1953         bnx2x_init_raw_obj(&o->raw, cl_id, cid, func_id, rdata, rdata_mapping,
1954                            state, pstate, type);
1955 }
1956
1957 void bnx2x_init_mac_obj(struct bnx2x *bp,
1958                         struct bnx2x_vlan_mac_obj *mac_obj,
1959                         uint8_t cl_id, uint32_t cid, uint8_t func_id,
1960                         void *rdata,
1961                         dma_addr_t rdata_mapping, int state,
1962                         unsigned long *pstate, bnx2x_obj_type type,
1963                         struct bnx2x_credit_pool_obj *macs_pool)
1964 {
1965         union bnx2x_qable_obj *qable_obj = (union bnx2x_qable_obj *)mac_obj;
1966
1967         bnx2x_init_vlan_mac_common(mac_obj, cl_id, cid, func_id, rdata,
1968                                    rdata_mapping, state, pstate, type,
1969                                    macs_pool, NULL);
1970
1971         /* CAM credit pool handling */
1972         mac_obj->get_credit = bnx2x_get_credit_mac;
1973         mac_obj->put_credit = bnx2x_put_credit_mac;
1974         mac_obj->get_cam_offset = bnx2x_get_cam_offset_mac;
1975         mac_obj->put_cam_offset = bnx2x_put_cam_offset_mac;
1976
1977         if (CHIP_IS_E1x(bp)) {
1978                 mac_obj->set_one_rule      = bnx2x_set_one_mac_e1x;
1979                 mac_obj->check_del         = bnx2x_check_mac_del;
1980                 mac_obj->check_add         = bnx2x_check_mac_add;
1981                 mac_obj->check_move        = bnx2x_check_move_always_err;
1982                 mac_obj->ramrod_cmd        = RAMROD_CMD_ID_ETH_SET_MAC;
1983
1984                 /* Exe Queue */
1985                 bnx2x_exe_queue_init(bp,
1986                                      &mac_obj->exe_queue, 1, qable_obj,
1987                                      bnx2x_validate_vlan_mac,
1988                                      bnx2x_remove_vlan_mac,
1989                                      bnx2x_optimize_vlan_mac,
1990                                      bnx2x_execute_vlan_mac,
1991                                      bnx2x_exeq_get_mac);
1992         } else {
1993                 mac_obj->set_one_rule      = bnx2x_set_one_mac_e2;
1994                 mac_obj->check_del         = bnx2x_check_mac_del;
1995                 mac_obj->check_add         = bnx2x_check_mac_add;
1996                 mac_obj->check_move        = bnx2x_check_move;
1997                 mac_obj->ramrod_cmd        =
1998                         RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES;
1999                 mac_obj->get_n_elements    = bnx2x_get_n_elements;
2000
2001                 /* Exe Queue */
2002                 bnx2x_exe_queue_init(bp,
2003                                      &mac_obj->exe_queue, CLASSIFY_RULES_COUNT,
2004                                      qable_obj, bnx2x_validate_vlan_mac,
2005                                      bnx2x_remove_vlan_mac,
2006                                      bnx2x_optimize_vlan_mac,
2007                                      bnx2x_execute_vlan_mac,
2008                                      bnx2x_exeq_get_mac);
2009         }
2010 }
2011
2012 void bnx2x_init_vlan_obj(struct bnx2x *bp,
2013                          struct bnx2x_vlan_mac_obj *vlan_obj,
2014                          uint8_t cl_id, uint32_t cid, uint8_t func_id,
2015                          void *rdata,
2016                          dma_addr_t rdata_mapping, int state,
2017                          unsigned long *pstate, bnx2x_obj_type type,
2018                          struct bnx2x_credit_pool_obj *vlans_pool)
2019 {
2020         union bnx2x_qable_obj *qable_obj = (union bnx2x_qable_obj *)vlan_obj;
2021
2022         bnx2x_init_vlan_mac_common(vlan_obj, cl_id, cid, func_id, rdata,
2023                                    rdata_mapping, state, pstate, type, NULL,
2024                                    vlans_pool);
2025
2026         vlan_obj->get_credit = bnx2x_get_credit_vlan;
2027         vlan_obj->put_credit = bnx2x_put_credit_vlan;
2028         vlan_obj->get_cam_offset = bnx2x_get_cam_offset_vlan;
2029         vlan_obj->put_cam_offset = bnx2x_put_cam_offset_vlan;
2030
2031         if (CHIP_IS_E1x(bp)) {
2032                 BNX2X_ERR("Do not support chips others than E2 and newer\n");
2033                 panic("BUG");
2034         } else {
2035                 vlan_obj->set_one_rule      = bnx2x_set_one_vlan_e2;
2036                 vlan_obj->check_del         = bnx2x_check_vlan_del;
2037                 vlan_obj->check_add         = bnx2x_check_vlan_add;
2038                 vlan_obj->check_move        = bnx2x_check_move;
2039                 vlan_obj->ramrod_cmd        =
2040                         RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES;
2041                 vlan_obj->get_n_elements    = bnx2x_get_n_elements;
2042
2043                 /* Exe Queue */
2044                 bnx2x_exe_queue_init(bp,
2045                                      &vlan_obj->exe_queue, CLASSIFY_RULES_COUNT,
2046                                      qable_obj, bnx2x_validate_vlan_mac,
2047                                      bnx2x_remove_vlan_mac,
2048                                      bnx2x_optimize_vlan_mac,
2049                                      bnx2x_execute_vlan_mac,
2050                                      bnx2x_exeq_get_vlan);
2051         }
2052 }
2053
2054 /* RX_MODE verbs: DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
2055 static inline void __storm_memset_mac_filters(struct bnx2x *bp,
2056                         struct tstorm_eth_mac_filter_config *mac_filters,
2057                         uint16_t pf_id)
2058 {
2059         size_t size = sizeof(struct tstorm_eth_mac_filter_config);
2060
2061         uint32_t addr = BAR_TSTRORM_INTMEM +
2062                         TSTORM_MAC_FILTER_CONFIG_OFFSET(pf_id);
2063
2064         __storm_memset_struct(bp, addr, size, (uint32_t *)mac_filters);
2065 }
2066
2067 static int bnx2x_set_rx_mode_e1x(struct bnx2x *bp,
2068                                  struct bnx2x_rx_mode_ramrod_params *p)
2069 {
2070         /* update the bp MAC filter structure */
2071         uint32_t mask = (1 << p->cl_id);
2072
2073         struct tstorm_eth_mac_filter_config *mac_filters =
2074                 (struct tstorm_eth_mac_filter_config *)p->rdata;
2075
2076         /* initial setting is drop-all */
2077         uint8_t drop_all_ucast = 1, drop_all_mcast = 1;
2078         uint8_t accp_all_ucast = 0, accp_all_bcast = 0, accp_all_mcast = 0;
2079         uint8_t unmatched_unicast = 0;
2080
2081     /* In e1x there we only take into account rx accept flag since tx switching
2082      * isn't enabled. */
2083         if (test_bit(BNX2X_ACCEPT_UNICAST, &p->rx_accept_flags))
2084                 /* accept matched ucast */
2085                 drop_all_ucast = 0;
2086
2087         if (test_bit(BNX2X_ACCEPT_MULTICAST, &p->rx_accept_flags))
2088                 /* accept matched mcast */
2089                 drop_all_mcast = 0;
2090
2091         if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, &p->rx_accept_flags)) {
2092                 /* accept all mcast */
2093                 drop_all_ucast = 0;
2094                 accp_all_ucast = 1;
2095         }
2096         if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, &p->rx_accept_flags)) {
2097                 /* accept all mcast */
2098                 drop_all_mcast = 0;
2099                 accp_all_mcast = 1;
2100         }
2101         if (test_bit(BNX2X_ACCEPT_BROADCAST, &p->rx_accept_flags))
2102                 /* accept (all) bcast */
2103                 accp_all_bcast = 1;
2104         if (test_bit(BNX2X_ACCEPT_UNMATCHED, &p->rx_accept_flags))
2105                 /* accept unmatched unicasts */
2106                 unmatched_unicast = 1;
2107
2108         mac_filters->ucast_drop_all = drop_all_ucast ?
2109                 mac_filters->ucast_drop_all | mask :
2110                 mac_filters->ucast_drop_all & ~mask;
2111
2112         mac_filters->mcast_drop_all = drop_all_mcast ?
2113                 mac_filters->mcast_drop_all | mask :
2114                 mac_filters->mcast_drop_all & ~mask;
2115
2116         mac_filters->ucast_accept_all = accp_all_ucast ?
2117                 mac_filters->ucast_accept_all | mask :
2118                 mac_filters->ucast_accept_all & ~mask;
2119
2120         mac_filters->mcast_accept_all = accp_all_mcast ?
2121                 mac_filters->mcast_accept_all | mask :
2122                 mac_filters->mcast_accept_all & ~mask;
2123
2124         mac_filters->bcast_accept_all = accp_all_bcast ?
2125                 mac_filters->bcast_accept_all | mask :
2126                 mac_filters->bcast_accept_all & ~mask;
2127
2128         mac_filters->unmatched_unicast = unmatched_unicast ?
2129                 mac_filters->unmatched_unicast | mask :
2130                 mac_filters->unmatched_unicast & ~mask;
2131
2132         DP(BNX2X_MSG_SP, "drop_ucast 0x%x\ndrop_mcast 0x%x\n accp_ucast 0x%x\n"
2133                          "accp_mcast 0x%x\naccp_bcast 0x%x\n",
2134            mac_filters->ucast_drop_all, mac_filters->mcast_drop_all,
2135            mac_filters->ucast_accept_all, mac_filters->mcast_accept_all,
2136            mac_filters->bcast_accept_all);
2137
2138         /* write the MAC filter structure*/
2139         __storm_memset_mac_filters(bp, mac_filters, p->func_id);
2140
2141         /* The operation is completed */
2142         clear_bit(p->state, p->pstate);
2143         cmb();
2144
2145         return 0;
2146 }
2147
2148 /* Setup ramrod data */
2149 static inline void bnx2x_rx_mode_set_rdata_hdr_e2(uint32_t cid,
2150                                 struct eth_classify_header *hdr,
2151                                 uint8_t rule_cnt)
2152 {
2153         hdr->echo = cpu_to_le32(cid);
2154         hdr->rule_cnt = rule_cnt;
2155 }
2156
2157 static inline void bnx2x_rx_mode_set_cmd_state_e2(struct bnx2x *bp,
2158                                 unsigned long *accept_flags,
2159                                 struct eth_filter_rules_cmd *cmd,
2160                                 bool clear_accept_all)
2161 {
2162         uint16_t state;
2163
2164         /* start with 'drop-all' */
2165         state = ETH_FILTER_RULES_CMD_UCAST_DROP_ALL |
2166                 ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2167
2168         if (test_bit(BNX2X_ACCEPT_UNICAST, accept_flags))
2169                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2170
2171         if (test_bit(BNX2X_ACCEPT_MULTICAST, accept_flags))
2172                 state &= ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2173
2174         if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, accept_flags)) {
2175                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2176                 state |= ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL;
2177         }
2178
2179         if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, accept_flags)) {
2180                 state |= ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL;
2181                 state &= ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2182         }
2183
2184         if (test_bit(BNX2X_ACCEPT_BROADCAST, accept_flags))
2185                 state |= ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL;
2186
2187         if (test_bit(BNX2X_ACCEPT_UNMATCHED, accept_flags)) {
2188                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2189                 state |= ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED;
2190         }
2191
2192         if (test_bit(BNX2X_ACCEPT_ANY_VLAN, accept_flags))
2193                 state |= ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN;
2194
2195         /* Clear ACCEPT_ALL_XXX flags for FCoE L2 Queue */
2196         if (clear_accept_all) {
2197                 state &= ~ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL;
2198                 state &= ~ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL;
2199                 state &= ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL;
2200                 state &= ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED;
2201         }
2202
2203         cmd->state = cpu_to_le16(state);
2204 }
2205
2206 static int bnx2x_set_rx_mode_e2(struct bnx2x *bp,
2207                                 struct bnx2x_rx_mode_ramrod_params *p)
2208 {
2209         struct eth_filter_rules_ramrod_data *data = p->rdata;
2210         int rc;
2211         uint8_t rule_idx = 0;
2212
2213         /* Reset the ramrod data buffer */
2214         memset(data, 0, sizeof(*data));
2215
2216         /* Setup ramrod data */
2217
2218         /* Tx (internal switching) */
2219         if (test_bit(RAMROD_TX, &p->ramrod_flags)) {
2220                 data->rules[rule_idx].client_id = p->cl_id;
2221                 data->rules[rule_idx].func_id = p->func_id;
2222
2223                 data->rules[rule_idx].cmd_general_data =
2224                         ETH_FILTER_RULES_CMD_TX_CMD;
2225
2226                 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags,
2227                                                &(data->rules[rule_idx++]),
2228                                                false);
2229         }
2230
2231         /* Rx */
2232         if (test_bit(RAMROD_RX, &p->ramrod_flags)) {
2233                 data->rules[rule_idx].client_id = p->cl_id;
2234                 data->rules[rule_idx].func_id = p->func_id;
2235
2236                 data->rules[rule_idx].cmd_general_data =
2237                         ETH_FILTER_RULES_CMD_RX_CMD;
2238
2239                 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags,
2240                                                &(data->rules[rule_idx++]),
2241                                                false);
2242         }
2243
2244         /* If FCoE Queue configuration has been requested configure the Rx and
2245          * internal switching modes for this queue in separate rules.
2246          *
2247          * FCoE queue shell never be set to ACCEPT_ALL packets of any sort:
2248          * MCAST_ALL, UCAST_ALL, BCAST_ALL and UNMATCHED.
2249          */
2250         if (test_bit(BNX2X_RX_MODE_FCOE_ETH, &p->rx_mode_flags)) {
2251                 /*  Tx (internal switching) */
2252                 if (test_bit(RAMROD_TX, &p->ramrod_flags)) {
2253                         data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id);
2254                         data->rules[rule_idx].func_id = p->func_id;
2255
2256                         data->rules[rule_idx].cmd_general_data =
2257                                                 ETH_FILTER_RULES_CMD_TX_CMD;
2258
2259                         bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags,
2260                                                        &(data->rules[rule_idx]),
2261                                                        true);
2262                         rule_idx++;
2263                 }
2264
2265                 /* Rx */
2266                 if (test_bit(RAMROD_RX, &p->ramrod_flags)) {
2267                         data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id);
2268                         data->rules[rule_idx].func_id = p->func_id;
2269
2270                         data->rules[rule_idx].cmd_general_data =
2271                                                 ETH_FILTER_RULES_CMD_RX_CMD;
2272
2273                         bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags,
2274                                                        &(data->rules[rule_idx]),
2275                                                        true);
2276                         rule_idx++;
2277                 }
2278         }
2279
2280         /* Set the ramrod header (most importantly - number of rules to
2281          * configure).
2282          */
2283         bnx2x_rx_mode_set_rdata_hdr_e2(p->cid, &data->header, rule_idx);
2284
2285         DP(BNX2X_MSG_SP, "About to configure %d rules, rx_accept_flags 0x%lx, tx_accept_flags 0x%lx\n",
2286                          data->header.rule_cnt, p->rx_accept_flags,
2287                          p->tx_accept_flags);
2288
2289         /* No need for an explicit memory barrier here as long as we
2290          * ensure the ordering of writing to the SPQ element
2291          * and updating of the SPQ producer which involves a memory
2292          * read. If the memory read is removed we will have to put a
2293          * full memory barrier there (inside bnx2x_sp_post()).
2294          */
2295
2296         /* Send a ramrod */
2297         rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_FILTER_RULES, p->cid,
2298                            U64_HI(p->rdata_mapping),
2299                            U64_LO(p->rdata_mapping),
2300                            ETH_CONNECTION_TYPE);
2301         if (rc)
2302                 return rc;
2303
2304         /* Ramrod completion is pending */
2305         return 1;
2306 }
2307
2308 static int bnx2x_wait_rx_mode_comp_e2(struct bnx2x *bp,
2309                                       struct bnx2x_rx_mode_ramrod_params *p)
2310 {
2311         return bnx2x_state_wait(bp, p->state, p->pstate);
2312 }
2313
2314 static int bnx2x_empty_rx_mode_wait(struct bnx2x *bp,
2315                                     struct bnx2x_rx_mode_ramrod_params *p)
2316 {
2317         /* Do nothing */
2318         return 0;
2319 }
2320
2321 int bnx2x_config_rx_mode(struct bnx2x *bp,
2322                          struct bnx2x_rx_mode_ramrod_params *p)
2323 {
2324         int rc;
2325
2326         /* Configure the new classification in the chip */
2327         rc = p->rx_mode_obj->config_rx_mode(bp, p);
2328         if (rc < 0)
2329                 return rc;
2330
2331         /* Wait for a ramrod completion if was requested */
2332         if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) {
2333                 rc = p->rx_mode_obj->wait_comp(bp, p);
2334                 if (rc)
2335                         return rc;
2336         }
2337
2338         return rc;
2339 }
2340
2341 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
2342                             struct bnx2x_rx_mode_obj *o)
2343 {
2344         if (CHIP_IS_E1x(bp)) {
2345                 o->wait_comp      = bnx2x_empty_rx_mode_wait;
2346                 o->config_rx_mode = bnx2x_set_rx_mode_e1x;
2347         } else {
2348                 o->wait_comp      = bnx2x_wait_rx_mode_comp_e2;
2349                 o->config_rx_mode = bnx2x_set_rx_mode_e2;
2350         }
2351 }
2352
2353 /********************* Multicast verbs: SET, CLEAR ****************************/
2354 static inline uint8_t bnx2x_mcast_bin_from_mac(uint8_t *mac)
2355 {
2356 panic("Not implemented");
2357 #if 0 // AKAROS_PORT
2358         return (crc32c_le(0, mac, Eaddrlen) >> 24) & 0xff;
2359 #endif
2360 }
2361
2362 struct bnx2x_mcast_mac_elem {
2363         struct list_head link;
2364         uint8_t mac[Eaddrlen];
2365         uint8_t pad[2]; /* For a natural alignment of the following buffer */
2366 };
2367
2368 struct bnx2x_pending_mcast_cmd {
2369         struct list_head link;
2370         int type; /* BNX2X_MCAST_CMD_X */
2371         union {
2372                 struct list_head macs_head;
2373                 uint32_t macs_num; /* Needed for DEL command */
2374                 int next_bin; /* Needed for RESTORE flow with aprox match */
2375         } data;
2376
2377         bool done; /* set to true, when the command has been handled,
2378                     * practically used in 57712 handling only, where one pending
2379                     * command may be handled in a few operations. As long as for
2380                     * other chips every operation handling is completed in a
2381                     * single ramrod, there is no need to utilize this field.
2382                     */
2383 };
2384
2385 static int bnx2x_mcast_wait(struct bnx2x *bp,
2386                             struct bnx2x_mcast_obj *o)
2387 {
2388         if (bnx2x_state_wait(bp, o->sched_state, o->raw.pstate) ||
2389                         o->raw.wait_comp(bp, &o->raw))
2390                 return -EBUSY;
2391
2392         return 0;
2393 }
2394
2395 static int bnx2x_mcast_enqueue_cmd(struct bnx2x *bp,
2396                                    struct bnx2x_mcast_obj *o,
2397                                    struct bnx2x_mcast_ramrod_params *p,
2398                                    enum bnx2x_mcast_cmd cmd)
2399 {
2400         int total_sz;
2401         struct bnx2x_pending_mcast_cmd *new_cmd;
2402         struct bnx2x_mcast_mac_elem *cur_mac = NULL;
2403         struct bnx2x_mcast_list_elem *pos;
2404         int macs_list_len = ((cmd == BNX2X_MCAST_CMD_ADD) ?
2405                              p->mcast_list_len : 0);
2406
2407         /* If the command is empty ("handle pending commands only"), break */
2408         if (!p->mcast_list_len)
2409                 return 0;
2410
2411         total_sz = sizeof(*new_cmd) +
2412                 macs_list_len * sizeof(struct bnx2x_mcast_mac_elem);
2413
2414         /* Add mcast is called under spin_lock, thus calling with GFP_ATOMIC */
2415         new_cmd = kzmalloc(total_sz, 0);
2416
2417         if (!new_cmd)
2418                 return -ENOMEM;
2419
2420         DP(BNX2X_MSG_SP, "About to enqueue a new %d command. macs_list_len=%d\n",
2421            cmd, macs_list_len);
2422
2423         INIT_LIST_HEAD(&new_cmd->data.macs_head);
2424
2425         new_cmd->type = cmd;
2426         new_cmd->done = false;
2427
2428         switch (cmd) {
2429         case BNX2X_MCAST_CMD_ADD:
2430                 cur_mac = (struct bnx2x_mcast_mac_elem *)
2431                           ((uint8_t *)new_cmd + sizeof(*new_cmd));
2432
2433                 /* Push the MACs of the current command into the pending command
2434                  * MACs list: FIFO
2435                  */
2436                 list_for_each_entry(pos, &p->mcast_list, link) {
2437                         memcpy(cur_mac->mac, pos->mac, Eaddrlen);
2438                         list_add_tail(&cur_mac->link, &new_cmd->data.macs_head);
2439                         cur_mac++;
2440                 }
2441
2442                 break;
2443
2444         case BNX2X_MCAST_CMD_DEL:
2445                 new_cmd->data.macs_num = p->mcast_list_len;
2446                 break;
2447
2448         case BNX2X_MCAST_CMD_RESTORE:
2449                 new_cmd->data.next_bin = 0;
2450                 break;
2451
2452         default:
2453                 kfree(new_cmd);
2454                 BNX2X_ERR("Unknown command: %d\n", cmd);
2455                 return -EINVAL;
2456         }
2457
2458         /* Push the new pending command to the tail of the pending list: FIFO */
2459         list_add_tail(&new_cmd->link, &o->pending_cmds_head);
2460
2461         o->set_sched(o);
2462
2463         return 1;
2464 }
2465
2466 /**
2467  * bnx2x_mcast_get_next_bin - get the next set bin (index)
2468  *
2469  * @o:
2470  * @last:       index to start looking from (including)
2471  *
2472  * returns the next found (set) bin or a negative value if none is found.
2473  */
2474 static inline int bnx2x_mcast_get_next_bin(struct bnx2x_mcast_obj *o, int last)
2475 {
2476         int i, j, inner_start = last % BIT_VEC64_ELEM_SZ;
2477
2478         for (i = last / BIT_VEC64_ELEM_SZ; i < BNX2X_MCAST_VEC_SZ; i++) {
2479                 if (o->registry.aprox_match.vec[i])
2480                         for (j = inner_start; j < BIT_VEC64_ELEM_SZ; j++) {
2481                                 int cur_bit = j + BIT_VEC64_ELEM_SZ * i;
2482                                 if (BIT_VEC64_TEST_BIT(o->registry.aprox_match.
2483                                                        vec, cur_bit)) {
2484                                         return cur_bit;
2485                                 }
2486                         }
2487                 inner_start = 0;
2488         }
2489
2490         /* None found */
2491         return -1;
2492 }
2493
2494 /**
2495  * bnx2x_mcast_clear_first_bin - find the first set bin and clear it
2496  *
2497  * @o:
2498  *
2499  * returns the index of the found bin or -1 if none is found
2500  */
2501 static inline int bnx2x_mcast_clear_first_bin(struct bnx2x_mcast_obj *o)
2502 {
2503         int cur_bit = bnx2x_mcast_get_next_bin(o, 0);
2504
2505         if (cur_bit >= 0)
2506                 BIT_VEC64_CLEAR_BIT(o->registry.aprox_match.vec, cur_bit);
2507
2508         return cur_bit;
2509 }
2510
2511 static inline uint8_t bnx2x_mcast_get_rx_tx_flag(struct bnx2x_mcast_obj *o)
2512 {
2513         struct bnx2x_raw_obj *raw = &o->raw;
2514         uint8_t rx_tx_flag = 0;
2515
2516         if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) ||
2517             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
2518                 rx_tx_flag |= ETH_MULTICAST_RULES_CMD_TX_CMD;
2519
2520         if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) ||
2521             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
2522                 rx_tx_flag |= ETH_MULTICAST_RULES_CMD_RX_CMD;
2523
2524         return rx_tx_flag;
2525 }
2526
2527 static void bnx2x_mcast_set_one_rule_e2(struct bnx2x *bp,
2528                                         struct bnx2x_mcast_obj *o, int idx,
2529                                         union bnx2x_mcast_config_data *cfg_data,
2530                                         enum bnx2x_mcast_cmd cmd)
2531 {
2532         struct bnx2x_raw_obj *r = &o->raw;
2533         struct eth_multicast_rules_ramrod_data *data =
2534                 (struct eth_multicast_rules_ramrod_data *)(r->rdata);
2535         uint8_t func_id = r->func_id;
2536         uint8_t rx_tx_add_flag = bnx2x_mcast_get_rx_tx_flag(o);
2537         int bin;
2538
2539         if ((cmd == BNX2X_MCAST_CMD_ADD) || (cmd == BNX2X_MCAST_CMD_RESTORE))
2540                 rx_tx_add_flag |= ETH_MULTICAST_RULES_CMD_IS_ADD;
2541
2542         data->rules[idx].cmd_general_data |= rx_tx_add_flag;
2543
2544         /* Get a bin and update a bins' vector */
2545         switch (cmd) {
2546         case BNX2X_MCAST_CMD_ADD:
2547                 bin = bnx2x_mcast_bin_from_mac(cfg_data->mac);
2548                 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec, bin);
2549                 break;
2550
2551         case BNX2X_MCAST_CMD_DEL:
2552                 /* If there were no more bins to clear
2553                  * (bnx2x_mcast_clear_first_bin() returns -1) then we would
2554                  * clear any (0xff) bin.
2555                  * See bnx2x_mcast_validate_e2() for explanation when it may
2556                  * happen.
2557                  */
2558                 bin = bnx2x_mcast_clear_first_bin(o);
2559                 break;
2560
2561         case BNX2X_MCAST_CMD_RESTORE:
2562                 bin = cfg_data->bin;
2563                 break;
2564
2565         default:
2566                 BNX2X_ERR("Unknown command: %d\n", cmd);
2567                 return;
2568         }
2569
2570         DP(BNX2X_MSG_SP, "%s bin %d\n",
2571                          ((rx_tx_add_flag & ETH_MULTICAST_RULES_CMD_IS_ADD) ?
2572                          "Setting"  : "Clearing"), bin);
2573
2574         data->rules[idx].bin_id    = (uint8_t)bin;
2575         data->rules[idx].func_id   = func_id;
2576         data->rules[idx].engine_id = o->engine_id;
2577 }
2578
2579 /**
2580  * bnx2x_mcast_handle_restore_cmd_e2 - restore configuration from the registry
2581  *
2582  * @bp:         device handle
2583  * @o:
2584  * @start_bin:  index in the registry to start from (including)
2585  * @rdata_idx:  index in the ramrod data to start from
2586  *
2587  * returns last handled bin index or -1 if all bins have been handled
2588  */
2589 static inline int bnx2x_mcast_handle_restore_cmd_e2(
2590         struct bnx2x *bp, struct bnx2x_mcast_obj *o , int start_bin,
2591         int *rdata_idx)
2592 {
2593         int cur_bin, cnt = *rdata_idx;
2594         union bnx2x_mcast_config_data cfg_data = {NULL};
2595
2596         /* go through the registry and configure the bins from it */
2597         for (cur_bin = bnx2x_mcast_get_next_bin(o, start_bin); cur_bin >= 0;
2598             cur_bin = bnx2x_mcast_get_next_bin(o, cur_bin + 1)) {
2599
2600                 cfg_data.bin = (uint8_t)cur_bin;
2601                 o->set_one_rule(bp, o, cnt, &cfg_data,
2602                                 BNX2X_MCAST_CMD_RESTORE);
2603
2604                 cnt++;
2605
2606                 DP(BNX2X_MSG_SP, "About to configure a bin %d\n", cur_bin);
2607
2608                 /* Break if we reached the maximum number
2609                  * of rules.
2610                  */
2611                 if (cnt >= o->max_cmd_len)
2612                         break;
2613         }
2614
2615         *rdata_idx = cnt;
2616
2617         return cur_bin;
2618 }
2619
2620 static inline void bnx2x_mcast_hdl_pending_add_e2(struct bnx2x *bp,
2621         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2622         int *line_idx)
2623 {
2624         struct bnx2x_mcast_mac_elem *pmac_pos, *pmac_pos_n;
2625         int cnt = *line_idx;
2626         union bnx2x_mcast_config_data cfg_data = {NULL};
2627
2628         list_for_each_entry_safe(pmac_pos, pmac_pos_n, &cmd_pos->data.macs_head,
2629                                  link) {
2630
2631                 cfg_data.mac = &pmac_pos->mac[0];
2632                 o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type);
2633
2634                 cnt++;
2635
2636                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n",
2637                    pmac_pos->mac);
2638
2639                 list_del(&pmac_pos->link);
2640
2641                 /* Break if we reached the maximum number
2642                  * of rules.
2643                  */
2644                 if (cnt >= o->max_cmd_len)
2645                         break;
2646         }
2647
2648         *line_idx = cnt;
2649
2650         /* if no more MACs to configure - we are done */
2651         if (list_empty(&cmd_pos->data.macs_head))
2652                 cmd_pos->done = true;
2653 }
2654
2655 static inline void bnx2x_mcast_hdl_pending_del_e2(struct bnx2x *bp,
2656         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2657         int *line_idx)
2658 {
2659         int cnt = *line_idx;
2660
2661         while (cmd_pos->data.macs_num) {
2662                 o->set_one_rule(bp, o, cnt, NULL, cmd_pos->type);
2663
2664                 cnt++;
2665
2666                 cmd_pos->data.macs_num--;
2667
2668                   DP(BNX2X_MSG_SP, "Deleting MAC. %d left,cnt is %d\n",
2669                                    cmd_pos->data.macs_num, cnt);
2670
2671                 /* Break if we reached the maximum
2672                  * number of rules.
2673                  */
2674                 if (cnt >= o->max_cmd_len)
2675                         break;
2676         }
2677
2678         *line_idx = cnt;
2679
2680         /* If we cleared all bins - we are done */
2681         if (!cmd_pos->data.macs_num)
2682                 cmd_pos->done = true;
2683 }
2684
2685 static inline void bnx2x_mcast_hdl_pending_restore_e2(struct bnx2x *bp,
2686         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2687         int *line_idx)
2688 {
2689         cmd_pos->data.next_bin = o->hdl_restore(bp, o, cmd_pos->data.next_bin,
2690                                                 line_idx);
2691
2692         if (cmd_pos->data.next_bin < 0)
2693                 /* If o->set_restore returned -1 we are done */
2694                 cmd_pos->done = true;
2695         else
2696                 /* Start from the next bin next time */
2697                 cmd_pos->data.next_bin++;
2698 }
2699
2700 static inline int bnx2x_mcast_handle_pending_cmds_e2(struct bnx2x *bp,
2701                                 struct bnx2x_mcast_ramrod_params *p)
2702 {
2703         struct bnx2x_pending_mcast_cmd *cmd_pos, *cmd_pos_n;
2704         int cnt = 0;
2705         struct bnx2x_mcast_obj *o = p->mcast_obj;
2706
2707         list_for_each_entry_safe(cmd_pos, cmd_pos_n, &o->pending_cmds_head,
2708                                  link) {
2709                 switch (cmd_pos->type) {
2710                 case BNX2X_MCAST_CMD_ADD:
2711                         bnx2x_mcast_hdl_pending_add_e2(bp, o, cmd_pos, &cnt);
2712                         break;
2713
2714                 case BNX2X_MCAST_CMD_DEL:
2715                         bnx2x_mcast_hdl_pending_del_e2(bp, o, cmd_pos, &cnt);
2716                         break;
2717
2718                 case BNX2X_MCAST_CMD_RESTORE:
2719                         bnx2x_mcast_hdl_pending_restore_e2(bp, o, cmd_pos,
2720                                                            &cnt);
2721                         break;
2722
2723                 default:
2724                         BNX2X_ERR("Unknown command: %d\n", cmd_pos->type);
2725                         return -EINVAL;
2726                 }
2727
2728                 /* If the command has been completed - remove it from the list
2729                  * and free the memory
2730                  */
2731                 if (cmd_pos->done) {
2732                         list_del(&cmd_pos->link);
2733                         kfree(cmd_pos);
2734                 }
2735
2736                 /* Break if we reached the maximum number of rules */
2737                 if (cnt >= o->max_cmd_len)
2738                         break;
2739         }
2740
2741         return cnt;
2742 }
2743
2744 static inline void bnx2x_mcast_hdl_add(struct bnx2x *bp,
2745         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
2746         int *line_idx)
2747 {
2748         struct bnx2x_mcast_list_elem *mlist_pos;
2749         union bnx2x_mcast_config_data cfg_data = {NULL};
2750         int cnt = *line_idx;
2751
2752         list_for_each_entry(mlist_pos, &p->mcast_list, link) {
2753                 cfg_data.mac = mlist_pos->mac;
2754                 o->set_one_rule(bp, o, cnt, &cfg_data, BNX2X_MCAST_CMD_ADD);
2755
2756                 cnt++;
2757
2758                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n",
2759                    mlist_pos->mac);
2760         }
2761
2762         *line_idx = cnt;
2763 }
2764
2765 static inline void bnx2x_mcast_hdl_del(struct bnx2x *bp,
2766         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
2767         int *line_idx)
2768 {
2769         int cnt = *line_idx, i;
2770
2771         for (i = 0; i < p->mcast_list_len; i++) {
2772                 o->set_one_rule(bp, o, cnt, NULL, BNX2X_MCAST_CMD_DEL);
2773
2774                 cnt++;
2775
2776                 DP(BNX2X_MSG_SP, "Deleting MAC. %d left\n",
2777                                  p->mcast_list_len - i - 1);
2778         }
2779
2780         *line_idx = cnt;
2781 }
2782
2783 /**
2784  * bnx2x_mcast_handle_current_cmd -
2785  *
2786  * @bp:         device handle
2787  * @p:
2788  * @cmd:
2789  * @start_cnt:  first line in the ramrod data that may be used
2790  *
2791  * This function is called iff there is enough place for the current command in
2792  * the ramrod data.
2793  * Returns number of lines filled in the ramrod data in total.
2794  */
2795 static inline int bnx2x_mcast_handle_current_cmd(struct bnx2x *bp,
2796                         struct bnx2x_mcast_ramrod_params *p,
2797                         enum bnx2x_mcast_cmd cmd,
2798                         int start_cnt)
2799 {
2800         struct bnx2x_mcast_obj *o = p->mcast_obj;
2801         int cnt = start_cnt;
2802
2803         DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len);
2804
2805         switch (cmd) {
2806         case BNX2X_MCAST_CMD_ADD:
2807                 bnx2x_mcast_hdl_add(bp, o, p, &cnt);
2808                 break;
2809
2810         case BNX2X_MCAST_CMD_DEL:
2811                 bnx2x_mcast_hdl_del(bp, o, p, &cnt);
2812                 break;
2813
2814         case BNX2X_MCAST_CMD_RESTORE:
2815                 o->hdl_restore(bp, o, 0, &cnt);
2816                 break;
2817
2818         default:
2819                 BNX2X_ERR("Unknown command: %d\n", cmd);
2820                 return -EINVAL;
2821         }
2822
2823         /* The current command has been handled */
2824         p->mcast_list_len = 0;
2825
2826         return cnt;
2827 }
2828
2829 static int bnx2x_mcast_validate_e2(struct bnx2x *bp,
2830                                    struct bnx2x_mcast_ramrod_params *p,
2831                                    enum bnx2x_mcast_cmd cmd)
2832 {
2833         struct bnx2x_mcast_obj *o = p->mcast_obj;
2834         int reg_sz = o->get_registry_size(o);
2835
2836         switch (cmd) {
2837         /* DEL command deletes all currently configured MACs */
2838         case BNX2X_MCAST_CMD_DEL:
2839                 o->set_registry_size(o, 0);
2840                 /* Don't break */
2841
2842         /* RESTORE command will restore the entire multicast configuration */
2843         case BNX2X_MCAST_CMD_RESTORE:
2844                 /* Here we set the approximate amount of work to do, which in
2845                  * fact may be only less as some MACs in postponed ADD
2846                  * command(s) scheduled before this command may fall into
2847                  * the same bin and the actual number of bins set in the
2848                  * registry would be less than we estimated here. See
2849                  * bnx2x_mcast_set_one_rule_e2() for further details.
2850                  */
2851                 p->mcast_list_len = reg_sz;
2852                 break;
2853
2854         case BNX2X_MCAST_CMD_ADD:
2855         case BNX2X_MCAST_CMD_CONT:
2856                 /* Here we assume that all new MACs will fall into new bins.
2857                  * However we will correct the real registry size after we
2858                  * handle all pending commands.
2859                  */
2860                 o->set_registry_size(o, reg_sz + p->mcast_list_len);
2861                 break;
2862
2863         default:
2864                 BNX2X_ERR("Unknown command: %d\n", cmd);
2865                 return -EINVAL;
2866         }
2867
2868         /* Increase the total number of MACs pending to be configured */
2869         o->total_pending_num += p->mcast_list_len;
2870
2871         return 0;
2872 }
2873
2874 static void bnx2x_mcast_revert_e2(struct bnx2x *bp,
2875                                       struct bnx2x_mcast_ramrod_params *p,
2876                                       int old_num_bins)
2877 {
2878         struct bnx2x_mcast_obj *o = p->mcast_obj;
2879
2880         o->set_registry_size(o, old_num_bins);
2881         o->total_pending_num -= p->mcast_list_len;
2882 }
2883
2884 /**
2885  * bnx2x_mcast_set_rdata_hdr_e2 - sets a header values
2886  *
2887  * @bp:         device handle
2888  * @p:
2889  * @len:        number of rules to handle
2890  */
2891 static inline void bnx2x_mcast_set_rdata_hdr_e2(struct bnx2x *bp,
2892                                         struct bnx2x_mcast_ramrod_params *p,
2893                                         uint8_t len)
2894 {
2895         struct bnx2x_raw_obj *r = &p->mcast_obj->raw;
2896         struct eth_multicast_rules_ramrod_data *data =
2897                 (struct eth_multicast_rules_ramrod_data *)(r->rdata);
2898
2899         data->header.echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) |
2900                                         (BNX2X_FILTER_MCAST_PENDING <<
2901                                          BNX2X_SWCID_SHIFT));
2902         data->header.rule_cnt = len;
2903 }
2904
2905 /**
2906  * bnx2x_mcast_refresh_registry_e2 - recalculate the actual number of set bins
2907  *
2908  * @bp:         device handle
2909  * @o:
2910  *
2911  * Recalculate the actual number of set bins in the registry using Brian
2912  * Kernighan's algorithm: it's execution complexity is as a number of set bins.
2913  *
2914  * returns 0 for the compliance with bnx2x_mcast_refresh_registry_e1().
2915  */
2916 static inline int bnx2x_mcast_refresh_registry_e2(struct bnx2x *bp,
2917                                                   struct bnx2x_mcast_obj *o)
2918 {
2919         int i, cnt = 0;
2920         uint64_t elem;
2921
2922         for (i = 0; i < BNX2X_MCAST_VEC_SZ; i++) {
2923                 elem = o->registry.aprox_match.vec[i];
2924                 for (; elem; cnt++)
2925                         elem &= elem - 1;
2926         }
2927
2928         o->set_registry_size(o, cnt);
2929
2930         return 0;
2931 }
2932
2933 static int bnx2x_mcast_setup_e2(struct bnx2x *bp,
2934                                 struct bnx2x_mcast_ramrod_params *p,
2935                                 enum bnx2x_mcast_cmd cmd)
2936 {
2937         struct bnx2x_raw_obj *raw = &p->mcast_obj->raw;
2938         struct bnx2x_mcast_obj *o = p->mcast_obj;
2939         struct eth_multicast_rules_ramrod_data *data =
2940                 (struct eth_multicast_rules_ramrod_data *)(raw->rdata);
2941         int cnt = 0, rc;
2942
2943         /* Reset the ramrod data buffer */
2944         memset(data, 0, sizeof(*data));
2945
2946         cnt = bnx2x_mcast_handle_pending_cmds_e2(bp, p);
2947
2948         /* If there are no more pending commands - clear SCHEDULED state */
2949         if (list_empty(&o->pending_cmds_head))
2950                 o->clear_sched(o);
2951
2952         /* The below may be true iff there was enough room in ramrod
2953          * data for all pending commands and for the current
2954          * command. Otherwise the current command would have been added
2955          * to the pending commands and p->mcast_list_len would have been
2956          * zeroed.
2957          */
2958         if (p->mcast_list_len > 0)
2959                 cnt = bnx2x_mcast_handle_current_cmd(bp, p, cmd, cnt);
2960
2961         /* We've pulled out some MACs - update the total number of
2962          * outstanding.
2963          */
2964         o->total_pending_num -= cnt;
2965
2966         /* send a ramrod */
2967         warn_on(o->total_pending_num < 0);
2968         warn_on(cnt > o->max_cmd_len);
2969
2970         bnx2x_mcast_set_rdata_hdr_e2(bp, p, (uint8_t)cnt);
2971
2972         /* Update a registry size if there are no more pending operations.
2973          *
2974          * We don't want to change the value of the registry size if there are
2975          * pending operations because we want it to always be equal to the
2976          * exact or the approximate number (see bnx2x_mcast_validate_e2()) of
2977          * set bins after the last requested operation in order to properly
2978          * evaluate the size of the next DEL/RESTORE operation.
2979          *
2980          * Note that we update the registry itself during command(s) handling
2981          * - see bnx2x_mcast_set_one_rule_e2(). That's because for 57712 we
2982          * aggregate multiple commands (ADD/DEL/RESTORE) into one ramrod but
2983          * with a limited amount of update commands (per MAC/bin) and we don't
2984          * know in this scope what the actual state of bins configuration is
2985          * going to be after this ramrod.
2986          */
2987         if (!o->total_pending_num)
2988                 bnx2x_mcast_refresh_registry_e2(bp, o);
2989
2990         /* If CLEAR_ONLY was requested - don't send a ramrod and clear
2991          * RAMROD_PENDING status immediately.
2992          */
2993         if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) {
2994                 raw->clear_pending(raw);
2995                 return 0;
2996         } else {
2997                 /* No need for an explicit memory barrier here as long as we
2998                  * ensure the ordering of writing to the SPQ element
2999                  * and updating of the SPQ producer which involves a memory
3000                  * read. If the memory read is removed we will have to put a
3001                  * full memory barrier there (inside bnx2x_sp_post()).
3002                  */
3003
3004                 /* Send a ramrod */
3005                 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_MULTICAST_RULES,
3006                                    raw->cid, U64_HI(raw->rdata_mapping),
3007                                    U64_LO(raw->rdata_mapping),
3008                                    ETH_CONNECTION_TYPE);
3009                 if (rc)
3010                         return rc;
3011
3012                 /* Ramrod completion is pending */
3013                 return 1;
3014         }
3015 }
3016
3017 static int bnx2x_mcast_validate_e1h(struct bnx2x *bp,
3018                                     struct bnx2x_mcast_ramrod_params *p,
3019                                     enum bnx2x_mcast_cmd cmd)
3020 {
3021         /* Mark, that there is a work to do */
3022         if ((cmd == BNX2X_MCAST_CMD_DEL) || (cmd == BNX2X_MCAST_CMD_RESTORE))
3023                 p->mcast_list_len = 1;
3024
3025         return 0;
3026 }
3027
3028 static void bnx2x_mcast_revert_e1h(struct bnx2x *bp,
3029                                        struct bnx2x_mcast_ramrod_params *p,
3030                                        int old_num_bins)
3031 {
3032         /* Do nothing */
3033 }
3034
3035 #define BNX2X_57711_SET_MC_FILTER(filter, bit) \
3036 do { \
3037         (filter)[(bit) >> 5] |= (1 << ((bit) & 0x1f)); \
3038 } while (0)
3039
3040 static inline void bnx2x_mcast_hdl_add_e1h(struct bnx2x *bp,
3041                                            struct bnx2x_mcast_obj *o,
3042                                            struct bnx2x_mcast_ramrod_params *p,
3043                                            uint32_t *mc_filter)
3044 {
3045         struct bnx2x_mcast_list_elem *mlist_pos;
3046         int bit;
3047
3048         list_for_each_entry(mlist_pos, &p->mcast_list, link) {
3049                 bit = bnx2x_mcast_bin_from_mac(mlist_pos->mac);
3050                 BNX2X_57711_SET_MC_FILTER(mc_filter, bit);
3051
3052                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC, bin %d\n",
3053                    mlist_pos->mac, bit);
3054
3055                 /* bookkeeping... */
3056                 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec,
3057                                   bit);
3058         }
3059 }
3060
3061 static inline void bnx2x_mcast_hdl_restore_e1h(struct bnx2x *bp,
3062         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
3063         uint32_t *mc_filter)
3064 {
3065         int bit;
3066
3067         for (bit = bnx2x_mcast_get_next_bin(o, 0);
3068              bit >= 0;
3069              bit = bnx2x_mcast_get_next_bin(o, bit + 1)) {
3070                 BNX2X_57711_SET_MC_FILTER(mc_filter, bit);
3071                 DP(BNX2X_MSG_SP, "About to set bin %d\n", bit);
3072         }
3073 }
3074
3075 /* On 57711 we write the multicast MACs' approximate match
3076  * table by directly into the TSTORM's internal RAM. So we don't
3077  * really need to handle any tricks to make it work.
3078  */
3079 static int bnx2x_mcast_setup_e1h(struct bnx2x *bp,
3080                                  struct bnx2x_mcast_ramrod_params *p,
3081                                  enum bnx2x_mcast_cmd cmd)
3082 {
3083         int i;
3084         struct bnx2x_mcast_obj *o = p->mcast_obj;
3085         struct bnx2x_raw_obj *r = &o->raw;
3086
3087         /* If CLEAR_ONLY has been requested - clear the registry
3088          * and clear a pending bit.
3089          */
3090         if (!test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) {
3091                 uint32_t mc_filter[MC_HASH_SIZE] = {0};
3092
3093                 /* Set the multicast filter bits before writing it into
3094                  * the internal memory.
3095                  */
3096                 switch (cmd) {
3097                 case BNX2X_MCAST_CMD_ADD:
3098                         bnx2x_mcast_hdl_add_e1h(bp, o, p, mc_filter);
3099                         break;
3100
3101                 case BNX2X_MCAST_CMD_DEL:
3102                         DP(BNX2X_MSG_SP,
3103                            "Invalidating multicast MACs configuration\n");
3104
3105                         /* clear the registry */
3106                         memset(o->registry.aprox_match.vec, 0,
3107                                sizeof(o->registry.aprox_match.vec));
3108                         break;
3109
3110                 case BNX2X_MCAST_CMD_RESTORE:
3111                         bnx2x_mcast_hdl_restore_e1h(bp, o, p, mc_filter);
3112                         break;
3113
3114                 default:
3115                         BNX2X_ERR("Unknown command: %d\n", cmd);
3116                         return -EINVAL;
3117                 }
3118
3119                 /* Set the mcast filter in the internal memory */
3120                 for (i = 0; i < MC_HASH_SIZE; i++)
3121                         REG_WR(bp, MC_HASH_OFFSET(bp, i), mc_filter[i]);
3122         } else
3123                 /* clear the registry */
3124                 memset(o->registry.aprox_match.vec, 0,
3125                        sizeof(o->registry.aprox_match.vec));
3126
3127         /* We are done */
3128         r->clear_pending(r);
3129
3130         return 0;
3131 }
3132
3133 static int bnx2x_mcast_validate_e1(struct bnx2x *bp,
3134                                    struct bnx2x_mcast_ramrod_params *p,
3135                                    enum bnx2x_mcast_cmd cmd)
3136 {
3137         struct bnx2x_mcast_obj *o = p->mcast_obj;
3138         int reg_sz = o->get_registry_size(o);
3139
3140         switch (cmd) {
3141         /* DEL command deletes all currently configured MACs */
3142         case BNX2X_MCAST_CMD_DEL:
3143                 o->set_registry_size(o, 0);
3144                 /* Don't break */
3145
3146         /* RESTORE command will restore the entire multicast configuration */
3147         case BNX2X_MCAST_CMD_RESTORE:
3148                 p->mcast_list_len = reg_sz;
3149                   DP(BNX2X_MSG_SP, "Command %d, p->mcast_list_len=%d\n",
3150                                    cmd, p->mcast_list_len);
3151                 break;
3152
3153         case BNX2X_MCAST_CMD_ADD:
3154         case BNX2X_MCAST_CMD_CONT:
3155                 /* Multicast MACs on 57710 are configured as unicast MACs and
3156                  * there is only a limited number of CAM entries for that
3157                  * matter.
3158                  */
3159                 if (p->mcast_list_len > o->max_cmd_len) {
3160                         BNX2X_ERR("Can't configure more than %d multicast MACs on 57710\n",
3161                                   o->max_cmd_len);
3162                         return -EINVAL;
3163                 }
3164                 /* Every configured MAC should be cleared if DEL command is
3165                  * called. Only the last ADD command is relevant as long as
3166                  * every ADD commands overrides the previous configuration.
3167                  */
3168                 DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len);
3169                 if (p->mcast_list_len > 0)
3170                         o->set_registry_size(o, p->mcast_list_len);
3171
3172                 break;
3173
3174         default:
3175                 BNX2X_ERR("Unknown command: %d\n", cmd);
3176                 return -EINVAL;
3177         }
3178
3179         /* We want to ensure that commands are executed one by one for 57710.
3180          * Therefore each none-empty command will consume o->max_cmd_len.
3181          */
3182         if (p->mcast_list_len)
3183                 o->total_pending_num += o->max_cmd_len;
3184
3185         return 0;
3186 }
3187
3188 static void bnx2x_mcast_revert_e1(struct bnx2x *bp,
3189                                       struct bnx2x_mcast_ramrod_params *p,
3190                                       int old_num_macs)
3191 {
3192         struct bnx2x_mcast_obj *o = p->mcast_obj;
3193
3194         o->set_registry_size(o, old_num_macs);
3195
3196         /* If current command hasn't been handled yet and we are
3197          * here means that it's meant to be dropped and we have to
3198          * update the number of outstanding MACs accordingly.
3199          */
3200         if (p->mcast_list_len)
3201                 o->total_pending_num -= o->max_cmd_len;
3202 }
3203
3204 static void bnx2x_mcast_set_one_rule_e1(struct bnx2x *bp,
3205                                         struct bnx2x_mcast_obj *o, int idx,
3206                                         union bnx2x_mcast_config_data *cfg_data,
3207                                         enum bnx2x_mcast_cmd cmd)
3208 {
3209         struct bnx2x_raw_obj *r = &o->raw;
3210         struct mac_configuration_cmd *data =
3211                 (struct mac_configuration_cmd *)(r->rdata);
3212
3213         /* copy mac */
3214         if ((cmd == BNX2X_MCAST_CMD_ADD) || (cmd == BNX2X_MCAST_CMD_RESTORE)) {
3215                 bnx2x_set_fw_mac_addr(&data->config_table[idx].msb_mac_addr,
3216                                       &data->config_table[idx].middle_mac_addr,
3217                                       &data->config_table[idx].lsb_mac_addr,
3218                                       cfg_data->mac);
3219
3220                 data->config_table[idx].vlan_id = 0;
3221                 data->config_table[idx].pf_id = r->func_id;
3222                 data->config_table[idx].clients_bit_vector =
3223                         cpu_to_le32(1 << r->cl_id);
3224
3225                 SET_FLAG(data->config_table[idx].flags,