BNX2X: limit queues to 2
[akaros.git] / kern / drivers / net / bnx2x / bnx2x_sp.c
1 /* bnx2x_sp.c: Broadcom Everest network driver.
2  *
3  * Copyright (c) 2011-2013 Broadcom Corporation
4  *
5  * Unless you and Broadcom execute a separate written software license
6  * agreement governing use of this software, this software is licensed to you
7  * under the terms of the GNU General Public License version 2, available
8  * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9  *
10  * Notwithstanding the above, under no circumstances may you combine this
11  * software in any way with any other Broadcom software provided under a
12  * license other than the GPL, without Broadcom's express prior written
13  * consent.
14  *
15  * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
16  * Written by: Vladislav Zolotarov
17  *
18  */
19
20 #include "akaros_compat.h"
21
22 #include "bnx2x.h"
23 #include "bnx2x_cmn.h"
24 #include "bnx2x_sp.h"
25
26 #define BNX2X_MAX_EMUL_MULTI            16
27
28 /**** Exe Queue interfaces ****/
29
30 /**
31  * bnx2x_exe_queue_init - init the Exe Queue object
32  *
33  * @o:          pointer to the object
34  * @exe_len:    length
35  * @owner:      pointer to the owner
36  * @validate:   validate function pointer
37  * @optimize:   optimize function pointer
38  * @exec:       execute function pointer
39  * @get:        get function pointer
40  */
41 static inline void bnx2x_exe_queue_init(struct bnx2x *bp,
42                                         struct bnx2x_exe_queue_obj *o,
43                                         int exe_len,
44                                         union bnx2x_qable_obj *owner,
45                                         exe_q_validate validate,
46                                         exe_q_remove remove,
47                                         exe_q_optimize optimize,
48                                         exe_q_execute exec,
49                                         exe_q_get get)
50 {
51         memset(o, 0, sizeof(*o));
52
53         INIT_LIST_HEAD(&o->exe_queue);
54         INIT_LIST_HEAD(&o->pending_comp);
55
56         spinlock_init_irqsave(&o->lock);
57
58         o->exe_chunk_len = exe_len;
59         o->owner         = owner;
60
61         /* Owner specific callbacks */
62         o->validate      = validate;
63         o->remove        = remove;
64         o->optimize      = optimize;
65         o->execute       = exec;
66         o->get           = get;
67
68         DP(BNX2X_MSG_SP, "Setup the execution queue with the chunk length of %d\n",
69            exe_len);
70 }
71
72 static inline void bnx2x_exe_queue_free_elem(struct bnx2x *bp,
73                                              struct bnx2x_exeq_elem *elem)
74 {
75         DP(BNX2X_MSG_SP, "Deleting an exe_queue element\n");
76         kfree(elem);
77 }
78
79 static inline int bnx2x_exe_queue_length(struct bnx2x_exe_queue_obj *o)
80 {
81         struct bnx2x_exeq_elem *elem;
82         int cnt = 0;
83
84         spin_lock(&o->lock);
85
86         list_for_each_entry(elem, &o->exe_queue, link)
87                 cnt++;
88
89         spin_unlock(&o->lock);
90
91         return cnt;
92 }
93
94 /**
95  * bnx2x_exe_queue_add - add a new element to the execution queue
96  *
97  * @bp:         driver handle
98  * @o:          queue
99  * @cmd:        new command to add
100  * @restore:    true - do not optimize the command
101  *
102  * If the element is optimized or is illegal, frees it.
103  */
104 static inline int bnx2x_exe_queue_add(struct bnx2x *bp,
105                                       struct bnx2x_exe_queue_obj *o,
106                                       struct bnx2x_exeq_elem *elem,
107                                       bool restore)
108 {
109         int rc;
110
111         spin_lock(&o->lock);
112
113         if (!restore) {
114                 /* Try to cancel this element queue */
115                 rc = o->optimize(bp, o->owner, elem);
116                 if (rc)
117                         goto free_and_exit;
118
119                 /* Check if this request is ok */
120                 rc = o->validate(bp, o->owner, elem);
121                 if (rc) {
122                         DP(BNX2X_MSG_SP, "Preamble failed: %d\n", rc);
123                         goto free_and_exit;
124                 }
125         }
126
127         /* If so, add it to the execution queue */
128         list_add_tail(&elem->link, &o->exe_queue);
129
130         spin_unlock(&o->lock);
131
132         return 0;
133
134 free_and_exit:
135         bnx2x_exe_queue_free_elem(bp, elem);
136
137         spin_unlock(&o->lock);
138
139         return rc;
140 }
141
142 static inline void __bnx2x_exe_queue_reset_pending(
143         struct bnx2x *bp,
144         struct bnx2x_exe_queue_obj *o)
145 {
146         struct bnx2x_exeq_elem *elem;
147
148         while (!list_empty(&o->pending_comp)) {
149                 elem = list_first_entry(&o->pending_comp,
150                                         struct bnx2x_exeq_elem, link);
151
152                 list_del(&elem->link);
153                 bnx2x_exe_queue_free_elem(bp, elem);
154         }
155 }
156
157 /**
158  * bnx2x_exe_queue_step - execute one execution chunk atomically
159  *
160  * @bp:                 driver handle
161  * @o:                  queue
162  * @ramrod_flags:       flags
163  *
164  * (Should be called while holding the exe_queue->lock).
165  */
166 static inline int bnx2x_exe_queue_step(struct bnx2x *bp,
167                                        struct bnx2x_exe_queue_obj *o,
168                                        unsigned long *ramrod_flags)
169 {
170         struct bnx2x_exeq_elem *elem, spacer;
171         int cur_len = 0, rc;
172
173         memset(&spacer, 0, sizeof(spacer));
174
175         /* Next step should not be performed until the current is finished,
176          * unless a DRV_CLEAR_ONLY bit is set. In this case we just want to
177          * properly clear object internals without sending any command to the FW
178          * which also implies there won't be any completion to clear the
179          * 'pending' list.
180          */
181         if (!list_empty(&o->pending_comp)) {
182                 if (test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags)) {
183                         DP(BNX2X_MSG_SP, "RAMROD_DRV_CLR_ONLY requested: resetting a pending_comp list\n");
184                         __bnx2x_exe_queue_reset_pending(bp, o);
185                 } else {
186                         return 1;
187                 }
188         }
189
190         /* Run through the pending commands list and create a next
191          * execution chunk.
192          */
193         while (!list_empty(&o->exe_queue)) {
194                 elem = list_first_entry(&o->exe_queue, struct bnx2x_exeq_elem,
195                                         link);
196                 warn_on(!elem->cmd_len);
197
198                 if (cur_len + elem->cmd_len <= o->exe_chunk_len) {
199                         cur_len += elem->cmd_len;
200                         /* Prevent from both lists being empty when moving an
201                          * element. This will allow the call of
202                          * bnx2x_exe_queue_empty() without locking.
203                          */
204                         list_add_tail(&spacer.link, &o->pending_comp);
205                         mb();
206                         list_move_tail(&elem->link, &o->pending_comp);
207                         list_del(&spacer.link);
208                 } else
209                         break;
210         }
211
212         /* Sanity check */
213         if (!cur_len)
214                 return 0;
215
216         rc = o->execute(bp, o->owner, &o->pending_comp, ramrod_flags);
217         if (rc < 0)
218                 /* In case of an error return the commands back to the queue
219                  * and reset the pending_comp.
220                  */
221                 list_splice_init(&o->pending_comp, &o->exe_queue);
222         else if (!rc)
223                 /* If zero is returned, means there are no outstanding pending
224                  * completions and we may dismiss the pending list.
225                  */
226                 __bnx2x_exe_queue_reset_pending(bp, o);
227
228         return rc;
229 }
230
231 static inline bool bnx2x_exe_queue_empty(struct bnx2x_exe_queue_obj *o)
232 {
233         bool empty = list_empty(&o->exe_queue);
234
235         /* Don't reorder!!! */
236         mb();
237
238         return empty && list_empty(&o->pending_comp);
239 }
240
241 static inline struct bnx2x_exeq_elem *bnx2x_exe_queue_alloc_elem(
242         struct bnx2x *bp)
243 {
244         DP(BNX2X_MSG_SP, "Allocating a new exe_queue element\n");
245         return kzmalloc(sizeof(struct bnx2x_exeq_elem), 0);
246 }
247
248 /************************ raw_obj functions ***********************************/
249 static bool bnx2x_raw_check_pending(struct bnx2x_raw_obj *o)
250 {
251         return !!test_bit(o->state, o->pstate);
252 }
253
254 static void bnx2x_raw_clear_pending(struct bnx2x_raw_obj *o)
255 {
256         cmb();
257         clear_bit(o->state, o->pstate);
258         cmb();
259 }
260
261 static void bnx2x_raw_set_pending(struct bnx2x_raw_obj *o)
262 {
263         cmb();
264         set_bit(o->state, o->pstate);
265         cmb();
266 }
267
268 /**
269  * bnx2x_state_wait - wait until the given bit(state) is cleared
270  *
271  * @bp:         device handle
272  * @state:      state which is to be cleared
273  * @state_p:    state buffer
274  *
275  */
276 static inline int bnx2x_state_wait(struct bnx2x *bp, int state,
277                                    unsigned long *pstate)
278 {
279         /* can take a while if any port is running */
280         int cnt = 5000;
281
282         if (CHIP_REV_IS_EMUL(bp))
283                 cnt *= 20;
284
285         DP(BNX2X_MSG_SP, "waiting for state to become %d\n", state);
286
287         might_sleep();
288         while (cnt--) {
289                 if (!test_bit(state, pstate)) {
290 #ifdef BNX2X_STOP_ON_ERROR
291                         DP(BNX2X_MSG_SP, "exit  (cnt %d)\n", 5000 - cnt);
292 #endif
293                         return 0;
294                 }
295
296 /* HANGING HERE FOR SOME STATES */
297                 kthread_usleep(1000);
298
299                 if (bp->panic)
300                         return -EIO;
301         }
302
303         /* timeout! */
304         BNX2X_ERR("timeout waiting for state %d\n", state);
305 #ifdef BNX2X_STOP_ON_ERROR
306         bnx2x_panic();
307 #endif
308
309         return -EBUSY;
310 }
311
312 static int bnx2x_raw_wait(struct bnx2x *bp, struct bnx2x_raw_obj *raw)
313 {
314         return bnx2x_state_wait(bp, raw->state, raw->pstate);
315 }
316
317 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
318 /* credit handling callbacks */
319 static bool bnx2x_get_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int *offset)
320 {
321         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
322
323         warn_on(!mp);
324
325         return mp->get_entry(mp, offset);
326 }
327
328 static bool bnx2x_get_credit_mac(struct bnx2x_vlan_mac_obj *o)
329 {
330         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
331
332         warn_on(!mp);
333
334         return mp->get(mp, 1);
335 }
336
337 static bool bnx2x_get_cam_offset_vlan(struct bnx2x_vlan_mac_obj *o, int *offset)
338 {
339         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
340
341         warn_on(!vp);
342
343         return vp->get_entry(vp, offset);
344 }
345
346 static bool bnx2x_get_credit_vlan(struct bnx2x_vlan_mac_obj *o)
347 {
348         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
349
350         warn_on(!vp);
351
352         return vp->get(vp, 1);
353 }
354 static bool bnx2x_put_cam_offset_mac(struct bnx2x_vlan_mac_obj *o, int offset)
355 {
356         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
357
358         return mp->put_entry(mp, offset);
359 }
360
361 static bool bnx2x_put_credit_mac(struct bnx2x_vlan_mac_obj *o)
362 {
363         struct bnx2x_credit_pool_obj *mp = o->macs_pool;
364
365         return mp->put(mp, 1);
366 }
367
368 static bool bnx2x_put_cam_offset_vlan(struct bnx2x_vlan_mac_obj *o, int offset)
369 {
370         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
371
372         return vp->put_entry(vp, offset);
373 }
374
375 static bool bnx2x_put_credit_vlan(struct bnx2x_vlan_mac_obj *o)
376 {
377         struct bnx2x_credit_pool_obj *vp = o->vlans_pool;
378
379         return vp->put(vp, 1);
380 }
381
382 /**
383  * __bnx2x_vlan_mac_h_write_trylock - try getting the vlan mac writer lock
384  *
385  * @bp:         device handle
386  * @o:          vlan_mac object
387  *
388  * @details: Non-blocking implementation; should be called under execution
389  *           queue lock.
390  */
391 static int __bnx2x_vlan_mac_h_write_trylock(struct bnx2x *bp,
392                                             struct bnx2x_vlan_mac_obj *o)
393 {
394         if (o->head_reader) {
395                 DP(BNX2X_MSG_SP, "vlan_mac_lock writer - There are readers; Busy\n");
396                 return -EBUSY;
397         }
398
399         DP(BNX2X_MSG_SP, "vlan_mac_lock writer - Taken\n");
400         return 0;
401 }
402
403 /**
404  * __bnx2x_vlan_mac_h_exec_pending - execute step instead of a previous step
405  *
406  * @bp:         device handle
407  * @o:          vlan_mac object
408  *
409  * @details Should be called under execution queue lock; notice it might release
410  *          and reclaim it during its run.
411  */
412 static void __bnx2x_vlan_mac_h_exec_pending(struct bnx2x *bp,
413                                             struct bnx2x_vlan_mac_obj *o)
414 {
415         int rc;
416         unsigned long ramrod_flags = o->saved_ramrod_flags;
417
418         DP(BNX2X_MSG_SP, "vlan_mac_lock execute pending command with ramrod flags %lu\n",
419            ramrod_flags);
420         o->head_exe_request = false;
421         o->saved_ramrod_flags = 0;
422         rc = bnx2x_exe_queue_step(bp, &o->exe_queue, &ramrod_flags);
423         if (rc != 0) {
424                 BNX2X_ERR("execution of pending commands failed with rc %d\n",
425                           rc);
426 #ifdef BNX2X_STOP_ON_ERROR
427                 bnx2x_panic();
428 #endif
429         }
430 }
431
432 /**
433  * __bnx2x_vlan_mac_h_pend - Pend an execution step which couldn't run
434  *
435  * @bp:                 device handle
436  * @o:                  vlan_mac object
437  * @ramrod_flags:       ramrod flags of missed execution
438  *
439  * @details Should be called under execution queue lock.
440  */
441 static void __bnx2x_vlan_mac_h_pend(struct bnx2x *bp,
442                                     struct bnx2x_vlan_mac_obj *o,
443                                     unsigned long ramrod_flags)
444 {
445         o->head_exe_request = true;
446         o->saved_ramrod_flags = ramrod_flags;
447         DP(BNX2X_MSG_SP, "Placing pending execution with ramrod flags %lu\n",
448            ramrod_flags);
449 }
450
451 /**
452  * __bnx2x_vlan_mac_h_write_unlock - unlock the vlan mac head list writer lock
453  *
454  * @bp:                 device handle
455  * @o:                  vlan_mac object
456  *
457  * @details Should be called under execution queue lock. Notice if a pending
458  *          execution exists, it would perform it - possibly releasing and
459  *          reclaiming the execution queue lock.
460  */
461 static void __bnx2x_vlan_mac_h_write_unlock(struct bnx2x *bp,
462                                             struct bnx2x_vlan_mac_obj *o)
463 {
464         /* It's possible a new pending execution was added since this writer
465          * executed. If so, execute again. [Ad infinitum]
466          */
467         while (o->head_exe_request) {
468                 DP(BNX2X_MSG_SP, "vlan_mac_lock - writer release encountered a pending request\n");
469                 __bnx2x_vlan_mac_h_exec_pending(bp, o);
470         }
471 }
472
473
474 /**
475  * __bnx2x_vlan_mac_h_read_lock - lock the vlan mac head list reader lock
476  *
477  * @bp:                 device handle
478  * @o:                  vlan_mac object
479  *
480  * @details Should be called under the execution queue lock. May sleep. May
481  *          release and reclaim execution queue lock during its run.
482  */
483 static int __bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
484                                         struct bnx2x_vlan_mac_obj *o)
485 {
486         /* If we got here, we're holding lock --> no WRITER exists */
487         o->head_reader++;
488         DP(BNX2X_MSG_SP, "vlan_mac_lock - locked reader - number %d\n",
489            o->head_reader);
490
491         return 0;
492 }
493
494 /**
495  * bnx2x_vlan_mac_h_read_lock - lock the vlan mac head list reader lock
496  *
497  * @bp:                 device handle
498  * @o:                  vlan_mac object
499  *
500  * @details May sleep. Claims and releases execution queue lock during its run.
501  */
502 int bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
503                                struct bnx2x_vlan_mac_obj *o)
504 {
505         int rc;
506
507         spin_lock(&o->exe_queue.lock);
508         rc = __bnx2x_vlan_mac_h_read_lock(bp, o);
509         spin_unlock(&o->exe_queue.lock);
510
511         return rc;
512 }
513
514 /**
515  * __bnx2x_vlan_mac_h_read_unlock - unlock the vlan mac head list reader lock
516  *
517  * @bp:                 device handle
518  * @o:                  vlan_mac object
519  *
520  * @details Should be called under execution queue lock. Notice if a pending
521  *          execution exists, it would be performed if this was the last
522  *          reader. possibly releasing and reclaiming the execution queue lock.
523  */
524 static void __bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
525                                           struct bnx2x_vlan_mac_obj *o)
526 {
527         if (!o->head_reader) {
528                 BNX2X_ERR("Need to release vlan mac reader lock, but lock isn't taken\n");
529 #ifdef BNX2X_STOP_ON_ERROR
530                 bnx2x_panic();
531 #endif
532         } else {
533                 o->head_reader--;
534                 DP(BNX2X_MSG_SP, "vlan_mac_lock - decreased readers to %d\n",
535                    o->head_reader);
536         }
537
538         /* It's possible a new pending execution was added, and that this reader
539          * was last - if so we need to execute the command.
540          */
541         if (!o->head_reader && o->head_exe_request) {
542                 DP(BNX2X_MSG_SP, "vlan_mac_lock - reader release encountered a pending request\n");
543
544                 /* Writer release will do the trick */
545                 __bnx2x_vlan_mac_h_write_unlock(bp, o);
546         }
547 }
548
549 /**
550  * bnx2x_vlan_mac_h_read_unlock - unlock the vlan mac head list reader lock
551  *
552  * @bp:                 device handle
553  * @o:                  vlan_mac object
554  *
555  * @details Notice if a pending execution exists, it would be performed if this
556  *          was the last reader. Claims and releases the execution queue lock
557  *          during its run.
558  */
559 void bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
560                                   struct bnx2x_vlan_mac_obj *o)
561 {
562         spin_lock(&o->exe_queue.lock);
563         __bnx2x_vlan_mac_h_read_unlock(bp, o);
564         spin_unlock(&o->exe_queue.lock);
565 }
566
567 static int bnx2x_get_n_elements(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
568                                 int n, uint8_t *base, uint8_t stride,
569                                 uint8_t size)
570 {
571         struct bnx2x_vlan_mac_registry_elem *pos;
572         uint8_t *next = base;
573         int counter = 0;
574         int read_lock;
575
576         DP(BNX2X_MSG_SP, "get_n_elements - taking vlan_mac_lock (reader)\n");
577         read_lock = bnx2x_vlan_mac_h_read_lock(bp, o);
578         if (read_lock != 0)
579                 BNX2X_ERR("get_n_elements failed to get vlan mac reader lock; Access without lock\n");
580
581         /* traverse list */
582         list_for_each_entry(pos, &o->head, link) {
583                 if (counter < n) {
584                         memcpy(next, &pos->u, size);
585                         counter++;
586                         DP(BNX2X_MSG_SP, "copied element number %d to address %p element was:\n",
587                            counter, next);
588                         next += stride + size;
589                 }
590         }
591
592         if (read_lock == 0) {
593                 DP(BNX2X_MSG_SP, "get_n_elements - releasing vlan_mac_lock (reader)\n");
594                 bnx2x_vlan_mac_h_read_unlock(bp, o);
595         }
596
597         return counter * Eaddrlen;
598 }
599
600 /* check_add() callbacks */
601 static int bnx2x_check_mac_add(struct bnx2x *bp,
602                                struct bnx2x_vlan_mac_obj *o,
603                                union bnx2x_classification_ramrod_data *data)
604 {
605 panic("Not implemented");
606 #if 0 // AKAROS_PORT
607         struct bnx2x_vlan_mac_registry_elem *pos;
608
609         DP(BNX2X_MSG_SP, "Checking MAC %pM for ADD command\n", data->mac.mac);
610
611         if (!is_valid_ether_addr(data->mac.mac))
612                 return -EINVAL;
613
614         /* Check if a requested MAC already exists */
615         list_for_each_entry(pos, &o->head, link)
616                 if (ether_addr_equal(data->mac.mac, pos->u.mac.mac) &&
617                     (data->mac.is_inner_mac == pos->u.mac.is_inner_mac))
618                         return -EEXIST;
619
620         return 0;
621 #endif
622 }
623
624 static int bnx2x_check_vlan_add(struct bnx2x *bp,
625                                 struct bnx2x_vlan_mac_obj *o,
626                                 union bnx2x_classification_ramrod_data *data)
627 {
628         struct bnx2x_vlan_mac_registry_elem *pos;
629
630         DP(BNX2X_MSG_SP, "Checking VLAN %d for ADD command\n", data->vlan.vlan);
631
632         list_for_each_entry(pos, &o->head, link)
633                 if (data->vlan.vlan == pos->u.vlan.vlan)
634                         return -EEXIST;
635
636         return 0;
637 }
638
639 /* check_del() callbacks */
640 static struct bnx2x_vlan_mac_registry_elem *
641         bnx2x_check_mac_del(struct bnx2x *bp,
642                             struct bnx2x_vlan_mac_obj *o,
643                             union bnx2x_classification_ramrod_data *data)
644 {
645 panic("Not implemented");
646 #if 0 // AKAROS_PORT
647         struct bnx2x_vlan_mac_registry_elem *pos;
648
649         DP(BNX2X_MSG_SP, "Checking MAC %pM for DEL command\n", data->mac.mac);
650
651         list_for_each_entry(pos, &o->head, link)
652                 if (ether_addr_equal(data->mac.mac, pos->u.mac.mac) &&
653                     (data->mac.is_inner_mac == pos->u.mac.is_inner_mac))
654                         return pos;
655
656         return NULL;
657 #endif
658 }
659
660 static struct bnx2x_vlan_mac_registry_elem *
661         bnx2x_check_vlan_del(struct bnx2x *bp,
662                              struct bnx2x_vlan_mac_obj *o,
663                              union bnx2x_classification_ramrod_data *data)
664 {
665         struct bnx2x_vlan_mac_registry_elem *pos;
666
667         DP(BNX2X_MSG_SP, "Checking VLAN %d for DEL command\n", data->vlan.vlan);
668
669         list_for_each_entry(pos, &o->head, link)
670                 if (data->vlan.vlan == pos->u.vlan.vlan)
671                         return pos;
672
673         return NULL;
674 }
675
676 /* check_move() callback */
677 static bool bnx2x_check_move(struct bnx2x *bp,
678                              struct bnx2x_vlan_mac_obj *src_o,
679                              struct bnx2x_vlan_mac_obj *dst_o,
680                              union bnx2x_classification_ramrod_data *data)
681 {
682         struct bnx2x_vlan_mac_registry_elem *pos;
683         int rc;
684
685         /* Check if we can delete the requested configuration from the first
686          * object.
687          */
688         pos = src_o->check_del(bp, src_o, data);
689
690         /*  check if configuration can be added */
691         rc = dst_o->check_add(bp, dst_o, data);
692
693         /* If this classification can not be added (is already set)
694          * or can't be deleted - return an error.
695          */
696         if (rc || !pos)
697                 return false;
698
699         return true;
700 }
701
702 static bool bnx2x_check_move_always_err(
703         struct bnx2x *bp,
704         struct bnx2x_vlan_mac_obj *src_o,
705         struct bnx2x_vlan_mac_obj *dst_o,
706         union bnx2x_classification_ramrod_data *data)
707 {
708         return false;
709 }
710
711 static inline uint8_t bnx2x_vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o)
712 {
713         struct bnx2x_raw_obj *raw = &o->raw;
714         uint8_t rx_tx_flag = 0;
715
716         if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) ||
717             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
718                 rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_TX_CMD;
719
720         if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) ||
721             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
722                 rx_tx_flag |= ETH_CLASSIFY_CMD_HEADER_RX_CMD;
723
724         return rx_tx_flag;
725 }
726
727 static void bnx2x_set_mac_in_nig(struct bnx2x *bp,
728                                  bool add, unsigned char *dev_addr, int index)
729 {
730         uint32_t wb_data[2];
731         uint32_t reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM :
732                          NIG_REG_LLH0_FUNC_MEM;
733
734         if (!IS_MF_SI(bp) && !IS_MF_AFEX(bp))
735                 return;
736
737         if (index > BNX2X_LLH_CAM_MAX_PF_LINE)
738                 return;
739
740         DP(BNX2X_MSG_SP, "Going to %s LLH configuration at entry %d\n",
741                          (add ? "ADD" : "DELETE"), index);
742
743         if (add) {
744                 /* LLH_FUNC_MEM is a u64 WB register */
745                 reg_offset += 8*index;
746
747                 wb_data[0] = ((dev_addr[2] << 24) | (dev_addr[3] << 16) |
748                               (dev_addr[4] <<  8) |  dev_addr[5]);
749                 wb_data[1] = ((dev_addr[0] <<  8) |  dev_addr[1]);
750
751                 REG_WR_DMAE(bp, reg_offset, wb_data, 2);
752         }
753
754         REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM_ENABLE :
755                                   NIG_REG_LLH0_FUNC_MEM_ENABLE) + 4*index, add);
756 }
757
758 /**
759  * bnx2x_vlan_mac_set_cmd_hdr_e2 - set a header in a single classify ramrod
760  *
761  * @bp:         device handle
762  * @o:          queue for which we want to configure this rule
763  * @add:        if true the command is an ADD command, DEL otherwise
764  * @opcode:     CLASSIFY_RULE_OPCODE_XXX
765  * @hdr:        pointer to a header to setup
766  *
767  */
768 static inline void bnx2x_vlan_mac_set_cmd_hdr_e2(struct bnx2x *bp,
769         struct bnx2x_vlan_mac_obj *o, bool add, int opcode,
770         struct eth_classify_cmd_header *hdr)
771 {
772         struct bnx2x_raw_obj *raw = &o->raw;
773
774         hdr->client_id = raw->cl_id;
775         hdr->func_id = raw->func_id;
776
777         /* Rx or/and Tx (internal switching) configuration ? */
778         hdr->cmd_general_data |=
779                 bnx2x_vlan_mac_get_rx_tx_flag(o);
780
781         if (add)
782                 hdr->cmd_general_data |= ETH_CLASSIFY_CMD_HEADER_IS_ADD;
783
784         hdr->cmd_general_data |=
785                 (opcode << ETH_CLASSIFY_CMD_HEADER_OPCODE_SHIFT);
786 }
787
788 /**
789  * bnx2x_vlan_mac_set_rdata_hdr_e2 - set the classify ramrod data header
790  *
791  * @cid:        connection id
792  * @type:       BNX2X_FILTER_XXX_PENDING
793  * @hdr:        pointer to header to setup
794  * @rule_cnt:
795  *
796  * currently we always configure one rule and echo field to contain a CID and an
797  * opcode type.
798  */
799 static inline void bnx2x_vlan_mac_set_rdata_hdr_e2(uint32_t cid, int type,
800                                 struct eth_classify_header *hdr, int rule_cnt)
801 {
802         hdr->echo = cpu_to_le32((cid & BNX2X_SWCID_MASK) |
803                                 (type << BNX2X_SWCID_SHIFT));
804         hdr->rule_cnt = (uint8_t)rule_cnt;
805 }
806
807 /* hw_config() callbacks */
808 static void bnx2x_set_one_mac_e2(struct bnx2x *bp,
809                                  struct bnx2x_vlan_mac_obj *o,
810                                  struct bnx2x_exeq_elem *elem, int rule_idx,
811                                  int cam_offset)
812 {
813         struct bnx2x_raw_obj *raw = &o->raw;
814         struct eth_classify_rules_ramrod_data *data =
815                 (struct eth_classify_rules_ramrod_data *)(raw->rdata);
816         int rule_cnt = rule_idx + 1, cmd = elem->cmd_data.vlan_mac.cmd;
817         union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx];
818         bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false;
819         unsigned long *vlan_mac_flags = &elem->cmd_data.vlan_mac.vlan_mac_flags;
820         uint8_t *mac = elem->cmd_data.vlan_mac.u.mac.mac;
821
822         /* Set LLH CAM entry: currently only iSCSI and ETH macs are
823          * relevant. In addition, current implementation is tuned for a
824          * single ETH MAC.
825          *
826          * When multiple unicast ETH MACs PF configuration in switch
827          * independent mode is required (NetQ, multiple netdev MACs,
828          * etc.), consider better utilisation of 8 per function MAC
829          * entries in the LLH register. There is also
830          * NIG_REG_P[01]_LLH_FUNC_MEM2 registers that complete the
831          * total number of CAM entries to 16.
832          *
833          * Currently we won't configure NIG for MACs other than a primary ETH
834          * MAC and iSCSI L2 MAC.
835          *
836          * If this MAC is moving from one Queue to another, no need to change
837          * NIG configuration.
838          */
839         if (cmd != BNX2X_VLAN_MAC_MOVE) {
840                 if (test_bit(BNX2X_ISCSI_ETH_MAC, vlan_mac_flags))
841                         bnx2x_set_mac_in_nig(bp, add, mac,
842                                              BNX2X_LLH_CAM_ISCSI_ETH_LINE);
843                 else if (test_bit(BNX2X_ETH_MAC, vlan_mac_flags))
844                         bnx2x_set_mac_in_nig(bp, add, mac,
845                                              BNX2X_LLH_CAM_ETH_LINE);
846         }
847
848         /* Reset the ramrod data buffer for the first rule */
849         if (rule_idx == 0)
850                 memset(data, 0, sizeof(*data));
851
852         /* Setup a command header */
853         bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_MAC,
854                                       &rule_entry->mac.header);
855
856         DP(BNX2X_MSG_SP, "About to %s MAC %pM for Queue %d\n",
857            (add ? "add" : "delete"), mac, raw->cl_id);
858
859         /* Set a MAC itself */
860         bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb,
861                               &rule_entry->mac.mac_mid,
862                               &rule_entry->mac.mac_lsb, mac);
863         rule_entry->mac.inner_mac =
864                 cpu_to_le16(elem->cmd_data.vlan_mac.u.mac.is_inner_mac);
865
866         /* MOVE: Add a rule that will add this MAC to the target Queue */
867         if (cmd == BNX2X_VLAN_MAC_MOVE) {
868                 rule_entry++;
869                 rule_cnt++;
870
871                 /* Setup ramrod data */
872                 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
873                                         elem->cmd_data.vlan_mac.target_obj,
874                                               true, CLASSIFY_RULE_OPCODE_MAC,
875                                               &rule_entry->mac.header);
876
877                 /* Set a MAC itself */
878                 bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb,
879                                       &rule_entry->mac.mac_mid,
880                                       &rule_entry->mac.mac_lsb, mac);
881                 rule_entry->mac.inner_mac =
882                         cpu_to_le16(elem->cmd_data.vlan_mac.
883                                                 u.mac.is_inner_mac);
884         }
885
886         /* Set the ramrod data header */
887         /* TODO: take this to the higher level in order to prevent multiple
888                  writing */
889         bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header,
890                                         rule_cnt);
891 }
892
893 /**
894  * bnx2x_vlan_mac_set_rdata_hdr_e1x - set a header in a single classify ramrod
895  *
896  * @bp:         device handle
897  * @o:          queue
898  * @type:
899  * @cam_offset: offset in cam memory
900  * @hdr:        pointer to a header to setup
901  *
902  * E1/E1H
903  */
904 static inline void bnx2x_vlan_mac_set_rdata_hdr_e1x(struct bnx2x *bp,
905         struct bnx2x_vlan_mac_obj *o, int type, int cam_offset,
906         struct mac_configuration_hdr *hdr)
907 {
908         struct bnx2x_raw_obj *r = &o->raw;
909
910         hdr->length = 1;
911         hdr->offset = (uint8_t)cam_offset;
912         hdr->client_id = cpu_to_le16(0xff);
913         hdr->echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) |
914                                 (type << BNX2X_SWCID_SHIFT));
915 }
916
917 static inline void bnx2x_vlan_mac_set_cfg_entry_e1x(struct bnx2x *bp,
918         struct bnx2x_vlan_mac_obj *o, bool add, int opcode, uint8_t *mac,
919         uint16_t vlan_id, struct mac_configuration_entry *cfg_entry)
920 {
921         struct bnx2x_raw_obj *r = &o->raw;
922         uint32_t cl_bit_vec = (1 << r->cl_id);
923
924         cfg_entry->clients_bit_vector = cpu_to_le32(cl_bit_vec);
925         cfg_entry->pf_id = r->func_id;
926         cfg_entry->vlan_id = cpu_to_le16(vlan_id);
927
928         if (add) {
929                 SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE,
930                          T_ETH_MAC_COMMAND_SET);
931                 SET_FLAG(cfg_entry->flags,
932                          MAC_CONFIGURATION_ENTRY_VLAN_FILTERING_MODE, opcode);
933
934                 /* Set a MAC in a ramrod data */
935                 bnx2x_set_fw_mac_addr(&cfg_entry->msb_mac_addr,
936                                       &cfg_entry->middle_mac_addr,
937                                       &cfg_entry->lsb_mac_addr, mac);
938         } else
939                 SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE,
940                          T_ETH_MAC_COMMAND_INVALIDATE);
941 }
942
943 static inline void bnx2x_vlan_mac_set_rdata_e1x(struct bnx2x *bp,
944         struct bnx2x_vlan_mac_obj *o, int type, int cam_offset, bool add,
945         uint8_t *mac, uint16_t vlan_id, int opcode,
946                                                 struct mac_configuration_cmd *config)
947 {
948         struct mac_configuration_entry *cfg_entry = &config->config_table[0];
949         struct bnx2x_raw_obj *raw = &o->raw;
950
951         bnx2x_vlan_mac_set_rdata_hdr_e1x(bp, o, type, cam_offset,
952                                          &config->hdr);
953         bnx2x_vlan_mac_set_cfg_entry_e1x(bp, o, add, opcode, mac, vlan_id,
954                                          cfg_entry);
955
956         DP(BNX2X_MSG_SP, "%s MAC %pM CLID %d CAM offset %d\n",
957                          (add ? "setting" : "clearing"),
958                          mac, raw->cl_id, cam_offset);
959 }
960
961 /**
962  * bnx2x_set_one_mac_e1x - fill a single MAC rule ramrod data
963  *
964  * @bp:         device handle
965  * @o:          bnx2x_vlan_mac_obj
966  * @elem:       bnx2x_exeq_elem
967  * @rule_idx:   rule_idx
968  * @cam_offset: cam_offset
969  */
970 static void bnx2x_set_one_mac_e1x(struct bnx2x *bp,
971                                   struct bnx2x_vlan_mac_obj *o,
972                                   struct bnx2x_exeq_elem *elem, int rule_idx,
973                                   int cam_offset)
974 {
975         struct bnx2x_raw_obj *raw = &o->raw;
976         struct mac_configuration_cmd *config =
977                 (struct mac_configuration_cmd *)(raw->rdata);
978         /* 57710 and 57711 do not support MOVE command,
979          * so it's either ADD or DEL
980          */
981         bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ?
982                 true : false;
983
984         /* Reset the ramrod data buffer */
985         memset(config, 0, sizeof(*config));
986
987         bnx2x_vlan_mac_set_rdata_e1x(bp, o, raw->state,
988                                      cam_offset, add,
989                                      elem->cmd_data.vlan_mac.u.mac.mac, 0,
990                                      ETH_VLAN_FILTER_ANY_VLAN, config);
991 }
992
993 static void bnx2x_set_one_vlan_e2(struct bnx2x *bp,
994                                   struct bnx2x_vlan_mac_obj *o,
995                                   struct bnx2x_exeq_elem *elem, int rule_idx,
996                                   int cam_offset)
997 {
998         struct bnx2x_raw_obj *raw = &o->raw;
999         struct eth_classify_rules_ramrod_data *data =
1000                 (struct eth_classify_rules_ramrod_data *)(raw->rdata);
1001         int rule_cnt = rule_idx + 1;
1002         union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx];
1003         enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd;
1004         bool add = (cmd == BNX2X_VLAN_MAC_ADD) ? true : false;
1005         uint16_t vlan = elem->cmd_data.vlan_mac.u.vlan.vlan;
1006
1007         /* Reset the ramrod data buffer for the first rule */
1008         if (rule_idx == 0)
1009                 memset(data, 0, sizeof(*data));
1010
1011         /* Set a rule header */
1012         bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_VLAN,
1013                                       &rule_entry->vlan.header);
1014
1015         DP(BNX2X_MSG_SP, "About to %s VLAN %d\n", (add ? "add" : "delete"),
1016                          vlan);
1017
1018         /* Set a VLAN itself */
1019         rule_entry->vlan.vlan = cpu_to_le16(vlan);
1020
1021         /* MOVE: Add a rule that will add this MAC to the target Queue */
1022         if (cmd == BNX2X_VLAN_MAC_MOVE) {
1023                 rule_entry++;
1024                 rule_cnt++;
1025
1026                 /* Setup ramrod data */
1027                 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
1028                                         elem->cmd_data.vlan_mac.target_obj,
1029                                               true, CLASSIFY_RULE_OPCODE_VLAN,
1030                                               &rule_entry->vlan.header);
1031
1032                 /* Set a VLAN itself */
1033                 rule_entry->vlan.vlan = cpu_to_le16(vlan);
1034         }
1035
1036         /* Set the ramrod data header */
1037         /* TODO: take this to the higher level in order to prevent multiple
1038                  writing */
1039         bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header,
1040                                         rule_cnt);
1041 }
1042
1043 /**
1044  * bnx2x_vlan_mac_restore - reconfigure next MAC/VLAN/VLAN-MAC element
1045  *
1046  * @bp:         device handle
1047  * @p:          command parameters
1048  * @ppos:       pointer to the cookie
1049  *
1050  * reconfigure next MAC/VLAN/VLAN-MAC element from the
1051  * previously configured elements list.
1052  *
1053  * from command parameters only RAMROD_COMP_WAIT bit in ramrod_flags is taken
1054  * into an account
1055  *
1056  * pointer to the cookie  - that should be given back in the next call to make
1057  * function handle the next element. If *ppos is set to NULL it will restart the
1058  * iterator. If returned *ppos == NULL this means that the last element has been
1059  * handled.
1060  *
1061  */
1062 static int bnx2x_vlan_mac_restore(struct bnx2x *bp,
1063                            struct bnx2x_vlan_mac_ramrod_params *p,
1064                            struct bnx2x_vlan_mac_registry_elem **ppos)
1065 {
1066         struct bnx2x_vlan_mac_registry_elem *pos;
1067         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1068
1069         /* If list is empty - there is nothing to do here */
1070         if (list_empty(&o->head)) {
1071                 *ppos = NULL;
1072                 return 0;
1073         }
1074
1075         /* make a step... */
1076         if (*ppos == NULL)
1077                 *ppos = list_first_entry(&o->head,
1078                                          struct bnx2x_vlan_mac_registry_elem,
1079                                          link);
1080         else
1081                 *ppos = list_next_entry(*ppos, link);
1082
1083         pos = *ppos;
1084
1085         /* If it's the last step - return NULL */
1086         if (list_is_last(&pos->link, &o->head))
1087                 *ppos = NULL;
1088
1089         /* Prepare a 'user_req' */
1090         memcpy(&p->user_req.u, &pos->u, sizeof(pos->u));
1091
1092         /* Set the command */
1093         p->user_req.cmd = BNX2X_VLAN_MAC_ADD;
1094
1095         /* Set vlan_mac_flags */
1096         p->user_req.vlan_mac_flags = pos->vlan_mac_flags;
1097
1098         /* Set a restore bit */
1099         __set_bit(RAMROD_RESTORE, &p->ramrod_flags);
1100
1101         return bnx2x_config_vlan_mac(bp, p);
1102 }
1103
1104 /* bnx2x_exeq_get_mac/bnx2x_exeq_get_vlan/bnx2x_exeq_get_vlan_mac return a
1105  * pointer to an element with a specific criteria and NULL if such an element
1106  * hasn't been found.
1107  */
1108 static struct bnx2x_exeq_elem *bnx2x_exeq_get_mac(
1109         struct bnx2x_exe_queue_obj *o,
1110         struct bnx2x_exeq_elem *elem)
1111 {
1112         struct bnx2x_exeq_elem *pos;
1113         struct bnx2x_mac_ramrod_data *data = &elem->cmd_data.vlan_mac.u.mac;
1114
1115         /* Check pending for execution commands */
1116         list_for_each_entry(pos, &o->exe_queue, link)
1117                 if (!memcmp(&pos->cmd_data.vlan_mac.u.mac, data,
1118                               sizeof(*data)) &&
1119                     (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd))
1120                         return pos;
1121
1122         return NULL;
1123 }
1124
1125 static struct bnx2x_exeq_elem *bnx2x_exeq_get_vlan(
1126         struct bnx2x_exe_queue_obj *o,
1127         struct bnx2x_exeq_elem *elem)
1128 {
1129         struct bnx2x_exeq_elem *pos;
1130         struct bnx2x_vlan_ramrod_data *data = &elem->cmd_data.vlan_mac.u.vlan;
1131
1132         /* Check pending for execution commands */
1133         list_for_each_entry(pos, &o->exe_queue, link)
1134                 if (!memcmp(&pos->cmd_data.vlan_mac.u.vlan, data,
1135                               sizeof(*data)) &&
1136                     (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd))
1137                         return pos;
1138
1139         return NULL;
1140 }
1141
1142 /**
1143  * bnx2x_validate_vlan_mac_add - check if an ADD command can be executed
1144  *
1145  * @bp:         device handle
1146  * @qo:         bnx2x_qable_obj
1147  * @elem:       bnx2x_exeq_elem
1148  *
1149  * Checks that the requested configuration can be added. If yes and if
1150  * requested, consume CAM credit.
1151  *
1152  * The 'validate' is run after the 'optimize'.
1153  *
1154  */
1155 static inline int bnx2x_validate_vlan_mac_add(struct bnx2x *bp,
1156                                               union bnx2x_qable_obj *qo,
1157                                               struct bnx2x_exeq_elem *elem)
1158 {
1159         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1160         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1161         int rc;
1162
1163         /* Check the registry */
1164         rc = o->check_add(bp, o, &elem->cmd_data.vlan_mac.u);
1165         if (rc) {
1166                 DP(BNX2X_MSG_SP, "ADD command is not allowed considering current registry state.\n");
1167                 return rc;
1168         }
1169
1170         /* Check if there is a pending ADD command for this
1171          * MAC/VLAN/VLAN-MAC. Return an error if there is.
1172          */
1173         if (exeq->get(exeq, elem)) {
1174                 DP(BNX2X_MSG_SP, "There is a pending ADD command already\n");
1175                 return -EEXIST;
1176         }
1177
1178         /* TODO: Check the pending MOVE from other objects where this
1179          * object is a destination object.
1180          */
1181
1182         /* Consume the credit if not requested not to */
1183         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1184                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1185             o->get_credit(o)))
1186                 return -EINVAL;
1187
1188         return 0;
1189 }
1190
1191 /**
1192  * bnx2x_validate_vlan_mac_del - check if the DEL command can be executed
1193  *
1194  * @bp:         device handle
1195  * @qo:         quable object to check
1196  * @elem:       element that needs to be deleted
1197  *
1198  * Checks that the requested configuration can be deleted. If yes and if
1199  * requested, returns a CAM credit.
1200  *
1201  * The 'validate' is run after the 'optimize'.
1202  */
1203 static inline int bnx2x_validate_vlan_mac_del(struct bnx2x *bp,
1204                                               union bnx2x_qable_obj *qo,
1205                                               struct bnx2x_exeq_elem *elem)
1206 {
1207         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1208         struct bnx2x_vlan_mac_registry_elem *pos;
1209         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1210         struct bnx2x_exeq_elem query_elem;
1211
1212         /* If this classification can not be deleted (doesn't exist)
1213          * - return a BNX2X_EXIST.
1214          */
1215         pos = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u);
1216         if (!pos) {
1217                 DP(BNX2X_MSG_SP, "DEL command is not allowed considering current registry state\n");
1218                 return -EEXIST;
1219         }
1220
1221         /* Check if there are pending DEL or MOVE commands for this
1222          * MAC/VLAN/VLAN-MAC. Return an error if so.
1223          */
1224         memcpy(&query_elem, elem, sizeof(query_elem));
1225
1226         /* Check for MOVE commands */
1227         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_MOVE;
1228         if (exeq->get(exeq, &query_elem)) {
1229                 BNX2X_ERR("There is a pending MOVE command already\n");
1230                 return -EINVAL;
1231         }
1232
1233         /* Check for DEL commands */
1234         if (exeq->get(exeq, elem)) {
1235                 DP(BNX2X_MSG_SP, "There is a pending DEL command already\n");
1236                 return -EEXIST;
1237         }
1238
1239         /* Return the credit to the credit pool if not requested not to */
1240         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1241                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1242             o->put_credit(o))) {
1243                 BNX2X_ERR("Failed to return a credit\n");
1244                 return -EINVAL;
1245         }
1246
1247         return 0;
1248 }
1249
1250 /**
1251  * bnx2x_validate_vlan_mac_move - check if the MOVE command can be executed
1252  *
1253  * @bp:         device handle
1254  * @qo:         quable object to check (source)
1255  * @elem:       element that needs to be moved
1256  *
1257  * Checks that the requested configuration can be moved. If yes and if
1258  * requested, returns a CAM credit.
1259  *
1260  * The 'validate' is run after the 'optimize'.
1261  */
1262 static inline int bnx2x_validate_vlan_mac_move(struct bnx2x *bp,
1263                                                union bnx2x_qable_obj *qo,
1264                                                struct bnx2x_exeq_elem *elem)
1265 {
1266         struct bnx2x_vlan_mac_obj *src_o = &qo->vlan_mac;
1267         struct bnx2x_vlan_mac_obj *dest_o = elem->cmd_data.vlan_mac.target_obj;
1268         struct bnx2x_exeq_elem query_elem;
1269         struct bnx2x_exe_queue_obj *src_exeq = &src_o->exe_queue;
1270         struct bnx2x_exe_queue_obj *dest_exeq = &dest_o->exe_queue;
1271
1272         /* Check if we can perform this operation based on the current registry
1273          * state.
1274          */
1275         if (!src_o->check_move(bp, src_o, dest_o,
1276                                &elem->cmd_data.vlan_mac.u)) {
1277                 DP(BNX2X_MSG_SP, "MOVE command is not allowed considering current registry state\n");
1278                 return -EINVAL;
1279         }
1280
1281         /* Check if there is an already pending DEL or MOVE command for the
1282          * source object or ADD command for a destination object. Return an
1283          * error if so.
1284          */
1285         memcpy(&query_elem, elem, sizeof(query_elem));
1286
1287         /* Check DEL on source */
1288         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_DEL;
1289         if (src_exeq->get(src_exeq, &query_elem)) {
1290                 BNX2X_ERR("There is a pending DEL command on the source queue already\n");
1291                 return -EINVAL;
1292         }
1293
1294         /* Check MOVE on source */
1295         if (src_exeq->get(src_exeq, elem)) {
1296                 DP(BNX2X_MSG_SP, "There is a pending MOVE command already\n");
1297                 return -EEXIST;
1298         }
1299
1300         /* Check ADD on destination */
1301         query_elem.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_ADD;
1302         if (dest_exeq->get(dest_exeq, &query_elem)) {
1303                 BNX2X_ERR("There is a pending ADD command on the destination queue already\n");
1304                 return -EINVAL;
1305         }
1306
1307         /* Consume the credit if not requested not to */
1308         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
1309                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1310             dest_o->get_credit(dest_o)))
1311                 return -EINVAL;
1312
1313         if (!(test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1314                        &elem->cmd_data.vlan_mac.vlan_mac_flags) ||
1315             src_o->put_credit(src_o))) {
1316                 /* return the credit taken from dest... */
1317                 dest_o->put_credit(dest_o);
1318                 return -EINVAL;
1319         }
1320
1321         return 0;
1322 }
1323
1324 static int bnx2x_validate_vlan_mac(struct bnx2x *bp,
1325                                    union bnx2x_qable_obj *qo,
1326                                    struct bnx2x_exeq_elem *elem)
1327 {
1328         switch (elem->cmd_data.vlan_mac.cmd) {
1329         case BNX2X_VLAN_MAC_ADD:
1330                 return bnx2x_validate_vlan_mac_add(bp, qo, elem);
1331         case BNX2X_VLAN_MAC_DEL:
1332                 return bnx2x_validate_vlan_mac_del(bp, qo, elem);
1333         case BNX2X_VLAN_MAC_MOVE:
1334                 return bnx2x_validate_vlan_mac_move(bp, qo, elem);
1335         default:
1336                 return -EINVAL;
1337         }
1338 }
1339
1340 static int bnx2x_remove_vlan_mac(struct bnx2x *bp,
1341                                   union bnx2x_qable_obj *qo,
1342                                   struct bnx2x_exeq_elem *elem)
1343 {
1344         int rc = 0;
1345
1346         /* If consumption wasn't required, nothing to do */
1347         if (test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1348                      &elem->cmd_data.vlan_mac.vlan_mac_flags))
1349                 return 0;
1350
1351         switch (elem->cmd_data.vlan_mac.cmd) {
1352         case BNX2X_VLAN_MAC_ADD:
1353         case BNX2X_VLAN_MAC_MOVE:
1354                 rc = qo->vlan_mac.put_credit(&qo->vlan_mac);
1355                 break;
1356         case BNX2X_VLAN_MAC_DEL:
1357                 rc = qo->vlan_mac.get_credit(&qo->vlan_mac);
1358                 break;
1359         default:
1360                 return -EINVAL;
1361         }
1362
1363         if (rc != true)
1364                 return -EINVAL;
1365
1366         return 0;
1367 }
1368
1369 /**
1370  * bnx2x_wait_vlan_mac - passively wait for 5 seconds until all work completes.
1371  *
1372  * @bp:         device handle
1373  * @o:          bnx2x_vlan_mac_obj
1374  *
1375  */
1376 static int bnx2x_wait_vlan_mac(struct bnx2x *bp,
1377                                struct bnx2x_vlan_mac_obj *o)
1378 {
1379         int cnt = 5000, rc;
1380         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1381         struct bnx2x_raw_obj *raw = &o->raw;
1382
1383         while (cnt--) {
1384                 /* Wait for the current command to complete */
1385                 rc = raw->wait_comp(bp, raw);
1386                 if (rc)
1387                         return rc;
1388
1389                 /* Wait until there are no pending commands */
1390                 if (!bnx2x_exe_queue_empty(exeq))
1391                         kthread_usleep(1000);
1392                 else
1393                         return 0;
1394         }
1395
1396         return -EBUSY;
1397 }
1398
1399 static int __bnx2x_vlan_mac_execute_step(struct bnx2x *bp,
1400                                          struct bnx2x_vlan_mac_obj *o,
1401                                          unsigned long *ramrod_flags)
1402 {
1403         int rc = 0;
1404
1405         spin_lock(&o->exe_queue.lock);
1406
1407         DP(BNX2X_MSG_SP, "vlan_mac_execute_step - trying to take writer lock\n");
1408         rc = __bnx2x_vlan_mac_h_write_trylock(bp, o);
1409
1410         if (rc != 0) {
1411                 __bnx2x_vlan_mac_h_pend(bp, o, *ramrod_flags);
1412
1413                 /* Calling function should not diffrentiate between this case
1414                  * and the case in which there is already a pending ramrod
1415                  */
1416                 rc = 1;
1417         } else {
1418                 rc = bnx2x_exe_queue_step(bp, &o->exe_queue, ramrod_flags);
1419         }
1420         spin_unlock(&o->exe_queue.lock);
1421
1422         return rc;
1423 }
1424
1425 /**
1426  * bnx2x_complete_vlan_mac - complete one VLAN-MAC ramrod
1427  *
1428  * @bp:         device handle
1429  * @o:          bnx2x_vlan_mac_obj
1430  * @cqe:
1431  * @cont:       if true schedule next execution chunk
1432  *
1433  */
1434 static int bnx2x_complete_vlan_mac(struct bnx2x *bp,
1435                                    struct bnx2x_vlan_mac_obj *o,
1436                                    union event_ring_elem *cqe,
1437                                    unsigned long *ramrod_flags)
1438 {
1439         struct bnx2x_raw_obj *r = &o->raw;
1440         int rc;
1441
1442         /* Clearing the pending list & raw state should be made
1443          * atomically (as execution flow assumes they represent the same).
1444          */
1445         spin_lock(&o->exe_queue.lock);
1446
1447         /* Reset pending list */
1448         __bnx2x_exe_queue_reset_pending(bp, &o->exe_queue);
1449
1450         /* Clear pending */
1451         r->clear_pending(r);
1452
1453         spin_unlock(&o->exe_queue.lock);
1454
1455         /* If ramrod failed this is most likely a SW bug */
1456         if (cqe->message.error)
1457                 return -EINVAL;
1458
1459         /* Run the next bulk of pending commands if requested */
1460         if (test_bit(RAMROD_CONT, ramrod_flags)) {
1461                 rc = __bnx2x_vlan_mac_execute_step(bp, o, ramrod_flags);
1462
1463                 if (rc < 0)
1464                         return rc;
1465         }
1466
1467         /* If there is more work to do return PENDING */
1468         if (!bnx2x_exe_queue_empty(&o->exe_queue))
1469                 return 1;
1470
1471         return 0;
1472 }
1473
1474 /**
1475  * bnx2x_optimize_vlan_mac - optimize ADD and DEL commands.
1476  *
1477  * @bp:         device handle
1478  * @o:          bnx2x_qable_obj
1479  * @elem:       bnx2x_exeq_elem
1480  */
1481 static int bnx2x_optimize_vlan_mac(struct bnx2x *bp,
1482                                    union bnx2x_qable_obj *qo,
1483                                    struct bnx2x_exeq_elem *elem)
1484 {
1485         struct bnx2x_exeq_elem query, *pos;
1486         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac;
1487         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1488
1489         memcpy(&query, elem, sizeof(query));
1490
1491         switch (elem->cmd_data.vlan_mac.cmd) {
1492         case BNX2X_VLAN_MAC_ADD:
1493                 query.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_DEL;
1494                 break;
1495         case BNX2X_VLAN_MAC_DEL:
1496                 query.cmd_data.vlan_mac.cmd = BNX2X_VLAN_MAC_ADD;
1497                 break;
1498         default:
1499                 /* Don't handle anything other than ADD or DEL */
1500                 return 0;
1501         }
1502
1503         /* If we found the appropriate element - delete it */
1504         pos = exeq->get(exeq, &query);
1505         if (pos) {
1506
1507                 /* Return the credit of the optimized command */
1508                 if (!test_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
1509                               &pos->cmd_data.vlan_mac.vlan_mac_flags)) {
1510                         if ((query.cmd_data.vlan_mac.cmd ==
1511                              BNX2X_VLAN_MAC_ADD) && !o->put_credit(o)) {
1512                                 BNX2X_ERR("Failed to return the credit for the optimized ADD command\n");
1513                                 return -EINVAL;
1514                         } else if (!o->get_credit(o)) { /* VLAN_MAC_DEL */
1515                                 BNX2X_ERR("Failed to recover the credit from the optimized DEL command\n");
1516                                 return -EINVAL;
1517                         }
1518                 }
1519
1520                 DP(BNX2X_MSG_SP, "Optimizing %s command\n",
1521                            (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ?
1522                            "ADD" : "DEL");
1523
1524                 list_del(&pos->link);
1525                 bnx2x_exe_queue_free_elem(bp, pos);
1526                 return 1;
1527         }
1528
1529         return 0;
1530 }
1531
1532 /**
1533  * bnx2x_vlan_mac_get_registry_elem - prepare a registry element
1534  *
1535  * @bp:   device handle
1536  * @o:
1537  * @elem:
1538  * @restore:
1539  * @re:
1540  *
1541  * prepare a registry element according to the current command request.
1542  */
1543 static inline int bnx2x_vlan_mac_get_registry_elem(
1544         struct bnx2x *bp,
1545         struct bnx2x_vlan_mac_obj *o,
1546         struct bnx2x_exeq_elem *elem,
1547         bool restore,
1548         struct bnx2x_vlan_mac_registry_elem **re)
1549 {
1550         enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd;
1551         struct bnx2x_vlan_mac_registry_elem *reg_elem;
1552
1553         /* Allocate a new registry element if needed. */
1554         if (!restore &&
1555             ((cmd == BNX2X_VLAN_MAC_ADD) || (cmd == BNX2X_VLAN_MAC_MOVE))) {
1556                 reg_elem = kzmalloc(sizeof(*reg_elem), 0);
1557                 if (!reg_elem)
1558                         return -ENOMEM;
1559
1560                 /* Get a new CAM offset */
1561                 if (!o->get_cam_offset(o, &reg_elem->cam_offset)) {
1562                         /* This shall never happen, because we have checked the
1563                          * CAM availability in the 'validate'.
1564                          */
1565                         warn_on(1);
1566                         kfree(reg_elem);
1567                         return -EINVAL;
1568                 }
1569
1570                 DP(BNX2X_MSG_SP, "Got cam offset %d\n", reg_elem->cam_offset);
1571
1572                 /* Set a VLAN-MAC data */
1573                 memcpy(&reg_elem->u, &elem->cmd_data.vlan_mac.u,
1574                           sizeof(reg_elem->u));
1575
1576                 /* Copy the flags (needed for DEL and RESTORE flows) */
1577                 reg_elem->vlan_mac_flags =
1578                         elem->cmd_data.vlan_mac.vlan_mac_flags;
1579         } else /* DEL, RESTORE */
1580                 reg_elem = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u);
1581
1582         *re = reg_elem;
1583         return 0;
1584 }
1585
1586 /**
1587  * bnx2x_execute_vlan_mac - execute vlan mac command
1588  *
1589  * @bp:                 device handle
1590  * @qo:
1591  * @exe_chunk:
1592  * @ramrod_flags:
1593  *
1594  * go and send a ramrod!
1595  */
1596 static int bnx2x_execute_vlan_mac(struct bnx2x *bp,
1597                                   union bnx2x_qable_obj *qo,
1598                                   struct list_head *exe_chunk,
1599                                   unsigned long *ramrod_flags)
1600 {
1601         struct bnx2x_exeq_elem *elem;
1602         struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac, *cam_obj;
1603         struct bnx2x_raw_obj *r = &o->raw;
1604         int rc, idx = 0;
1605         bool restore = test_bit(RAMROD_RESTORE, ramrod_flags);
1606         bool drv_only = test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags);
1607         struct bnx2x_vlan_mac_registry_elem *reg_elem;
1608         enum bnx2x_vlan_mac_cmd cmd;
1609
1610         /* If DRIVER_ONLY execution is requested, cleanup a registry
1611          * and exit. Otherwise send a ramrod to FW.
1612          */
1613         if (!drv_only) {
1614                 warn_on(r->check_pending(r));
1615
1616                 /* Set pending */
1617                 r->set_pending(r);
1618
1619                 /* Fill the ramrod data */
1620                 list_for_each_entry(elem, exe_chunk, link) {
1621                         cmd = elem->cmd_data.vlan_mac.cmd;
1622                         /* We will add to the target object in MOVE command, so
1623                          * change the object for a CAM search.
1624                          */
1625                         if (cmd == BNX2X_VLAN_MAC_MOVE)
1626                                 cam_obj = elem->cmd_data.vlan_mac.target_obj;
1627                         else
1628                                 cam_obj = o;
1629
1630                         rc = bnx2x_vlan_mac_get_registry_elem(bp, cam_obj,
1631                                                               elem, restore,
1632                                                               &reg_elem);
1633                         if (rc)
1634                                 goto error_exit;
1635
1636                         warn_on(!reg_elem);
1637
1638                         /* Push a new entry into the registry */
1639                         if (!restore &&
1640                             ((cmd == BNX2X_VLAN_MAC_ADD) ||
1641                             (cmd == BNX2X_VLAN_MAC_MOVE)))
1642                                 list_add(&reg_elem->link, &cam_obj->head);
1643
1644                         /* Configure a single command in a ramrod data buffer */
1645                         o->set_one_rule(bp, o, elem, idx,
1646                                         reg_elem->cam_offset);
1647
1648                         /* MOVE command consumes 2 entries in the ramrod data */
1649                         if (cmd == BNX2X_VLAN_MAC_MOVE)
1650                                 idx += 2;
1651                         else
1652                                 idx++;
1653                 }
1654
1655                 /* No need for an explicit memory barrier here as long we would
1656                  * need to ensure the ordering of writing to the SPQ element
1657                  * and updating of the SPQ producer which involves a memory
1658                  * read and we will have to put a full memory barrier there
1659                  * (inside bnx2x_sp_post()).
1660                  */
1661
1662                 rc = bnx2x_sp_post(bp, o->ramrod_cmd, r->cid,
1663                                    U64_HI(r->rdata_mapping),
1664                                    U64_LO(r->rdata_mapping),
1665                                    ETH_CONNECTION_TYPE);
1666                 if (rc)
1667                         goto error_exit;
1668         }
1669
1670         /* Now, when we are done with the ramrod - clean up the registry */
1671         list_for_each_entry(elem, exe_chunk, link) {
1672                 cmd = elem->cmd_data.vlan_mac.cmd;
1673                 if ((cmd == BNX2X_VLAN_MAC_DEL) ||
1674                     (cmd == BNX2X_VLAN_MAC_MOVE)) {
1675                         reg_elem = o->check_del(bp, o,
1676                                                 &elem->cmd_data.vlan_mac.u);
1677
1678                         warn_on(!reg_elem);
1679
1680                         o->put_cam_offset(o, reg_elem->cam_offset);
1681                         list_del(&reg_elem->link);
1682                         kfree(reg_elem);
1683                 }
1684         }
1685
1686         if (!drv_only)
1687                 return 1;
1688         else
1689                 return 0;
1690
1691 error_exit:
1692         r->clear_pending(r);
1693
1694         /* Cleanup a registry in case of a failure */
1695         list_for_each_entry(elem, exe_chunk, link) {
1696                 cmd = elem->cmd_data.vlan_mac.cmd;
1697
1698                 if (cmd == BNX2X_VLAN_MAC_MOVE)
1699                         cam_obj = elem->cmd_data.vlan_mac.target_obj;
1700                 else
1701                         cam_obj = o;
1702
1703                 /* Delete all newly added above entries */
1704                 if (!restore &&
1705                     ((cmd == BNX2X_VLAN_MAC_ADD) ||
1706                     (cmd == BNX2X_VLAN_MAC_MOVE))) {
1707                         reg_elem = o->check_del(bp, cam_obj,
1708                                                 &elem->cmd_data.vlan_mac.u);
1709                         if (reg_elem) {
1710                                 list_del(&reg_elem->link);
1711                                 kfree(reg_elem);
1712                         }
1713                 }
1714         }
1715
1716         return rc;
1717 }
1718
1719 static inline int bnx2x_vlan_mac_push_new_cmd(
1720         struct bnx2x *bp,
1721         struct bnx2x_vlan_mac_ramrod_params *p)
1722 {
1723         struct bnx2x_exeq_elem *elem;
1724         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1725         bool restore = test_bit(RAMROD_RESTORE, &p->ramrod_flags);
1726
1727         /* Allocate the execution queue element */
1728         elem = bnx2x_exe_queue_alloc_elem(bp);
1729         if (!elem)
1730                 return -ENOMEM;
1731
1732         /* Set the command 'length' */
1733         switch (p->user_req.cmd) {
1734         case BNX2X_VLAN_MAC_MOVE:
1735                 elem->cmd_len = 2;
1736                 break;
1737         default:
1738                 elem->cmd_len = 1;
1739         }
1740
1741         /* Fill the object specific info */
1742         memcpy(&elem->cmd_data.vlan_mac, &p->user_req, sizeof(p->user_req));
1743
1744         /* Try to add a new command to the pending list */
1745         return bnx2x_exe_queue_add(bp, &o->exe_queue, elem, restore);
1746 }
1747
1748 /**
1749  * bnx2x_config_vlan_mac - configure VLAN/MAC/VLAN_MAC filtering rules.
1750  *
1751  * @bp:   device handle
1752  * @p:
1753  *
1754  */
1755 int bnx2x_config_vlan_mac(struct bnx2x *bp,
1756                            struct bnx2x_vlan_mac_ramrod_params *p)
1757 {
1758         int rc = 0;
1759         struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj;
1760         unsigned long *ramrod_flags = &p->ramrod_flags;
1761         bool cont = test_bit(RAMROD_CONT, ramrod_flags);
1762         struct bnx2x_raw_obj *raw = &o->raw;
1763
1764         /*
1765          * Add new elements to the execution list for commands that require it.
1766          */
1767         if (!cont) {
1768                 rc = bnx2x_vlan_mac_push_new_cmd(bp, p);
1769                 if (rc)
1770                         return rc;
1771         }
1772
1773         /* If nothing will be executed further in this iteration we want to
1774          * return PENDING if there are pending commands
1775          */
1776         if (!bnx2x_exe_queue_empty(&o->exe_queue))
1777                 rc = 1;
1778
1779         if (test_bit(RAMROD_DRV_CLR_ONLY, ramrod_flags))  {
1780                 DP(BNX2X_MSG_SP, "RAMROD_DRV_CLR_ONLY requested: clearing a pending bit.\n");
1781                 raw->clear_pending(raw);
1782         }
1783
1784         /* Execute commands if required */
1785         if (cont || test_bit(RAMROD_EXEC, ramrod_flags) ||
1786             test_bit(RAMROD_COMP_WAIT, ramrod_flags)) {
1787                 rc = __bnx2x_vlan_mac_execute_step(bp, p->vlan_mac_obj,
1788                                                    &p->ramrod_flags);
1789                 if (rc < 0)
1790                         return rc;
1791         }
1792
1793         /* RAMROD_COMP_WAIT is a superset of RAMROD_EXEC. If it was set
1794          * then user want to wait until the last command is done.
1795          */
1796         if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) {
1797                 /* Wait maximum for the current exe_queue length iterations plus
1798                  * one (for the current pending command).
1799                  */
1800                 int max_iterations = bnx2x_exe_queue_length(&o->exe_queue) + 1;
1801
1802                 while (!bnx2x_exe_queue_empty(&o->exe_queue) &&
1803                        max_iterations--) {
1804
1805                         /* Wait for the current command to complete */
1806                         rc = raw->wait_comp(bp, raw);
1807                         if (rc)
1808                                 return rc;
1809
1810                         /* Make a next step */
1811                         rc = __bnx2x_vlan_mac_execute_step(bp,
1812                                                            p->vlan_mac_obj,
1813                                                            &p->ramrod_flags);
1814                         if (rc < 0)
1815                                 return rc;
1816                 }
1817
1818                 return 0;
1819         }
1820
1821         return rc;
1822 }
1823
1824 /**
1825  * bnx2x_vlan_mac_del_all - delete elements with given vlan_mac_flags spec
1826  *
1827  * @bp:                 device handle
1828  * @o:
1829  * @vlan_mac_flags:
1830  * @ramrod_flags:       execution flags to be used for this deletion
1831  *
1832  * if the last operation has completed successfully and there are no
1833  * more elements left, positive value if the last operation has completed
1834  * successfully and there are more previously configured elements, negative
1835  * value is current operation has failed.
1836  */
1837 static int bnx2x_vlan_mac_del_all(struct bnx2x *bp,
1838                                   struct bnx2x_vlan_mac_obj *o,
1839                                   unsigned long *vlan_mac_flags,
1840                                   unsigned long *ramrod_flags)
1841 {
1842         struct bnx2x_vlan_mac_registry_elem *pos = NULL;
1843         struct bnx2x_vlan_mac_ramrod_params p;
1844         struct bnx2x_exe_queue_obj *exeq = &o->exe_queue;
1845         struct bnx2x_exeq_elem *exeq_pos, *exeq_pos_n;
1846         unsigned long flags;
1847         int read_lock;
1848         int rc = 0;
1849
1850         /* Clear pending commands first */
1851
1852         spin_lock(&exeq->lock);
1853
1854         list_for_each_entry_safe(exeq_pos, exeq_pos_n, &exeq->exe_queue, link) {
1855                 flags = exeq_pos->cmd_data.vlan_mac.vlan_mac_flags;
1856                 if (BNX2X_VLAN_MAC_CMP_FLAGS(flags) ==
1857                     BNX2X_VLAN_MAC_CMP_FLAGS(*vlan_mac_flags)) {
1858                         rc = exeq->remove(bp, exeq->owner, exeq_pos);
1859                         if (rc) {
1860                                 BNX2X_ERR("Failed to remove command\n");
1861                                 spin_unlock(&exeq->lock);
1862                                 return rc;
1863                         }
1864                         list_del(&exeq_pos->link);
1865                         bnx2x_exe_queue_free_elem(bp, exeq_pos);
1866                 }
1867         }
1868
1869         spin_unlock(&exeq->lock);
1870
1871         /* Prepare a command request */
1872         memset(&p, 0, sizeof(p));
1873         p.vlan_mac_obj = o;
1874         p.ramrod_flags = *ramrod_flags;
1875         p.user_req.cmd = BNX2X_VLAN_MAC_DEL;
1876
1877         /* Add all but the last VLAN-MAC to the execution queue without actually
1878          * execution anything.
1879          */
1880         __clear_bit(RAMROD_COMP_WAIT, &p.ramrod_flags);
1881         __clear_bit(RAMROD_EXEC, &p.ramrod_flags);
1882         __clear_bit(RAMROD_CONT, &p.ramrod_flags);
1883
1884         DP(BNX2X_MSG_SP, "vlan_mac_del_all -- taking vlan_mac_lock (reader)\n");
1885         read_lock = bnx2x_vlan_mac_h_read_lock(bp, o);
1886         if (read_lock != 0)
1887                 return read_lock;
1888
1889         list_for_each_entry(pos, &o->head, link) {
1890                 flags = pos->vlan_mac_flags;
1891                 if (BNX2X_VLAN_MAC_CMP_FLAGS(flags) ==
1892                     BNX2X_VLAN_MAC_CMP_FLAGS(*vlan_mac_flags)) {
1893                         p.user_req.vlan_mac_flags = pos->vlan_mac_flags;
1894                         memcpy(&p.user_req.u, &pos->u, sizeof(pos->u));
1895                         rc = bnx2x_config_vlan_mac(bp, &p);
1896                         if (rc < 0) {
1897                                 BNX2X_ERR("Failed to add a new DEL command\n");
1898                                 bnx2x_vlan_mac_h_read_unlock(bp, o);
1899                                 return rc;
1900                         }
1901                 }
1902         }
1903
1904         DP(BNX2X_MSG_SP, "vlan_mac_del_all -- releasing vlan_mac_lock (reader)\n");
1905         bnx2x_vlan_mac_h_read_unlock(bp, o);
1906
1907         p.ramrod_flags = *ramrod_flags;
1908         __set_bit(RAMROD_CONT, &p.ramrod_flags);
1909
1910         return bnx2x_config_vlan_mac(bp, &p);
1911 }
1912
1913 static inline void bnx2x_init_raw_obj(struct bnx2x_raw_obj *raw,
1914                                       uint8_t cl_id,
1915         uint32_t cid, uint8_t func_id, void *rdata,
1916                                       dma_addr_t rdata_mapping,
1917                                       int state,
1918         unsigned long *pstate, bnx2x_obj_type type)
1919 {
1920         raw->func_id = func_id;
1921         raw->cid = cid;
1922         raw->cl_id = cl_id;
1923         raw->rdata = rdata;
1924         raw->rdata_mapping = rdata_mapping;
1925         raw->state = state;
1926         raw->pstate = pstate;
1927         raw->obj_type = type;
1928         raw->check_pending = bnx2x_raw_check_pending;
1929         raw->clear_pending = bnx2x_raw_clear_pending;
1930         raw->set_pending = bnx2x_raw_set_pending;
1931         raw->wait_comp = bnx2x_raw_wait;
1932 }
1933
1934 static inline void bnx2x_init_vlan_mac_common(struct bnx2x_vlan_mac_obj *o,
1935         uint8_t cl_id, uint32_t cid, uint8_t func_id, void *rdata,
1936                                               dma_addr_t rdata_mapping,
1937         int state, unsigned long *pstate, bnx2x_obj_type type,
1938         struct bnx2x_credit_pool_obj *macs_pool,
1939         struct bnx2x_credit_pool_obj *vlans_pool)
1940 {
1941         INIT_LIST_HEAD(&o->head);
1942         o->head_reader = 0;
1943         o->head_exe_request = false;
1944         o->saved_ramrod_flags = 0;
1945
1946         o->macs_pool = macs_pool;
1947         o->vlans_pool = vlans_pool;
1948
1949         o->delete_all = bnx2x_vlan_mac_del_all;
1950         o->restore = bnx2x_vlan_mac_restore;
1951         o->complete = bnx2x_complete_vlan_mac;
1952         o->wait = bnx2x_wait_vlan_mac;
1953
1954         bnx2x_init_raw_obj(&o->raw, cl_id, cid, func_id, rdata, rdata_mapping,
1955                            state, pstate, type);
1956 }
1957
1958 void bnx2x_init_mac_obj(struct bnx2x *bp,
1959                         struct bnx2x_vlan_mac_obj *mac_obj,
1960                         uint8_t cl_id, uint32_t cid, uint8_t func_id,
1961                         void *rdata,
1962                         dma_addr_t rdata_mapping, int state,
1963                         unsigned long *pstate, bnx2x_obj_type type,
1964                         struct bnx2x_credit_pool_obj *macs_pool)
1965 {
1966         union bnx2x_qable_obj *qable_obj = (union bnx2x_qable_obj *)mac_obj;
1967
1968         bnx2x_init_vlan_mac_common(mac_obj, cl_id, cid, func_id, rdata,
1969                                    rdata_mapping, state, pstate, type,
1970                                    macs_pool, NULL);
1971
1972         /* CAM credit pool handling */
1973         mac_obj->get_credit = bnx2x_get_credit_mac;
1974         mac_obj->put_credit = bnx2x_put_credit_mac;
1975         mac_obj->get_cam_offset = bnx2x_get_cam_offset_mac;
1976         mac_obj->put_cam_offset = bnx2x_put_cam_offset_mac;
1977
1978         if (CHIP_IS_E1x(bp)) {
1979                 mac_obj->set_one_rule      = bnx2x_set_one_mac_e1x;
1980                 mac_obj->check_del         = bnx2x_check_mac_del;
1981                 mac_obj->check_add         = bnx2x_check_mac_add;
1982                 mac_obj->check_move        = bnx2x_check_move_always_err;
1983                 mac_obj->ramrod_cmd        = RAMROD_CMD_ID_ETH_SET_MAC;
1984
1985                 /* Exe Queue */
1986                 bnx2x_exe_queue_init(bp,
1987                                      &mac_obj->exe_queue, 1, qable_obj,
1988                                      bnx2x_validate_vlan_mac,
1989                                      bnx2x_remove_vlan_mac,
1990                                      bnx2x_optimize_vlan_mac,
1991                                      bnx2x_execute_vlan_mac,
1992                                      bnx2x_exeq_get_mac);
1993         } else {
1994                 mac_obj->set_one_rule      = bnx2x_set_one_mac_e2;
1995                 mac_obj->check_del         = bnx2x_check_mac_del;
1996                 mac_obj->check_add         = bnx2x_check_mac_add;
1997                 mac_obj->check_move        = bnx2x_check_move;
1998                 mac_obj->ramrod_cmd        =
1999                         RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES;
2000                 mac_obj->get_n_elements    = bnx2x_get_n_elements;
2001
2002                 /* Exe Queue */
2003                 bnx2x_exe_queue_init(bp,
2004                                      &mac_obj->exe_queue, CLASSIFY_RULES_COUNT,
2005                                      qable_obj, bnx2x_validate_vlan_mac,
2006                                      bnx2x_remove_vlan_mac,
2007                                      bnx2x_optimize_vlan_mac,
2008                                      bnx2x_execute_vlan_mac,
2009                                      bnx2x_exeq_get_mac);
2010         }
2011 }
2012
2013 void bnx2x_init_vlan_obj(struct bnx2x *bp,
2014                          struct bnx2x_vlan_mac_obj *vlan_obj,
2015                          uint8_t cl_id, uint32_t cid, uint8_t func_id,
2016                          void *rdata,
2017                          dma_addr_t rdata_mapping, int state,
2018                          unsigned long *pstate, bnx2x_obj_type type,
2019                          struct bnx2x_credit_pool_obj *vlans_pool)
2020 {
2021         union bnx2x_qable_obj *qable_obj = (union bnx2x_qable_obj *)vlan_obj;
2022
2023         bnx2x_init_vlan_mac_common(vlan_obj, cl_id, cid, func_id, rdata,
2024                                    rdata_mapping, state, pstate, type, NULL,
2025                                    vlans_pool);
2026
2027         vlan_obj->get_credit = bnx2x_get_credit_vlan;
2028         vlan_obj->put_credit = bnx2x_put_credit_vlan;
2029         vlan_obj->get_cam_offset = bnx2x_get_cam_offset_vlan;
2030         vlan_obj->put_cam_offset = bnx2x_put_cam_offset_vlan;
2031
2032         if (CHIP_IS_E1x(bp)) {
2033                 BNX2X_ERR("Do not support chips others than E2 and newer\n");
2034                 panic("BUG");
2035         } else {
2036                 vlan_obj->set_one_rule      = bnx2x_set_one_vlan_e2;
2037                 vlan_obj->check_del         = bnx2x_check_vlan_del;
2038                 vlan_obj->check_add         = bnx2x_check_vlan_add;
2039                 vlan_obj->check_move        = bnx2x_check_move;
2040                 vlan_obj->ramrod_cmd        =
2041                         RAMROD_CMD_ID_ETH_CLASSIFICATION_RULES;
2042                 vlan_obj->get_n_elements    = bnx2x_get_n_elements;
2043
2044                 /* Exe Queue */
2045                 bnx2x_exe_queue_init(bp,
2046                                      &vlan_obj->exe_queue, CLASSIFY_RULES_COUNT,
2047                                      qable_obj, bnx2x_validate_vlan_mac,
2048                                      bnx2x_remove_vlan_mac,
2049                                      bnx2x_optimize_vlan_mac,
2050                                      bnx2x_execute_vlan_mac,
2051                                      bnx2x_exeq_get_vlan);
2052         }
2053 }
2054
2055 /* RX_MODE verbs: DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
2056 static inline void __storm_memset_mac_filters(struct bnx2x *bp,
2057                         struct tstorm_eth_mac_filter_config *mac_filters,
2058                         uint16_t pf_id)
2059 {
2060         size_t size = sizeof(struct tstorm_eth_mac_filter_config);
2061
2062         uint32_t addr = BAR_TSTRORM_INTMEM +
2063                         TSTORM_MAC_FILTER_CONFIG_OFFSET(pf_id);
2064
2065         __storm_memset_struct(bp, addr, size, (uint32_t *)mac_filters);
2066 }
2067
2068 static int bnx2x_set_rx_mode_e1x(struct bnx2x *bp,
2069                                  struct bnx2x_rx_mode_ramrod_params *p)
2070 {
2071         /* update the bp MAC filter structure */
2072         uint32_t mask = (1 << p->cl_id);
2073
2074         struct tstorm_eth_mac_filter_config *mac_filters =
2075                 (struct tstorm_eth_mac_filter_config *)p->rdata;
2076
2077         /* initial setting is drop-all */
2078         uint8_t drop_all_ucast = 1, drop_all_mcast = 1;
2079         uint8_t accp_all_ucast = 0, accp_all_bcast = 0, accp_all_mcast = 0;
2080         uint8_t unmatched_unicast = 0;
2081
2082     /* In e1x there we only take into account rx accept flag since tx switching
2083      * isn't enabled. */
2084         if (test_bit(BNX2X_ACCEPT_UNICAST, &p->rx_accept_flags))
2085                 /* accept matched ucast */
2086                 drop_all_ucast = 0;
2087
2088         if (test_bit(BNX2X_ACCEPT_MULTICAST, &p->rx_accept_flags))
2089                 /* accept matched mcast */
2090                 drop_all_mcast = 0;
2091
2092         if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, &p->rx_accept_flags)) {
2093                 /* accept all mcast */
2094                 drop_all_ucast = 0;
2095                 accp_all_ucast = 1;
2096         }
2097         if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, &p->rx_accept_flags)) {
2098                 /* accept all mcast */
2099                 drop_all_mcast = 0;
2100                 accp_all_mcast = 1;
2101         }
2102         if (test_bit(BNX2X_ACCEPT_BROADCAST, &p->rx_accept_flags))
2103                 /* accept (all) bcast */
2104                 accp_all_bcast = 1;
2105         if (test_bit(BNX2X_ACCEPT_UNMATCHED, &p->rx_accept_flags))
2106                 /* accept unmatched unicasts */
2107                 unmatched_unicast = 1;
2108
2109         mac_filters->ucast_drop_all = drop_all_ucast ?
2110                 mac_filters->ucast_drop_all | mask :
2111                 mac_filters->ucast_drop_all & ~mask;
2112
2113         mac_filters->mcast_drop_all = drop_all_mcast ?
2114                 mac_filters->mcast_drop_all | mask :
2115                 mac_filters->mcast_drop_all & ~mask;
2116
2117         mac_filters->ucast_accept_all = accp_all_ucast ?
2118                 mac_filters->ucast_accept_all | mask :
2119                 mac_filters->ucast_accept_all & ~mask;
2120
2121         mac_filters->mcast_accept_all = accp_all_mcast ?
2122                 mac_filters->mcast_accept_all | mask :
2123                 mac_filters->mcast_accept_all & ~mask;
2124
2125         mac_filters->bcast_accept_all = accp_all_bcast ?
2126                 mac_filters->bcast_accept_all | mask :
2127                 mac_filters->bcast_accept_all & ~mask;
2128
2129         mac_filters->unmatched_unicast = unmatched_unicast ?
2130                 mac_filters->unmatched_unicast | mask :
2131                 mac_filters->unmatched_unicast & ~mask;
2132
2133         DP(BNX2X_MSG_SP, "drop_ucast 0x%x\ndrop_mcast 0x%x\n accp_ucast 0x%x\n"
2134                          "accp_mcast 0x%x\naccp_bcast 0x%x\n",
2135            mac_filters->ucast_drop_all, mac_filters->mcast_drop_all,
2136            mac_filters->ucast_accept_all, mac_filters->mcast_accept_all,
2137            mac_filters->bcast_accept_all);
2138
2139         /* write the MAC filter structure*/
2140         __storm_memset_mac_filters(bp, mac_filters, p->func_id);
2141
2142         /* The operation is completed */
2143         clear_bit(p->state, p->pstate);
2144         cmb();
2145
2146         return 0;
2147 }
2148
2149 /* Setup ramrod data */
2150 static inline void bnx2x_rx_mode_set_rdata_hdr_e2(uint32_t cid,
2151                                 struct eth_classify_header *hdr,
2152                                 uint8_t rule_cnt)
2153 {
2154         hdr->echo = cpu_to_le32(cid);
2155         hdr->rule_cnt = rule_cnt;
2156 }
2157
2158 static inline void bnx2x_rx_mode_set_cmd_state_e2(struct bnx2x *bp,
2159                                 unsigned long *accept_flags,
2160                                 struct eth_filter_rules_cmd *cmd,
2161                                 bool clear_accept_all)
2162 {
2163         uint16_t state;
2164
2165         /* start with 'drop-all' */
2166         state = ETH_FILTER_RULES_CMD_UCAST_DROP_ALL |
2167                 ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2168
2169         if (test_bit(BNX2X_ACCEPT_UNICAST, accept_flags))
2170                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2171
2172         if (test_bit(BNX2X_ACCEPT_MULTICAST, accept_flags))
2173                 state &= ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2174
2175         if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, accept_flags)) {
2176                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2177                 state |= ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL;
2178         }
2179
2180         if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, accept_flags)) {
2181                 state |= ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL;
2182                 state &= ~ETH_FILTER_RULES_CMD_MCAST_DROP_ALL;
2183         }
2184
2185         if (test_bit(BNX2X_ACCEPT_BROADCAST, accept_flags))
2186                 state |= ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL;
2187
2188         if (test_bit(BNX2X_ACCEPT_UNMATCHED, accept_flags)) {
2189                 state &= ~ETH_FILTER_RULES_CMD_UCAST_DROP_ALL;
2190                 state |= ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED;
2191         }
2192
2193         if (test_bit(BNX2X_ACCEPT_ANY_VLAN, accept_flags))
2194                 state |= ETH_FILTER_RULES_CMD_ACCEPT_ANY_VLAN;
2195
2196         /* Clear ACCEPT_ALL_XXX flags for FCoE L2 Queue */
2197         if (clear_accept_all) {
2198                 state &= ~ETH_FILTER_RULES_CMD_MCAST_ACCEPT_ALL;
2199                 state &= ~ETH_FILTER_RULES_CMD_BCAST_ACCEPT_ALL;
2200                 state &= ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_ALL;
2201                 state &= ~ETH_FILTER_RULES_CMD_UCAST_ACCEPT_UNMATCHED;
2202         }
2203
2204         cmd->state = cpu_to_le16(state);
2205 }
2206
2207 static int bnx2x_set_rx_mode_e2(struct bnx2x *bp,
2208                                 struct bnx2x_rx_mode_ramrod_params *p)
2209 {
2210         struct eth_filter_rules_ramrod_data *data = p->rdata;
2211         int rc;
2212         uint8_t rule_idx = 0;
2213
2214         /* Reset the ramrod data buffer */
2215         memset(data, 0, sizeof(*data));
2216
2217         /* Setup ramrod data */
2218
2219         /* Tx (internal switching) */
2220         if (test_bit(RAMROD_TX, &p->ramrod_flags)) {
2221                 data->rules[rule_idx].client_id = p->cl_id;
2222                 data->rules[rule_idx].func_id = p->func_id;
2223
2224                 data->rules[rule_idx].cmd_general_data =
2225                         ETH_FILTER_RULES_CMD_TX_CMD;
2226
2227                 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags,
2228                                                &(data->rules[rule_idx++]),
2229                                                false);
2230         }
2231
2232         /* Rx */
2233         if (test_bit(RAMROD_RX, &p->ramrod_flags)) {
2234                 data->rules[rule_idx].client_id = p->cl_id;
2235                 data->rules[rule_idx].func_id = p->func_id;
2236
2237                 data->rules[rule_idx].cmd_general_data =
2238                         ETH_FILTER_RULES_CMD_RX_CMD;
2239
2240                 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags,
2241                                                &(data->rules[rule_idx++]),
2242                                                false);
2243         }
2244
2245         /* If FCoE Queue configuration has been requested configure the Rx and
2246          * internal switching modes for this queue in separate rules.
2247          *
2248          * FCoE queue shell never be set to ACCEPT_ALL packets of any sort:
2249          * MCAST_ALL, UCAST_ALL, BCAST_ALL and UNMATCHED.
2250          */
2251         if (test_bit(BNX2X_RX_MODE_FCOE_ETH, &p->rx_mode_flags)) {
2252                 /*  Tx (internal switching) */
2253                 if (test_bit(RAMROD_TX, &p->ramrod_flags)) {
2254                         data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id);
2255                         data->rules[rule_idx].func_id = p->func_id;
2256
2257                         data->rules[rule_idx].cmd_general_data =
2258                                                 ETH_FILTER_RULES_CMD_TX_CMD;
2259
2260                         bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags,
2261                                                        &(data->rules[rule_idx]),
2262                                                        true);
2263                         rule_idx++;
2264                 }
2265
2266                 /* Rx */
2267                 if (test_bit(RAMROD_RX, &p->ramrod_flags)) {
2268                         data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id);
2269                         data->rules[rule_idx].func_id = p->func_id;
2270
2271                         data->rules[rule_idx].cmd_general_data =
2272                                                 ETH_FILTER_RULES_CMD_RX_CMD;
2273
2274                         bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags,
2275                                                        &(data->rules[rule_idx]),
2276                                                        true);
2277                         rule_idx++;
2278                 }
2279         }
2280
2281         /* Set the ramrod header (most importantly - number of rules to
2282          * configure).
2283          */
2284         bnx2x_rx_mode_set_rdata_hdr_e2(p->cid, &data->header, rule_idx);
2285
2286         DP(BNX2X_MSG_SP, "About to configure %d rules, rx_accept_flags 0x%lx, tx_accept_flags 0x%lx\n",
2287                          data->header.rule_cnt, p->rx_accept_flags,
2288                          p->tx_accept_flags);
2289
2290         /* No need for an explicit memory barrier here as long as we
2291          * ensure the ordering of writing to the SPQ element
2292          * and updating of the SPQ producer which involves a memory
2293          * read. If the memory read is removed we will have to put a
2294          * full memory barrier there (inside bnx2x_sp_post()).
2295          */
2296
2297         /* Send a ramrod */
2298         rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_FILTER_RULES, p->cid,
2299                            U64_HI(p->rdata_mapping),
2300                            U64_LO(p->rdata_mapping),
2301                            ETH_CONNECTION_TYPE);
2302         if (rc)
2303                 return rc;
2304
2305         /* Ramrod completion is pending */
2306         return 1;
2307 }
2308
2309 static int bnx2x_wait_rx_mode_comp_e2(struct bnx2x *bp,
2310                                       struct bnx2x_rx_mode_ramrod_params *p)
2311 {
2312         return bnx2x_state_wait(bp, p->state, p->pstate);
2313 }
2314
2315 static int bnx2x_empty_rx_mode_wait(struct bnx2x *bp,
2316                                     struct bnx2x_rx_mode_ramrod_params *p)
2317 {
2318         /* Do nothing */
2319         return 0;
2320 }
2321
2322 int bnx2x_config_rx_mode(struct bnx2x *bp,
2323                          struct bnx2x_rx_mode_ramrod_params *p)
2324 {
2325         int rc;
2326
2327         /* Configure the new classification in the chip */
2328         rc = p->rx_mode_obj->config_rx_mode(bp, p);
2329         if (rc < 0)
2330                 return rc;
2331
2332         /* Wait for a ramrod completion if was requested */
2333         if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) {
2334                 rc = p->rx_mode_obj->wait_comp(bp, p);
2335                 if (rc)
2336                         return rc;
2337         }
2338
2339         return rc;
2340 }
2341
2342 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
2343                             struct bnx2x_rx_mode_obj *o)
2344 {
2345         if (CHIP_IS_E1x(bp)) {
2346                 o->wait_comp      = bnx2x_empty_rx_mode_wait;
2347                 o->config_rx_mode = bnx2x_set_rx_mode_e1x;
2348         } else {
2349                 o->wait_comp      = bnx2x_wait_rx_mode_comp_e2;
2350                 o->config_rx_mode = bnx2x_set_rx_mode_e2;
2351         }
2352 }
2353
2354 /********************* Multicast verbs: SET, CLEAR ****************************/
2355 static inline uint8_t bnx2x_mcast_bin_from_mac(uint8_t *mac)
2356 {
2357 panic("Not implemented");
2358 #if 0 // AKAROS_PORT
2359         return (crc32c_le(0, mac, Eaddrlen) >> 24) & 0xff;
2360 #endif
2361 }
2362
2363 struct bnx2x_mcast_mac_elem {
2364         struct list_head link;
2365         uint8_t mac[Eaddrlen];
2366         uint8_t pad[2]; /* For a natural alignment of the following buffer */
2367 };
2368
2369 struct bnx2x_pending_mcast_cmd {
2370         struct list_head link;
2371         int type; /* BNX2X_MCAST_CMD_X */
2372         union {
2373                 struct list_head macs_head;
2374                 uint32_t macs_num; /* Needed for DEL command */
2375                 int next_bin; /* Needed for RESTORE flow with aprox match */
2376         } data;
2377
2378         bool done; /* set to true, when the command has been handled,
2379                     * practically used in 57712 handling only, where one pending
2380                     * command may be handled in a few operations. As long as for
2381                     * other chips every operation handling is completed in a
2382                     * single ramrod, there is no need to utilize this field.
2383                     */
2384 };
2385
2386 static int bnx2x_mcast_wait(struct bnx2x *bp,
2387                             struct bnx2x_mcast_obj *o)
2388 {
2389         if (bnx2x_state_wait(bp, o->sched_state, o->raw.pstate) ||
2390                         o->raw.wait_comp(bp, &o->raw))
2391                 return -EBUSY;
2392
2393         return 0;
2394 }
2395
2396 static int bnx2x_mcast_enqueue_cmd(struct bnx2x *bp,
2397                                    struct bnx2x_mcast_obj *o,
2398                                    struct bnx2x_mcast_ramrod_params *p,
2399                                    enum bnx2x_mcast_cmd cmd)
2400 {
2401         int total_sz;
2402         struct bnx2x_pending_mcast_cmd *new_cmd;
2403         struct bnx2x_mcast_mac_elem *cur_mac = NULL;
2404         struct bnx2x_mcast_list_elem *pos;
2405         int macs_list_len = ((cmd == BNX2X_MCAST_CMD_ADD) ?
2406                              p->mcast_list_len : 0);
2407
2408         /* If the command is empty ("handle pending commands only"), break */
2409         if (!p->mcast_list_len)
2410                 return 0;
2411
2412         total_sz = sizeof(*new_cmd) +
2413                 macs_list_len * sizeof(struct bnx2x_mcast_mac_elem);
2414
2415         /* Add mcast is called under spin_lock, thus calling with GFP_ATOMIC */
2416         new_cmd = kzmalloc(total_sz, 0);
2417
2418         if (!new_cmd)
2419                 return -ENOMEM;
2420
2421         DP(BNX2X_MSG_SP, "About to enqueue a new %d command. macs_list_len=%d\n",
2422            cmd, macs_list_len);
2423
2424         INIT_LIST_HEAD(&new_cmd->data.macs_head);
2425
2426         new_cmd->type = cmd;
2427         new_cmd->done = false;
2428
2429         switch (cmd) {
2430         case BNX2X_MCAST_CMD_ADD:
2431                 cur_mac = (struct bnx2x_mcast_mac_elem *)
2432                           ((uint8_t *)new_cmd + sizeof(*new_cmd));
2433
2434                 /* Push the MACs of the current command into the pending command
2435                  * MACs list: FIFO
2436                  */
2437                 list_for_each_entry(pos, &p->mcast_list, link) {
2438                         memcpy(cur_mac->mac, pos->mac, Eaddrlen);
2439                         list_add_tail(&cur_mac->link, &new_cmd->data.macs_head);
2440                         cur_mac++;
2441                 }
2442
2443                 break;
2444
2445         case BNX2X_MCAST_CMD_DEL:
2446                 new_cmd->data.macs_num = p->mcast_list_len;
2447                 break;
2448
2449         case BNX2X_MCAST_CMD_RESTORE:
2450                 new_cmd->data.next_bin = 0;
2451                 break;
2452
2453         default:
2454                 kfree(new_cmd);
2455                 BNX2X_ERR("Unknown command: %d\n", cmd);
2456                 return -EINVAL;
2457         }
2458
2459         /* Push the new pending command to the tail of the pending list: FIFO */
2460         list_add_tail(&new_cmd->link, &o->pending_cmds_head);
2461
2462         o->set_sched(o);
2463
2464         return 1;
2465 }
2466
2467 /**
2468  * bnx2x_mcast_get_next_bin - get the next set bin (index)
2469  *
2470  * @o:
2471  * @last:       index to start looking from (including)
2472  *
2473  * returns the next found (set) bin or a negative value if none is found.
2474  */
2475 static inline int bnx2x_mcast_get_next_bin(struct bnx2x_mcast_obj *o, int last)
2476 {
2477         int i, j, inner_start = last % BIT_VEC64_ELEM_SZ;
2478
2479         for (i = last / BIT_VEC64_ELEM_SZ; i < BNX2X_MCAST_VEC_SZ; i++) {
2480                 if (o->registry.aprox_match.vec[i])
2481                         for (j = inner_start; j < BIT_VEC64_ELEM_SZ; j++) {
2482                                 int cur_bit = j + BIT_VEC64_ELEM_SZ * i;
2483                                 if (BIT_VEC64_TEST_BIT(o->registry.aprox_match.
2484                                                        vec, cur_bit)) {
2485                                         return cur_bit;
2486                                 }
2487                         }
2488                 inner_start = 0;
2489         }
2490
2491         /* None found */
2492         return -1;
2493 }
2494
2495 /**
2496  * bnx2x_mcast_clear_first_bin - find the first set bin and clear it
2497  *
2498  * @o:
2499  *
2500  * returns the index of the found bin or -1 if none is found
2501  */
2502 static inline int bnx2x_mcast_clear_first_bin(struct bnx2x_mcast_obj *o)
2503 {
2504         int cur_bit = bnx2x_mcast_get_next_bin(o, 0);
2505
2506         if (cur_bit >= 0)
2507                 BIT_VEC64_CLEAR_BIT(o->registry.aprox_match.vec, cur_bit);
2508
2509         return cur_bit;
2510 }
2511
2512 static inline uint8_t bnx2x_mcast_get_rx_tx_flag(struct bnx2x_mcast_obj *o)
2513 {
2514         struct bnx2x_raw_obj *raw = &o->raw;
2515         uint8_t rx_tx_flag = 0;
2516
2517         if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) ||
2518             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
2519                 rx_tx_flag |= ETH_MULTICAST_RULES_CMD_TX_CMD;
2520
2521         if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) ||
2522             (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX))
2523                 rx_tx_flag |= ETH_MULTICAST_RULES_CMD_RX_CMD;
2524
2525         return rx_tx_flag;
2526 }
2527
2528 static void bnx2x_mcast_set_one_rule_e2(struct bnx2x *bp,
2529                                         struct bnx2x_mcast_obj *o, int idx,
2530                                         union bnx2x_mcast_config_data *cfg_data,
2531                                         enum bnx2x_mcast_cmd cmd)
2532 {
2533         struct bnx2x_raw_obj *r = &o->raw;
2534         struct eth_multicast_rules_ramrod_data *data =
2535                 (struct eth_multicast_rules_ramrod_data *)(r->rdata);
2536         uint8_t func_id = r->func_id;
2537         uint8_t rx_tx_add_flag = bnx2x_mcast_get_rx_tx_flag(o);
2538         int bin;
2539
2540         if ((cmd == BNX2X_MCAST_CMD_ADD) || (cmd == BNX2X_MCAST_CMD_RESTORE))
2541                 rx_tx_add_flag |= ETH_MULTICAST_RULES_CMD_IS_ADD;
2542
2543         data->rules[idx].cmd_general_data |= rx_tx_add_flag;
2544
2545         /* Get a bin and update a bins' vector */
2546         switch (cmd) {
2547         case BNX2X_MCAST_CMD_ADD:
2548                 bin = bnx2x_mcast_bin_from_mac(cfg_data->mac);
2549                 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec, bin);
2550                 break;
2551
2552         case BNX2X_MCAST_CMD_DEL:
2553                 /* If there were no more bins to clear
2554                  * (bnx2x_mcast_clear_first_bin() returns -1) then we would
2555                  * clear any (0xff) bin.
2556                  * See bnx2x_mcast_validate_e2() for explanation when it may
2557                  * happen.
2558                  */
2559                 bin = bnx2x_mcast_clear_first_bin(o);
2560                 break;
2561
2562         case BNX2X_MCAST_CMD_RESTORE:
2563                 bin = cfg_data->bin;
2564                 break;
2565
2566         default:
2567                 BNX2X_ERR("Unknown command: %d\n", cmd);
2568                 return;
2569         }
2570
2571         DP(BNX2X_MSG_SP, "%s bin %d\n",
2572                          ((rx_tx_add_flag & ETH_MULTICAST_RULES_CMD_IS_ADD) ?
2573                          "Setting"  : "Clearing"), bin);
2574
2575         data->rules[idx].bin_id    = (uint8_t)bin;
2576         data->rules[idx].func_id   = func_id;
2577         data->rules[idx].engine_id = o->engine_id;
2578 }
2579
2580 /**
2581  * bnx2x_mcast_handle_restore_cmd_e2 - restore configuration from the registry
2582  *
2583  * @bp:         device handle
2584  * @o:
2585  * @start_bin:  index in the registry to start from (including)
2586  * @rdata_idx:  index in the ramrod data to start from
2587  *
2588  * returns last handled bin index or -1 if all bins have been handled
2589  */
2590 static inline int bnx2x_mcast_handle_restore_cmd_e2(
2591         struct bnx2x *bp, struct bnx2x_mcast_obj *o , int start_bin,
2592         int *rdata_idx)
2593 {
2594         int cur_bin, cnt = *rdata_idx;
2595         union bnx2x_mcast_config_data cfg_data = {NULL};
2596
2597         /* go through the registry and configure the bins from it */
2598         for (cur_bin = bnx2x_mcast_get_next_bin(o, start_bin); cur_bin >= 0;
2599             cur_bin = bnx2x_mcast_get_next_bin(o, cur_bin + 1)) {
2600
2601                 cfg_data.bin = (uint8_t)cur_bin;
2602                 o->set_one_rule(bp, o, cnt, &cfg_data,
2603                                 BNX2X_MCAST_CMD_RESTORE);
2604
2605                 cnt++;
2606
2607                 DP(BNX2X_MSG_SP, "About to configure a bin %d\n", cur_bin);
2608
2609                 /* Break if we reached the maximum number
2610                  * of rules.
2611                  */
2612                 if (cnt >= o->max_cmd_len)
2613                         break;
2614         }
2615
2616         *rdata_idx = cnt;
2617
2618         return cur_bin;
2619 }
2620
2621 static inline void bnx2x_mcast_hdl_pending_add_e2(struct bnx2x *bp,
2622         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2623         int *line_idx)
2624 {
2625         struct bnx2x_mcast_mac_elem *pmac_pos, *pmac_pos_n;
2626         int cnt = *line_idx;
2627         union bnx2x_mcast_config_data cfg_data = {NULL};
2628
2629         list_for_each_entry_safe(pmac_pos, pmac_pos_n, &cmd_pos->data.macs_head,
2630                                  link) {
2631
2632                 cfg_data.mac = &pmac_pos->mac[0];
2633                 o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type);
2634
2635                 cnt++;
2636
2637                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n",
2638                    pmac_pos->mac);
2639
2640                 list_del(&pmac_pos->link);
2641
2642                 /* Break if we reached the maximum number
2643                  * of rules.
2644                  */
2645                 if (cnt >= o->max_cmd_len)
2646                         break;
2647         }
2648
2649         *line_idx = cnt;
2650
2651         /* if no more MACs to configure - we are done */
2652         if (list_empty(&cmd_pos->data.macs_head))
2653                 cmd_pos->done = true;
2654 }
2655
2656 static inline void bnx2x_mcast_hdl_pending_del_e2(struct bnx2x *bp,
2657         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2658         int *line_idx)
2659 {
2660         int cnt = *line_idx;
2661
2662         while (cmd_pos->data.macs_num) {
2663                 o->set_one_rule(bp, o, cnt, NULL, cmd_pos->type);
2664
2665                 cnt++;
2666
2667                 cmd_pos->data.macs_num--;
2668
2669                   DP(BNX2X_MSG_SP, "Deleting MAC. %d left,cnt is %d\n",
2670                                    cmd_pos->data.macs_num, cnt);
2671
2672                 /* Break if we reached the maximum
2673                  * number of rules.
2674                  */
2675                 if (cnt >= o->max_cmd_len)
2676                         break;
2677         }
2678
2679         *line_idx = cnt;
2680
2681         /* If we cleared all bins - we are done */
2682         if (!cmd_pos->data.macs_num)
2683                 cmd_pos->done = true;
2684 }
2685
2686 static inline void bnx2x_mcast_hdl_pending_restore_e2(struct bnx2x *bp,
2687         struct bnx2x_mcast_obj *o, struct bnx2x_pending_mcast_cmd *cmd_pos,
2688         int *line_idx)
2689 {
2690         cmd_pos->data.next_bin = o->hdl_restore(bp, o, cmd_pos->data.next_bin,
2691                                                 line_idx);
2692
2693         if (cmd_pos->data.next_bin < 0)
2694                 /* If o->set_restore returned -1 we are done */
2695                 cmd_pos->done = true;
2696         else
2697                 /* Start from the next bin next time */
2698                 cmd_pos->data.next_bin++;
2699 }
2700
2701 static inline int bnx2x_mcast_handle_pending_cmds_e2(struct bnx2x *bp,
2702                                 struct bnx2x_mcast_ramrod_params *p)
2703 {
2704         struct bnx2x_pending_mcast_cmd *cmd_pos, *cmd_pos_n;
2705         int cnt = 0;
2706         struct bnx2x_mcast_obj *o = p->mcast_obj;
2707
2708         list_for_each_entry_safe(cmd_pos, cmd_pos_n, &o->pending_cmds_head,
2709                                  link) {
2710                 switch (cmd_pos->type) {
2711                 case BNX2X_MCAST_CMD_ADD:
2712                         bnx2x_mcast_hdl_pending_add_e2(bp, o, cmd_pos, &cnt);
2713                         break;
2714
2715                 case BNX2X_MCAST_CMD_DEL:
2716                         bnx2x_mcast_hdl_pending_del_e2(bp, o, cmd_pos, &cnt);
2717                         break;
2718
2719                 case BNX2X_MCAST_CMD_RESTORE:
2720                         bnx2x_mcast_hdl_pending_restore_e2(bp, o, cmd_pos,
2721                                                            &cnt);
2722                         break;
2723
2724                 default:
2725                         BNX2X_ERR("Unknown command: %d\n", cmd_pos->type);
2726                         return -EINVAL;
2727                 }
2728
2729                 /* If the command has been completed - remove it from the list
2730                  * and free the memory
2731                  */
2732                 if (cmd_pos->done) {
2733                         list_del(&cmd_pos->link);
2734                         kfree(cmd_pos);
2735                 }
2736
2737                 /* Break if we reached the maximum number of rules */
2738                 if (cnt >= o->max_cmd_len)
2739                         break;
2740         }
2741
2742         return cnt;
2743 }
2744
2745 static inline void bnx2x_mcast_hdl_add(struct bnx2x *bp,
2746         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
2747         int *line_idx)
2748 {
2749         struct bnx2x_mcast_list_elem *mlist_pos;
2750         union bnx2x_mcast_config_data cfg_data = {NULL};
2751         int cnt = *line_idx;
2752
2753         list_for_each_entry(mlist_pos, &p->mcast_list, link) {
2754                 cfg_data.mac = mlist_pos->mac;
2755                 o->set_one_rule(bp, o, cnt, &cfg_data, BNX2X_MCAST_CMD_ADD);
2756
2757                 cnt++;
2758
2759                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n",
2760                    mlist_pos->mac);
2761         }
2762
2763         *line_idx = cnt;
2764 }
2765
2766 static inline void bnx2x_mcast_hdl_del(struct bnx2x *bp,
2767         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
2768         int *line_idx)
2769 {
2770         int cnt = *line_idx, i;
2771
2772         for (i = 0; i < p->mcast_list_len; i++) {
2773                 o->set_one_rule(bp, o, cnt, NULL, BNX2X_MCAST_CMD_DEL);
2774
2775                 cnt++;
2776
2777                 DP(BNX2X_MSG_SP, "Deleting MAC. %d left\n",
2778                                  p->mcast_list_len - i - 1);
2779         }
2780
2781         *line_idx = cnt;
2782 }
2783
2784 /**
2785  * bnx2x_mcast_handle_current_cmd -
2786  *
2787  * @bp:         device handle
2788  * @p:
2789  * @cmd:
2790  * @start_cnt:  first line in the ramrod data that may be used
2791  *
2792  * This function is called iff there is enough place for the current command in
2793  * the ramrod data.
2794  * Returns number of lines filled in the ramrod data in total.
2795  */
2796 static inline int bnx2x_mcast_handle_current_cmd(struct bnx2x *bp,
2797                         struct bnx2x_mcast_ramrod_params *p,
2798                         enum bnx2x_mcast_cmd cmd,
2799                         int start_cnt)
2800 {
2801         struct bnx2x_mcast_obj *o = p->mcast_obj;
2802         int cnt = start_cnt;
2803
2804         DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len);
2805
2806         switch (cmd) {
2807         case BNX2X_MCAST_CMD_ADD:
2808                 bnx2x_mcast_hdl_add(bp, o, p, &cnt);
2809                 break;
2810
2811         case BNX2X_MCAST_CMD_DEL:
2812                 bnx2x_mcast_hdl_del(bp, o, p, &cnt);
2813                 break;
2814
2815         case BNX2X_MCAST_CMD_RESTORE:
2816                 o->hdl_restore(bp, o, 0, &cnt);
2817                 break;
2818
2819         default:
2820                 BNX2X_ERR("Unknown command: %d\n", cmd);
2821                 return -EINVAL;
2822         }
2823
2824         /* The current command has been handled */
2825         p->mcast_list_len = 0;
2826
2827         return cnt;
2828 }
2829
2830 static int bnx2x_mcast_validate_e2(struct bnx2x *bp,
2831                                    struct bnx2x_mcast_ramrod_params *p,
2832                                    enum bnx2x_mcast_cmd cmd)
2833 {
2834         struct bnx2x_mcast_obj *o = p->mcast_obj;
2835         int reg_sz = o->get_registry_size(o);
2836
2837         switch (cmd) {
2838         /* DEL command deletes all currently configured MACs */
2839         case BNX2X_MCAST_CMD_DEL:
2840                 o->set_registry_size(o, 0);
2841                 /* Don't break */
2842
2843         /* RESTORE command will restore the entire multicast configuration */
2844         case BNX2X_MCAST_CMD_RESTORE:
2845                 /* Here we set the approximate amount of work to do, which in
2846                  * fact may be only less as some MACs in postponed ADD
2847                  * command(s) scheduled before this command may fall into
2848                  * the same bin and the actual number of bins set in the
2849                  * registry would be less than we estimated here. See
2850                  * bnx2x_mcast_set_one_rule_e2() for further details.
2851                  */
2852                 p->mcast_list_len = reg_sz;
2853                 break;
2854
2855         case BNX2X_MCAST_CMD_ADD:
2856         case BNX2X_MCAST_CMD_CONT:
2857                 /* Here we assume that all new MACs will fall into new bins.
2858                  * However we will correct the real registry size after we
2859                  * handle all pending commands.
2860                  */
2861                 o->set_registry_size(o, reg_sz + p->mcast_list_len);
2862                 break;
2863
2864         default:
2865                 BNX2X_ERR("Unknown command: %d\n", cmd);
2866                 return -EINVAL;
2867         }
2868
2869         /* Increase the total number of MACs pending to be configured */
2870         o->total_pending_num += p->mcast_list_len;
2871
2872         return 0;
2873 }
2874
2875 static void bnx2x_mcast_revert_e2(struct bnx2x *bp,
2876                                       struct bnx2x_mcast_ramrod_params *p,
2877                                       int old_num_bins)
2878 {
2879         struct bnx2x_mcast_obj *o = p->mcast_obj;
2880
2881         o->set_registry_size(o, old_num_bins);
2882         o->total_pending_num -= p->mcast_list_len;
2883 }
2884
2885 /**
2886  * bnx2x_mcast_set_rdata_hdr_e2 - sets a header values
2887  *
2888  * @bp:         device handle
2889  * @p:
2890  * @len:        number of rules to handle
2891  */
2892 static inline void bnx2x_mcast_set_rdata_hdr_e2(struct bnx2x *bp,
2893                                         struct bnx2x_mcast_ramrod_params *p,
2894                                         uint8_t len)
2895 {
2896         struct bnx2x_raw_obj *r = &p->mcast_obj->raw;
2897         struct eth_multicast_rules_ramrod_data *data =
2898                 (struct eth_multicast_rules_ramrod_data *)(r->rdata);
2899
2900         data->header.echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) |
2901                                         (BNX2X_FILTER_MCAST_PENDING <<
2902                                          BNX2X_SWCID_SHIFT));
2903         data->header.rule_cnt = len;
2904 }
2905
2906 /**
2907  * bnx2x_mcast_refresh_registry_e2 - recalculate the actual number of set bins
2908  *
2909  * @bp:         device handle
2910  * @o:
2911  *
2912  * Recalculate the actual number of set bins in the registry using Brian
2913  * Kernighan's algorithm: it's execution complexity is as a number of set bins.
2914  *
2915  * returns 0 for the compliance with bnx2x_mcast_refresh_registry_e1().
2916  */
2917 static inline int bnx2x_mcast_refresh_registry_e2(struct bnx2x *bp,
2918                                                   struct bnx2x_mcast_obj *o)
2919 {
2920         int i, cnt = 0;
2921         uint64_t elem;
2922
2923         for (i = 0; i < BNX2X_MCAST_VEC_SZ; i++) {
2924                 elem = o->registry.aprox_match.vec[i];
2925                 for (; elem; cnt++)
2926                         elem &= elem - 1;
2927         }
2928
2929         o->set_registry_size(o, cnt);
2930
2931         return 0;
2932 }
2933
2934 static int bnx2x_mcast_setup_e2(struct bnx2x *bp,
2935                                 struct bnx2x_mcast_ramrod_params *p,
2936                                 enum bnx2x_mcast_cmd cmd)
2937 {
2938         struct bnx2x_raw_obj *raw = &p->mcast_obj->raw;
2939         struct bnx2x_mcast_obj *o = p->mcast_obj;
2940         struct eth_multicast_rules_ramrod_data *data =
2941                 (struct eth_multicast_rules_ramrod_data *)(raw->rdata);
2942         int cnt = 0, rc;
2943
2944         /* Reset the ramrod data buffer */
2945         memset(data, 0, sizeof(*data));
2946
2947         cnt = bnx2x_mcast_handle_pending_cmds_e2(bp, p);
2948
2949         /* If there are no more pending commands - clear SCHEDULED state */
2950         if (list_empty(&o->pending_cmds_head))
2951                 o->clear_sched(o);
2952
2953         /* The below may be true iff there was enough room in ramrod
2954          * data for all pending commands and for the current
2955          * command. Otherwise the current command would have been added
2956          * to the pending commands and p->mcast_list_len would have been
2957          * zeroed.
2958          */
2959         if (p->mcast_list_len > 0)
2960                 cnt = bnx2x_mcast_handle_current_cmd(bp, p, cmd, cnt);
2961
2962         /* We've pulled out some MACs - update the total number of
2963          * outstanding.
2964          */
2965         o->total_pending_num -= cnt;
2966
2967         /* send a ramrod */
2968         warn_on(o->total_pending_num < 0);
2969         warn_on(cnt > o->max_cmd_len);
2970
2971         bnx2x_mcast_set_rdata_hdr_e2(bp, p, (uint8_t)cnt);
2972
2973         /* Update a registry size if there are no more pending operations.
2974          *
2975          * We don't want to change the value of the registry size if there are
2976          * pending operations because we want it to always be equal to the
2977          * exact or the approximate number (see bnx2x_mcast_validate_e2()) of
2978          * set bins after the last requested operation in order to properly
2979          * evaluate the size of the next DEL/RESTORE operation.
2980          *
2981          * Note that we update the registry itself during command(s) handling
2982          * - see bnx2x_mcast_set_one_rule_e2(). That's because for 57712 we
2983          * aggregate multiple commands (ADD/DEL/RESTORE) into one ramrod but
2984          * with a limited amount of update commands (per MAC/bin) and we don't
2985          * know in this scope what the actual state of bins configuration is
2986          * going to be after this ramrod.
2987          */
2988         if (!o->total_pending_num)
2989                 bnx2x_mcast_refresh_registry_e2(bp, o);
2990
2991         /* If CLEAR_ONLY was requested - don't send a ramrod and clear
2992          * RAMROD_PENDING status immediately.
2993          */
2994         if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) {
2995                 raw->clear_pending(raw);
2996                 return 0;
2997         } else {
2998                 /* No need for an explicit memory barrier here as long as we
2999                  * ensure the ordering of writing to the SPQ element
3000                  * and updating of the SPQ producer which involves a memory
3001                  * read. If the memory read is removed we will have to put a
3002                  * full memory barrier there (inside bnx2x_sp_post()).
3003                  */
3004
3005                 /* Send a ramrod */
3006                 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_MULTICAST_RULES,
3007                                    raw->cid, U64_HI(raw->rdata_mapping),
3008                                    U64_LO(raw->rdata_mapping),
3009                                    ETH_CONNECTION_TYPE);
3010                 if (rc)
3011                         return rc;
3012
3013                 /* Ramrod completion is pending */
3014                 return 1;
3015         }
3016 }
3017
3018 static int bnx2x_mcast_validate_e1h(struct bnx2x *bp,
3019                                     struct bnx2x_mcast_ramrod_params *p,
3020                                     enum bnx2x_mcast_cmd cmd)
3021 {
3022         /* Mark, that there is a work to do */
3023         if ((cmd == BNX2X_MCAST_CMD_DEL) || (cmd == BNX2X_MCAST_CMD_RESTORE))
3024                 p->mcast_list_len = 1;
3025
3026         return 0;
3027 }
3028
3029 static void bnx2x_mcast_revert_e1h(struct bnx2x *bp,
3030                                        struct bnx2x_mcast_ramrod_params *p,
3031                                        int old_num_bins)
3032 {
3033         /* Do nothing */
3034 }
3035
3036 #define BNX2X_57711_SET_MC_FILTER(filter, bit) \
3037 do { \
3038         (filter)[(bit) >> 5] |= (1 << ((bit) & 0x1f)); \
3039 } while (0)
3040
3041 static inline void bnx2x_mcast_hdl_add_e1h(struct bnx2x *bp,
3042                                            struct bnx2x_mcast_obj *o,
3043                                            struct bnx2x_mcast_ramrod_params *p,
3044                                            uint32_t *mc_filter)
3045 {
3046         struct bnx2x_mcast_list_elem *mlist_pos;
3047         int bit;
3048
3049         list_for_each_entry(mlist_pos, &p->mcast_list, link) {
3050                 bit = bnx2x_mcast_bin_from_mac(mlist_pos->mac);
3051                 BNX2X_57711_SET_MC_FILTER(mc_filter, bit);
3052
3053                 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC, bin %d\n",
3054                    mlist_pos->mac, bit);
3055
3056                 /* bookkeeping... */
3057                 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec,
3058                                   bit);
3059         }
3060 }
3061
3062 static inline void bnx2x_mcast_hdl_restore_e1h(struct bnx2x *bp,
3063         struct bnx2x_mcast_obj *o, struct bnx2x_mcast_ramrod_params *p,
3064         uint32_t *mc_filter)
3065 {
3066         int bit;
3067
3068         for (bit = bnx2x_mcast_get_next_bin(o, 0);
3069              bit >= 0;
3070              bit = bnx2x_mcast_get_next_bin(o, bit + 1)) {
3071                 BNX2X_57711_SET_MC_FILTER(mc_filter, bit);
3072                 DP(BNX2X_MSG_SP, "About to set bin %d\n", bit);
3073         }
3074 }
3075
3076 /* On 57711 we write the multicast MACs' approximate match
3077  * table by directly into the TSTORM's internal RAM. So we don't
3078  * really need to handle any tricks to make it work.
3079  */
3080 static int bnx2x_mcast_setup_e1h(struct bnx2x *bp,
3081                                  struct bnx2x_mcast_ramrod_params *p,
3082                                  enum bnx2x_mcast_cmd cmd)
3083 {
3084         int i;
3085         struct bnx2x_mcast_obj *o = p->mcast_obj;
3086         struct bnx2x_raw_obj *r = &o->raw;
3087
3088         /* If CLEAR_ONLY has been requested - clear the registry
3089          * and clear a pending bit.
3090          */
3091         if (!test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) {
3092                 uint32_t mc_filter[MC_HASH_SIZE] = {0};
3093
3094                 /* Set the multicast filter bits before writing it into
3095                  * the internal memory.
3096                  */
3097                 switch (cmd) {
3098                 case BNX2X_MCAST_CMD_ADD:
3099                         bnx2x_mcast_hdl_add_e1h(bp, o, p, mc_filter);
3100                         break;
3101
3102                 case BNX2X_MCAST_CMD_DEL:
3103                         DP(BNX2X_MSG_SP,
3104                            "Invalidating multicast MACs configuration\n");
3105
3106                         /* clear the registry */
3107                         memset(o->registry.aprox_match.vec, 0,
3108                                sizeof(o->registry.aprox_match.vec));
3109                         break;
3110
3111                 case BNX2X_MCAST_CMD_RESTORE:
3112                         bnx2x_mcast_hdl_restore_e1h(bp, o, p, mc_filter);
3113                         break;
3114
3115                 default:
3116                         BNX2X_ERR("Unknown command: %d\n", cmd);
3117                         return -EINVAL;
3118                 }
3119
3120                 /* Set the mcast filter in the internal memory */
3121                 for (i = 0; i < MC_HASH_SIZE; i++)
3122                         REG_WR(bp, MC_HASH_OFFSET(bp, i), mc_filter[i]);
3123         } else
3124                 /* clear the registry */
3125                 memset(o->registry.aprox_match.vec, 0,
3126                        sizeof(o->registry.aprox_match.vec));
3127
3128         /* We are done */
3129         r->clear_pending(r);
3130
3131         return 0;
3132 }
3133
3134 static int bnx2x_mcast_validate_e1(struct bnx2x *bp,
3135                                    struct bnx2x_mcast_ramrod_params *p,
3136                                    enum bnx2x_mcast_cmd cmd)
3137 {
3138         struct bnx2x_mcast_obj *o = p->mcast_obj;
3139         int reg_sz = o->get_registry_size(o);
3140
3141         switch (cmd) {
3142         /* DEL command deletes all currently configured MACs */
3143         case BNX2X_MCAST_CMD_DEL:
3144                 o->set_registry_size(o, 0);
3145                 /* Don't break */
3146
3147         /* RESTORE command will restore the entire multicast configuration */
3148         case BNX2X_MCAST_CMD_RESTORE:
3149                 p->mcast_list_len = reg_sz;
3150                   DP(BNX2X_MSG_SP, "Command %d, p->mcast_list_len=%d\n",
3151                                    cmd, p->mcast_list_len);
3152                 break;
3153
3154         case BNX2X_MCAST_CMD_ADD:
3155         case BNX2X_MCAST_CMD_CONT:
3156                 /* Multicast MACs on 57710 are configured as unicast MACs and
3157                  * there is only a limited number of CAM entries for that
3158                  * matter.
3159                  */
3160                 if (p->mcast_list_len > o->max_cmd_len) {
3161                         BNX2X_ERR("Can't configure more than %d multicast MACs on 57710\n",
3162                                   o->max_cmd_len);
3163                         return -EINVAL;
3164                 }
3165                 /* Every configured MAC should be cleared if DEL command is
3166                  * called. Only the last ADD command is relevant as long as
3167                  * every ADD commands overrides the previous configuration.
3168                  */
3169                 DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len);
3170                 if (p->mcast_list_len > 0)
3171                         o->set_registry_size(o, p->mcast_list_len);
3172
3173                 break;
3174
3175         default:
3176                 BNX2X_ERR("Unknown command: %d\n", cmd);
3177                 return -EINVAL;
3178         }
3179
3180         /* We want to ensure that commands are executed one by one for 57710.
3181          * Therefore each none-empty command will consume o->max_cmd_len.
3182          */
3183         if (p->mcast_list_len)
3184                 o->total_pending_num += o->max_cmd_len;
3185
3186         return 0;
3187 }
3188
3189 static void bnx2x_mcast_revert_e1(struct bnx2x *bp,
3190                                       struct bnx2x_mcast_ramrod_params *p,
3191                                       int old_num_macs)
3192 {
3193         struct bnx2x_mcast_obj *o = p->mcast_obj;
3194
3195         o->set_registry_size(o, old_num_macs);
3196
3197         /* If current command hasn't been handled yet and we are
3198          * here means that it's meant to be dropped and we have to
3199          * update the number of outstanding MACs accordingly.
3200          */
3201         if (p->mcast_list_len)
3202                 o->total_pending_num -= o->max_cmd_len;
3203 }
3204
3205 static void bnx2x_mcast_set_one_rule_e1(struct bnx2x *bp,
3206                                         struct bnx2x_mcast_obj *o, int idx,
3207                                         union bnx2x_mcast_config_data *cfg_data,
3208                                         enum bnx2x_mcast_cmd cmd)
3209 {
3210         struct bnx2x_raw_obj *r = &o->raw;
3211         struct mac_configuration_cmd *data =
3212                 (struct mac_configuration_cmd *)(r->rdata);
3213
3214         /* copy mac */
3215         if ((cmd == BNX2X_MCAST_CMD_ADD) || (cmd == BNX2X_MCAST_CMD_RESTORE)) {
3216                 bnx2x_set_fw_mac_addr(&data->config_table[idx].msb_mac_addr,
3217                                       &data->config_table[idx].middle_mac_addr,
3218                                       &data->config_table[idx].lsb_mac_addr,
3219                                       cfg_data->mac);
3220
3221                 data->config_table[idx].vlan_id = 0;
3222                 data->config_table[idx].pf_id = r->func_id;
3223                 data->config_table[idx].clients_bit_vector =
3224                         cpu_to_le32(1 << r->cl_id);
3225