Added whitelisting to MSR read/write code
[akaros.git] / kern / arch / x86 / ros / trapframe64.h
1 #pragma once
2
3 #ifndef ROS_INC_ARCH_TRAPFRAME_H
4 #error "Do not include include ros/arch/trapframe64.h directly"
5 #endif
6
7 struct hw_trapframe {
8         uint64_t tf_gsbase;
9         uint64_t tf_fsbase;
10         uint64_t tf_rax;
11         uint64_t tf_rbx;
12         uint64_t tf_rcx;
13         uint64_t tf_rdx;
14         uint64_t tf_rbp;
15         uint64_t tf_rsi;
16         uint64_t tf_rdi;
17         uint64_t tf_r8;
18         uint64_t tf_r9;
19         uint64_t tf_r10;
20         uint64_t tf_r11;
21         uint64_t tf_r12;
22         uint64_t tf_r13;
23         uint64_t tf_r14;
24         uint64_t tf_r15;
25         uint32_t tf_trapno;
26         uint32_t tf_padding5;
27         /* below here defined by x86 hardware (error code optional) */
28         uint32_t tf_err;
29         uint32_t tf_padding4;
30         uint64_t tf_rip;
31         uint16_t tf_cs;
32         uint16_t tf_padding3;
33         uint32_t tf_padding2;
34         uint64_t tf_rflags;
35         /* unlike 32 bit, SS:RSP is always pushed, even when not changing rings */
36         uint64_t tf_rsp;
37         uint16_t tf_ss;
38         uint16_t tf_padding1;
39         uint32_t tf_padding0;
40 };
41
42 struct sw_trapframe {
43         uint64_t tf_gsbase;
44         uint64_t tf_fsbase;
45         uint64_t tf_rbx;
46         uint64_t tf_rbp;
47         uint64_t tf_r12;
48         uint64_t tf_r13;
49         uint64_t tf_r14;
50         uint64_t tf_r15;
51         uint64_t tf_rip;
52         uint64_t tf_rsp;
53         uint32_t tf_mxcsr;
54         uint16_t tf_fpucw;
55         uint16_t tf_padding0;
56 };