Changes pde_t* -> pgdir_t
[akaros.git] / kern / arch / x86 / ros / trapframe.h
1 #ifndef ROS_INC_ARCH_TRAPFRAME_H
2 #define ROS_INC_ARCH_TRAPFRAME_H
3
4 #ifndef ROS_INC_TRAPFRAME_H
5 #error "Do not include include ros/arch/trapframe.h directly"
6 #endif
7
8 #include <ros/common.h>
9
10 #define ROS_ARCH_REFL_ID 0x1234
11
12 /* Page faults return the nature of the fault in the bits of the error code: */
13 #define PF_ERROR_PRESENT                0x01
14 #define PF_ERROR_WRITE                  0x02
15 #define PF_ERROR_USER                   0x04
16 #define PF_VMR_BACKED                   (1 << 31)
17
18 #include <ros/arch/trapframe64.h>
19
20 /* FP state and whatever else the kernel won't muck with automatically.  For
21  * now, it's the Non-64-bit-mode layout of FP and XMM registers, as used by
22  * FXSAVE and FXRSTOR.  Other modes will require a union on a couple entries.
23  * See SDM 2a 3-451. */
24 /* Header for the non-64-bit mode FXSAVE map */
25 struct fp_header_non_64bit {
26         uint16_t                fcw;
27         uint16_t                fsw;
28         uint8_t                 ftw;
29         uint8_t                 padding0;
30         uint16_t                fop;
31         uint32_t                fpu_ip;
32         uint16_t                cs;
33         uint16_t                padding1;
34         uint32_t                fpu_dp;
35         uint16_t                ds;
36         uint16_t                padding2;
37         uint32_t                mxcsr;
38         uint32_t                mxcsr_mask;
39 };
40
41 /* Header for the 64-bit mode FXSAVE map with promoted operand size */
42 struct fp_header_64bit_promoted {
43         uint16_t                fcw;
44         uint16_t                fsw;
45         uint8_t                 ftw;
46         uint8_t                 padding0;
47         uint16_t                fop;
48         uint64_t                fpu_ip;
49         uint64_t                fpu_dp;
50         uint32_t                mxcsr;
51         uint32_t                mxcsr_mask;
52 };
53
54 /* Header for the 64-bit mode FXSAVE map with default operand size */
55 struct fp_header_64bit_default {
56         uint16_t                fcw;
57         uint16_t                fsw;
58         uint8_t                 ftw;
59         uint8_t                 padding0;
60         uint16_t                fop;
61         uint32_t                fpu_ip;
62         uint16_t                cs;
63         uint16_t                padding1;
64         uint32_t                fpu_dp;
65         uint16_t                ds;
66         uint16_t                padding2;
67         uint32_t                mxcsr;
68         uint32_t                mxcsr_mask;
69 };
70
71 /* Just for storage space, not for real use     */
72 typedef struct {
73         unsigned int stor[4];
74 } __128bits;
75
76 typedef struct ancillary_state {
77         union { /* whichever header used depends on the mode */
78                 struct fp_header_non_64bit                      fp_head_n64;
79                 struct fp_header_64bit_promoted         fp_head_64p;
80                 struct fp_header_64bit_default          fp_head_64d;
81         };
82         __128bits               st0_mm0;        /* 128 bits: 80 for the st0, 48 rsv */
83         __128bits               st1_mm1;
84         __128bits               st2_mm2;
85         __128bits               st3_mm3;
86         __128bits               st4_mm4;
87         __128bits               st5_mm5;
88         __128bits               st6_mm6;
89         __128bits               st7_mm7;
90         __128bits               xmm0;
91         __128bits               xmm1;
92         __128bits               xmm2;
93         __128bits               xmm3;
94         __128bits               xmm4;
95         __128bits               xmm5;
96         __128bits               xmm6;
97         __128bits               xmm7;
98         __128bits               xmm8;           /* xmm8 and below only for 64-bit-mode */
99         __128bits               xmm9;
100         __128bits               xmm10;
101         __128bits               xmm11;
102         __128bits               xmm12;
103         __128bits               xmm13;
104         __128bits               xmm14;
105         __128bits               xmm15;
106         __128bits               reserv0;
107         __128bits               reserv1;
108         __128bits               reserv2;
109         __128bits               reserv3;
110         __128bits               reserv4;
111         __128bits               reserv5;
112 } __attribute__((aligned(16))) ancillary_state_t;
113
114 #endif /* ROS_INC_ARCH_TRAPFRAME_H */