x86: Fixes TLS bug causing kernel page faults
[akaros.git] / kern / arch / sparc / env.c
1 /* See COPYRIGHT for copyright information. */
2 #ifdef __SHARC__
3 #pragma nosharc
4 #endif
5
6 #ifdef __DEPUTY__
7 #pragma noasync
8 #endif
9
10 #include <arch/trap.h>
11 #include <env.h>
12 #include <assert.h>
13 #include <arch/arch.h>
14 #include <pmap.h>
15
16 void
17 ( env_push_ancillary_state)(env_t* e)
18 {
19         if(e->env_tf.psr & PSR_EF)
20                 save_fp_state(&e->env_ancillary_state);
21 }
22
23 void
24 save_fp_state(ancillary_state_t* silly)
25 {
26         #define push_two_fp_regs(pdest,n) \
27             __asm__ __volatile__ ("std  %%f" XSTR(n) ",[%0+4*" XSTR(n) "]" \
28                               : : "r"(pdest) : "memory");
29
30         write_psr(read_psr() | PSR_EF);
31
32         silly->fsr = read_fsr();
33
34         push_two_fp_regs(silly->fpr,0);
35         push_two_fp_regs(silly->fpr,2);
36         push_two_fp_regs(silly->fpr,4);
37         push_two_fp_regs(silly->fpr,6);
38         push_two_fp_regs(silly->fpr,8);
39         push_two_fp_regs(silly->fpr,10);
40         push_two_fp_regs(silly->fpr,12);
41         push_two_fp_regs(silly->fpr,14);
42         push_two_fp_regs(silly->fpr,16);
43         push_two_fp_regs(silly->fpr,18);
44         push_two_fp_regs(silly->fpr,20);
45         push_two_fp_regs(silly->fpr,22);
46         push_two_fp_regs(silly->fpr,24);
47         push_two_fp_regs(silly->fpr,26);
48         push_two_fp_regs(silly->fpr,28);
49         push_two_fp_regs(silly->fpr,30);
50
51         write_psr(read_psr() & ~PSR_EF);
52 }
53
54 void
55 ( env_pop_ancillary_state)(env_t* e)
56
57         if(e->env_tf.psr & PSR_EF)
58                 restore_fp_state(&e->env_ancillary_state);
59 }
60
61 void
62 restore_fp_state(ancillary_state_t* silly)
63 {
64         #define pop_two_fp_regs(pdest,n) \
65             __asm__ __volatile__ ("ldd  [%0+4*" XSTR(n) "], %%f" XSTR(n) \
66                               : : "r"(pdest) : "memory");
67
68         write_psr(read_psr() | PSR_EF);
69
70         pop_two_fp_regs(silly->fpr,0);
71         pop_two_fp_regs(silly->fpr,2);
72         pop_two_fp_regs(silly->fpr,4);
73         pop_two_fp_regs(silly->fpr,6);
74         pop_two_fp_regs(silly->fpr,8);
75         pop_two_fp_regs(silly->fpr,10);
76         pop_two_fp_regs(silly->fpr,12);
77         pop_two_fp_regs(silly->fpr,14);
78         pop_two_fp_regs(silly->fpr,16);
79         pop_two_fp_regs(silly->fpr,18);
80         pop_two_fp_regs(silly->fpr,20);
81         pop_two_fp_regs(silly->fpr,22);
82         pop_two_fp_regs(silly->fpr,24);
83         pop_two_fp_regs(silly->fpr,26);
84         pop_two_fp_regs(silly->fpr,28);
85         pop_two_fp_regs(silly->fpr,30);
86
87         write_fsr(silly->fsr);
88
89         write_psr(read_psr() & ~PSR_EF);
90 }
91
92 // Flush all mapped pages in the user portion of the address space
93 // TODO: only supports L3 user pages
94 int
95 env_user_mem_walk(env_t* e, void* start, size_t len,
96                   mem_walk_callback_t callback, void* arg)
97 {
98         pte_t *l1pt = e->env_pgdir;
99
100         assert((uintptr_t)start % PGSIZE == 0 && len % PGSIZE == 0);
101         void* end = (char*)start+len;
102
103         int l1x_start = L1X(start);
104         int l1x_end = L1X(ROUNDUP(end,L1PGSIZE));
105         for(int l1x = l1x_start; l1x < l1x_end; l1x++)
106         {
107                 if(!(l1pt[l1x] & PTE_PTD))
108                         continue;
109
110                 physaddr_t l2ptpa = PTD_ADDR(l1pt[l1x]);
111                 pte_t* l2pt = (pte_t*)KADDR(l2ptpa);
112
113                 int l2x_start = l1x == l1x_start ? L2X(start) : 0;
114                 int l2x_end = l1x == l1x_end-1 && L2X(ROUNDUP(end,L2PGSIZE)) ?
115                               L2X(ROUNDUP(end,L2PGSIZE)) : NL2ENTRIES;
116                 for(int l2x = l2x_start; l2x < l2x_end; l2x++)
117                 {
118                         if(!(l2pt[l2x] & PTE_PTD))
119                                 continue;
120
121                         physaddr_t l3ptpa = PTD_ADDR(l2pt[l2x]);
122                         pte_t* l3pt = (pte_t*)KADDR(l3ptpa);
123
124                         int l3x_start = l1x == l1x_start && l2x == l2x_start ?
125                                         L3X(start) : 0;
126                         int l3x_end = l1x == l1x_end-1 && l2x == l2x_end-1 && L3X(end) ?
127                                       L3X(end) : NL3ENTRIES;
128                         for(int l3x = l3x_start, ret; l3x < l3x_end; l3x++)
129                                 if(!PAGE_UNMAPPED(l3pt[l3x]))
130                                         if((ret = callback(e,&l3pt[l3x],PGADDR(l1x,l2x,l3x,0),arg)))
131                                                 return ret;
132                 }
133         }
134
135         return 0;
136 }
137
138 void
139 env_pagetable_free(env_t* e)
140 {
141         static_assert(L2X(KERNBASE) == 0 && L3X(KERNBASE) == 0);
142         pte_t *l1pt = e->env_pgdir;
143
144         for(int l1x = 0; l1x < L1X(KERNBASE); l1x++)
145         {
146                 if(!(l1pt[l1x] & PTE_PTD))
147                         continue;
148
149                 physaddr_t l2ptpa = PTD_ADDR(l1pt[l1x]);
150                 pte_t* l2pt = (pte_t*)KADDR(l2ptpa);
151
152                 for(int l2x = 0; l2x < NL2ENTRIES; l2x++)
153                 {
154                         if(!(l2pt[l2x] & PTE_PTD))
155                                 continue;
156
157                         physaddr_t l3ptpa = PTD_ADDR(l2pt[l2x]);
158                         l2pt[l2x] = 0;
159                         page_decref(pa2page(l3ptpa));
160                 }
161
162                 l1pt[l1x] = 0;
163                 page_decref(pa2page(l2ptpa));
164         }
165
166         page_decref(pa2page(e->env_cr3));
167         tlbflush();
168 }