ba574fd97d7f3d79ad58185212c0bdc8e8f1e489
[akaros.git] / kern / arch / i686 / ros / trapframe.h
1 /*  Mostly from JOS.   See COPYRIGHT for copyright information. */
2
3 #ifndef ROS_INCLUDE_ARCH_TRAPFRAME_H
4 #define ROS_INCLUDE_ARCH_TRAPFRAME_H
5
6 #include <ros/common.h>
7
8 typedef struct pushregs {
9         /* registers as pushed by pusha */
10         uint32_t reg_edi;
11         uint32_t reg_esi;
12         uint32_t reg_ebp; uint32_t reg_oesp;            /* Useless */
13         uint32_t reg_ebx;
14         uint32_t reg_edx;
15         uint32_t reg_ecx;
16         uint32_t reg_eax;
17 } push_regs_t;
18
19 typedef struct trapframe {
20         push_regs_t tf_regs;
21         uint16_t tf_gs;
22         uint16_t tf_padding1;
23         uint16_t tf_fs;
24         uint16_t tf_padding2;
25         uint16_t tf_es;
26         uint16_t tf_padding3;
27         uint16_t tf_ds;
28         uint16_t tf_padding4;
29         uint32_t tf_trapno;
30         /* below here defined by x86 hardware */
31         uint32_t tf_err;
32         uintptr_t tf_eip;
33         uint16_t tf_cs;
34         uint16_t tf_padding5;
35         uint32_t tf_eflags;
36         /* below here only when crossing rings, such as from user to kernel */
37         uintptr_t tf_esp;
38         uint16_t tf_ss;
39         uint16_t tf_padding6;
40 } trapframe_t;
41
42 /* TODO: consider using a user-space specific trapframe, since they don't need
43  * all of this information.  Might do that eventually, but til then: */
44 #define user_trapframe trapframe
45
46 /* FP state and whatever else the kernel won't muck with automatically.  For
47  * now, it's the Non-64-bit-mode layout of FP and XMM registers, as used by
48  * FXSAVE and FXRSTOR.  Other modes will require a union on a couple entries.
49  * See SDM 2a 3-451. */
50 /* Header for the non-64-bit mode FXSAVE map */
51 struct fp_header_non_64bit {
52         uint16_t                fcw;
53         uint16_t                fsw;
54         uint8_t                 ftw;
55         uint8_t                 padding0;
56         uint16_t                fop;
57         uint32_t                fpu_ip;
58         uint16_t                cs;
59         uint16_t                padding1;
60         uint32_t                fpu_dp;
61         uint16_t                ds;
62         uint16_t                padding2;
63         uint32_t                mxcsr;
64         uint32_t                mxcsr_mask;
65 };
66
67 /* Header for the 64-bit mode FXSAVE map with promoted operand size */
68 struct fp_header_64bit_promoted {
69         uint16_t                fcw;
70         uint16_t                fsw;
71         uint8_t                 ftw;
72         uint8_t                 padding0;
73         uint16_t                fop;
74         uint64_t                fpu_ip;
75         uint64_t                fpu_dp;
76         uint32_t                mxcsr;
77         uint32_t                mxcsr_mask;
78 };
79
80 /* Header for the 64-bit mode FXSAVE map with default operand size */
81 struct fp_header_64bit_default {
82         uint16_t                fcw;
83         uint16_t                fsw;
84         uint8_t                 ftw;
85         uint8_t                 padding0;
86         uint16_t                fop;
87         uint32_t                fpu_ip;
88         uint16_t                cs;
89         uint16_t                padding1;
90         uint32_t                fpu_dp;
91         uint16_t                ds;
92         uint16_t                padding2;
93         uint32_t                mxcsr;
94         uint32_t                mxcsr_mask;
95 };
96
97 /* Just for storage space, not for real use     */
98 typedef struct {
99         unsigned int stor[4];
100 } __uint128_t;
101
102 typedef struct ancillary_state {
103         union { /* whichever header used depends on the mode */
104                 struct fp_header_non_64bit                      fp_head_n64;
105                 struct fp_header_64bit_promoted         fp_head_64p;
106                 struct fp_header_64bit_default          fp_head_64d;
107         };
108         __uint128_t             st0_mm0;        /* 128 bits: 80 for the st0, 48 rsv */
109         __uint128_t             st1_mm1;
110         __uint128_t             st2_mm2;
111         __uint128_t             st3_mm3;
112         __uint128_t             st4_mm4;
113         __uint128_t             st5_mm5;
114         __uint128_t             st6_mm6;
115         __uint128_t             st7_mm7;
116         __uint128_t             xmm0;
117         __uint128_t             xmm1;
118         __uint128_t             xmm2;
119         __uint128_t             xmm3;
120         __uint128_t             xmm4;
121         __uint128_t             xmm5;
122         __uint128_t             xmm6;
123         __uint128_t             xmm7;
124         __uint128_t             xmm8;           /* xmm8 and below only for 64-bit-mode */
125         __uint128_t             xmm9;
126         __uint128_t             xmm10;
127         __uint128_t             xmm11;
128         __uint128_t             xmm12;
129         __uint128_t             xmm13;
130         __uint128_t             xmm14;
131         __uint128_t             xmm15;
132         __uint128_t             reserv0;
133         __uint128_t             reserv1;
134         __uint128_t             reserv2;
135         __uint128_t             reserv3;
136         __uint128_t             reserv4;
137         __uint128_t             reserv5;
138 } __attribute__((aligned(16))) ancillary_state_t;
139
140 #endif /* !ROS_INCLUDE_ARCH_TRAPFRAME_H */